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1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * GPIO driver for EXAR XRA1403 16-bit GPIO expander
4  *
5  * Copyright (c) 2017, General Electric Company
6  */
7 
8 #include <linux/bitops.h>
9 #include <linux/gpio/driver.h>
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/mutex.h>
13 #include <linux/of_device.h>
14 #include <linux/of_gpio.h>
15 #include <linux/seq_file.h>
16 #include <linux/spi/spi.h>
17 #include <linux/regmap.h>
18 
19 /* XRA1403 registers */
20 #define XRA_GSR   0x00 /* GPIO State */
21 #define XRA_OCR   0x02 /* Output Control */
22 #define XRA_PIR   0x04 /* Input Polarity Inversion */
23 #define XRA_GCR   0x06 /* GPIO Configuration */
24 #define XRA_PUR   0x08 /* Input Internal Pull-up Resistor Enable/Disable */
25 #define XRA_IER   0x0A /* Input Interrupt Enable */
26 #define XRA_TSCR  0x0C /* Output Three-State Control */
27 #define XRA_ISR   0x0E /* Input Interrupt Status */
28 #define XRA_REIR  0x10 /* Input Rising Edge Interrupt Enable */
29 #define XRA_FEIR  0x12 /* Input Falling Edge Interrupt Enable */
30 #define XRA_IFR   0x14 /* Input Filter Enable/Disable */
31 #define XRA_LAST  0x15 /* Bounds */
32 
33 struct xra1403 {
34 	struct gpio_chip  chip;
35 	struct regmap     *regmap;
36 };
37 
38 static const struct regmap_config xra1403_regmap_cfg = {
39 		.reg_bits = 7,
40 		.pad_bits = 1,
41 		.val_bits = 8,
42 
43 		.max_register = XRA_LAST,
44 };
45 
to_reg(unsigned int reg,unsigned int offset)46 static unsigned int to_reg(unsigned int reg, unsigned int offset)
47 {
48 	return reg + (offset > 7);
49 }
50 
xra1403_direction_input(struct gpio_chip * chip,unsigned int offset)51 static int xra1403_direction_input(struct gpio_chip *chip, unsigned int offset)
52 {
53 	struct xra1403 *xra = gpiochip_get_data(chip);
54 
55 	return regmap_update_bits(xra->regmap, to_reg(XRA_GCR, offset),
56 			BIT(offset % 8), BIT(offset % 8));
57 }
58 
xra1403_direction_output(struct gpio_chip * chip,unsigned int offset,int value)59 static int xra1403_direction_output(struct gpio_chip *chip, unsigned int offset,
60 				    int value)
61 {
62 	int ret;
63 	struct xra1403 *xra = gpiochip_get_data(chip);
64 
65 	ret = regmap_update_bits(xra->regmap, to_reg(XRA_GCR, offset),
66 			BIT(offset % 8), 0);
67 	if (ret)
68 		return ret;
69 
70 	ret = regmap_update_bits(xra->regmap, to_reg(XRA_OCR, offset),
71 			BIT(offset % 8), value ? BIT(offset % 8) : 0);
72 
73 	return ret;
74 }
75 
xra1403_get_direction(struct gpio_chip * chip,unsigned int offset)76 static int xra1403_get_direction(struct gpio_chip *chip, unsigned int offset)
77 {
78 	int ret;
79 	unsigned int val;
80 	struct xra1403 *xra = gpiochip_get_data(chip);
81 
82 	ret = regmap_read(xra->regmap, to_reg(XRA_GCR, offset), &val);
83 	if (ret)
84 		return ret;
85 
86 	return !!(val & BIT(offset % 8));
87 }
88 
xra1403_get(struct gpio_chip * chip,unsigned int offset)89 static int xra1403_get(struct gpio_chip *chip, unsigned int offset)
90 {
91 	int ret;
92 	unsigned int val;
93 	struct xra1403 *xra = gpiochip_get_data(chip);
94 
95 	ret = regmap_read(xra->regmap, to_reg(XRA_GSR, offset), &val);
96 	if (ret)
97 		return ret;
98 
99 	return !!(val & BIT(offset % 8));
100 }
101 
xra1403_set(struct gpio_chip * chip,unsigned int offset,int value)102 static void xra1403_set(struct gpio_chip *chip, unsigned int offset, int value)
103 {
104 	int ret;
105 	struct xra1403 *xra = gpiochip_get_data(chip);
106 
107 	ret = regmap_update_bits(xra->regmap, to_reg(XRA_OCR, offset),
108 			BIT(offset % 8), value ? BIT(offset % 8) : 0);
109 	if (ret)
110 		dev_err(chip->parent, "Failed to set pin: %d, ret: %d\n",
111 				offset, ret);
112 }
113 
114 #ifdef CONFIG_DEBUG_FS
xra1403_dbg_show(struct seq_file * s,struct gpio_chip * chip)115 static void xra1403_dbg_show(struct seq_file *s, struct gpio_chip *chip)
116 {
117 	int reg;
118 	struct xra1403 *xra = gpiochip_get_data(chip);
119 	int value[XRA_LAST];
120 	int i;
121 	unsigned int gcr;
122 	unsigned int gsr;
123 
124 	seq_puts(s, "xra reg:");
125 	for (reg = 0; reg <= XRA_LAST; reg++)
126 		seq_printf(s, " %2.2x", reg);
127 	seq_puts(s, "\n  value:");
128 	for (reg = 0; reg < XRA_LAST; reg++) {
129 		regmap_read(xra->regmap, reg, &value[reg]);
130 		seq_printf(s, " %2.2x", value[reg]);
131 	}
132 	seq_puts(s, "\n");
133 
134 	gcr = value[XRA_GCR + 1] << 8 | value[XRA_GCR];
135 	gsr = value[XRA_GSR + 1] << 8 | value[XRA_GSR];
136 	for (i = 0; i < chip->ngpio; i++) {
137 		const char *label = gpiochip_is_requested(chip, i);
138 
139 		if (!label)
140 			continue;
141 
142 		seq_printf(s, " gpio-%-3d (%-12s) %s %s\n",
143 			   chip->base + i, label,
144 			   (gcr & BIT(i)) ? "in" : "out",
145 			   (gsr & BIT(i)) ? "hi" : "lo");
146 	}
147 }
148 #else
149 #define xra1403_dbg_show NULL
150 #endif
151 
xra1403_probe(struct spi_device * spi)152 static int xra1403_probe(struct spi_device *spi)
153 {
154 	struct xra1403 *xra;
155 	struct gpio_desc *reset_gpio;
156 	int ret;
157 
158 	xra = devm_kzalloc(&spi->dev, sizeof(*xra), GFP_KERNEL);
159 	if (!xra)
160 		return -ENOMEM;
161 
162 	/* bring the chip out of reset if reset pin is provided*/
163 	reset_gpio = devm_gpiod_get_optional(&spi->dev, "reset", GPIOD_OUT_LOW);
164 	if (IS_ERR(reset_gpio))
165 		dev_warn(&spi->dev, "Could not get reset-gpios\n");
166 
167 	xra->chip.direction_input = xra1403_direction_input;
168 	xra->chip.direction_output = xra1403_direction_output;
169 	xra->chip.get_direction = xra1403_get_direction;
170 	xra->chip.get = xra1403_get;
171 	xra->chip.set = xra1403_set;
172 
173 	xra->chip.dbg_show = xra1403_dbg_show;
174 
175 	xra->chip.ngpio = 16;
176 	xra->chip.label = "xra1403";
177 
178 	xra->chip.base = -1;
179 	xra->chip.can_sleep = true;
180 	xra->chip.parent = &spi->dev;
181 	xra->chip.owner = THIS_MODULE;
182 
183 	xra->regmap = devm_regmap_init_spi(spi, &xra1403_regmap_cfg);
184 	if (IS_ERR(xra->regmap)) {
185 		ret = PTR_ERR(xra->regmap);
186 		dev_err(&spi->dev, "Failed to allocate regmap: %d\n", ret);
187 		return ret;
188 	}
189 
190 	ret = devm_gpiochip_add_data(&spi->dev, &xra->chip, xra);
191 	if (ret < 0) {
192 		dev_err(&spi->dev, "Unable to register gpiochip\n");
193 		return ret;
194 	}
195 
196 	spi_set_drvdata(spi, xra);
197 
198 	return 0;
199 }
200 
201 static const struct spi_device_id xra1403_ids[] = {
202 	{ "xra1403" },
203 	{},
204 };
205 MODULE_DEVICE_TABLE(spi, xra1403_ids);
206 
207 static const struct of_device_id xra1403_spi_of_match[] = {
208 	{ .compatible = "exar,xra1403" },
209 	{},
210 };
211 MODULE_DEVICE_TABLE(of, xra1403_spi_of_match);
212 
213 static struct spi_driver xra1403_driver = {
214 	.probe    = xra1403_probe,
215 	.id_table = xra1403_ids,
216 	.driver   = {
217 		.name           = "xra1403",
218 		.of_match_table = of_match_ptr(xra1403_spi_of_match),
219 	},
220 };
221 
222 module_spi_driver(xra1403_driver);
223 
224 MODULE_AUTHOR("Nandor Han <nandor.han@ge.com>");
225 MODULE_AUTHOR("Semi Malinen <semi.malinen@ge.com>");
226 MODULE_DESCRIPTION("GPIO expander driver for EXAR XRA1403");
227 MODULE_LICENSE("GPL v2");
228