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1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Samsung EXYNOS FIMC-LITE (camera host interface) driver
4 *
5  * Copyright (C) 2012 - 2013 Samsung Electronics Co., Ltd.
6  * Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
7  */
8 #define pr_fmt(fmt) "%s:%d " fmt, __func__, __LINE__
9 
10 #include <linux/bug.h>
11 #include <linux/clk.h>
12 #include <linux/device.h>
13 #include <linux/errno.h>
14 #include <linux/interrupt.h>
15 #include <linux/kernel.h>
16 #include <linux/list.h>
17 #include <linux/module.h>
18 #include <linux/of.h>
19 #include <linux/types.h>
20 #include <linux/platform_device.h>
21 #include <linux/pm_runtime.h>
22 #include <linux/slab.h>
23 #include <linux/videodev2.h>
24 
25 #include <media/v4l2-device.h>
26 #include <media/v4l2-ioctl.h>
27 #include <media/v4l2-mem2mem.h>
28 #include <media/videobuf2-v4l2.h>
29 #include <media/videobuf2-dma-contig.h>
30 #include <media/drv-intf/exynos-fimc.h>
31 
32 #include "common.h"
33 #include "fimc-core.h"
34 #include "fimc-lite.h"
35 #include "fimc-lite-reg.h"
36 
37 static int debug;
38 module_param(debug, int, 0644);
39 
40 static const struct fimc_fmt fimc_lite_formats[] = {
41 	{
42 		.fourcc		= V4L2_PIX_FMT_YUYV,
43 		.colorspace	= V4L2_COLORSPACE_JPEG,
44 		.depth		= { 16 },
45 		.color		= FIMC_FMT_YCBYCR422,
46 		.memplanes	= 1,
47 		.mbus_code	= MEDIA_BUS_FMT_YUYV8_2X8,
48 		.flags		= FMT_FLAGS_YUV,
49 	}, {
50 		.fourcc		= V4L2_PIX_FMT_UYVY,
51 		.colorspace	= V4L2_COLORSPACE_JPEG,
52 		.depth		= { 16 },
53 		.color		= FIMC_FMT_CBYCRY422,
54 		.memplanes	= 1,
55 		.mbus_code	= MEDIA_BUS_FMT_UYVY8_2X8,
56 		.flags		= FMT_FLAGS_YUV,
57 	}, {
58 		.fourcc		= V4L2_PIX_FMT_VYUY,
59 		.colorspace	= V4L2_COLORSPACE_JPEG,
60 		.depth		= { 16 },
61 		.color		= FIMC_FMT_CRYCBY422,
62 		.memplanes	= 1,
63 		.mbus_code	= MEDIA_BUS_FMT_VYUY8_2X8,
64 		.flags		= FMT_FLAGS_YUV,
65 	}, {
66 		.fourcc		= V4L2_PIX_FMT_YVYU,
67 		.colorspace	= V4L2_COLORSPACE_JPEG,
68 		.depth		= { 16 },
69 		.color		= FIMC_FMT_YCRYCB422,
70 		.memplanes	= 1,
71 		.mbus_code	= MEDIA_BUS_FMT_YVYU8_2X8,
72 		.flags		= FMT_FLAGS_YUV,
73 	}, {
74 		.fourcc		= V4L2_PIX_FMT_SGRBG8,
75 		.colorspace	= V4L2_COLORSPACE_SRGB,
76 		.depth		= { 8 },
77 		.color		= FIMC_FMT_RAW8,
78 		.memplanes	= 1,
79 		.mbus_code	= MEDIA_BUS_FMT_SGRBG8_1X8,
80 		.flags		= FMT_FLAGS_RAW_BAYER,
81 	}, {
82 		.fourcc		= V4L2_PIX_FMT_SGRBG10,
83 		.colorspace	= V4L2_COLORSPACE_SRGB,
84 		.depth		= { 16 },
85 		.color		= FIMC_FMT_RAW10,
86 		.memplanes	= 1,
87 		.mbus_code	= MEDIA_BUS_FMT_SGRBG10_1X10,
88 		.flags		= FMT_FLAGS_RAW_BAYER,
89 	}, {
90 		.fourcc		= V4L2_PIX_FMT_SGRBG12,
91 		.colorspace	= V4L2_COLORSPACE_SRGB,
92 		.depth		= { 16 },
93 		.color		= FIMC_FMT_RAW12,
94 		.memplanes	= 1,
95 		.mbus_code	= MEDIA_BUS_FMT_SGRBG12_1X12,
96 		.flags		= FMT_FLAGS_RAW_BAYER,
97 	},
98 };
99 
100 /**
101  * fimc_lite_find_format - lookup fimc color format by fourcc or media bus code
102  * @pixelformat: fourcc to match, ignored if null
103  * @mbus_code: media bus code to match, ignored if null
104  * @mask: the color format flags to match
105  * @index: index to the fimc_lite_formats array, ignored if negative
106  */
fimc_lite_find_format(const u32 * pixelformat,const u32 * mbus_code,unsigned int mask,int index)107 static const struct fimc_fmt *fimc_lite_find_format(const u32 *pixelformat,
108 			const u32 *mbus_code, unsigned int mask, int index)
109 {
110 	const struct fimc_fmt *fmt, *def_fmt = NULL;
111 	unsigned int i;
112 	int id = 0;
113 
114 	if (index >= (int)ARRAY_SIZE(fimc_lite_formats))
115 		return NULL;
116 
117 	for (i = 0; i < ARRAY_SIZE(fimc_lite_formats); ++i) {
118 		fmt = &fimc_lite_formats[i];
119 		if (mask && !(fmt->flags & mask))
120 			continue;
121 		if (pixelformat && fmt->fourcc == *pixelformat)
122 			return fmt;
123 		if (mbus_code && fmt->mbus_code == *mbus_code)
124 			return fmt;
125 		if (index == id)
126 			def_fmt = fmt;
127 		id++;
128 	}
129 	return def_fmt;
130 }
131 
fimc_lite_hw_init(struct fimc_lite * fimc,bool isp_output)132 static int fimc_lite_hw_init(struct fimc_lite *fimc, bool isp_output)
133 {
134 	struct fimc_source_info *si;
135 	unsigned long flags;
136 
137 	if (fimc->sensor == NULL)
138 		return -ENXIO;
139 
140 	if (fimc->inp_frame.fmt == NULL || fimc->out_frame.fmt == NULL)
141 		return -EINVAL;
142 
143 	/* Get sensor configuration data from the sensor subdev */
144 	si = v4l2_get_subdev_hostdata(fimc->sensor);
145 	if (!si)
146 		return -EINVAL;
147 
148 	spin_lock_irqsave(&fimc->slock, flags);
149 
150 	flite_hw_set_camera_bus(fimc, si);
151 	flite_hw_set_source_format(fimc, &fimc->inp_frame);
152 	flite_hw_set_window_offset(fimc, &fimc->inp_frame);
153 	flite_hw_set_dma_buf_mask(fimc, 0);
154 	flite_hw_set_output_dma(fimc, &fimc->out_frame, !isp_output);
155 	flite_hw_set_interrupt_mask(fimc);
156 	flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
157 
158 	if (debug > 0)
159 		flite_hw_dump_regs(fimc, __func__);
160 
161 	spin_unlock_irqrestore(&fimc->slock, flags);
162 	return 0;
163 }
164 
165 /*
166  * Reinitialize the driver so it is ready to start the streaming again.
167  * Set fimc->state to indicate stream off and the hardware shut down state.
168  * If not suspending (@suspend is false), return any buffers to videobuf2.
169  * Otherwise put any owned buffers onto the pending buffers queue, so they
170  * can be re-spun when the device is being resumed. Also perform FIMC
171  * software reset and disable streaming on the whole pipeline if required.
172  */
fimc_lite_reinit(struct fimc_lite * fimc,bool suspend)173 static int fimc_lite_reinit(struct fimc_lite *fimc, bool suspend)
174 {
175 	struct flite_buffer *buf;
176 	unsigned long flags;
177 	bool streaming;
178 
179 	spin_lock_irqsave(&fimc->slock, flags);
180 	streaming = fimc->state & (1 << ST_SENSOR_STREAM);
181 
182 	fimc->state &= ~(1 << ST_FLITE_RUN | 1 << ST_FLITE_OFF |
183 			 1 << ST_FLITE_STREAM | 1 << ST_SENSOR_STREAM);
184 	if (suspend)
185 		fimc->state |= (1 << ST_FLITE_SUSPENDED);
186 	else
187 		fimc->state &= ~(1 << ST_FLITE_PENDING |
188 				 1 << ST_FLITE_SUSPENDED);
189 
190 	/* Release unused buffers */
191 	while (!suspend && !list_empty(&fimc->pending_buf_q)) {
192 		buf = fimc_lite_pending_queue_pop(fimc);
193 		vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
194 	}
195 	/* If suspending put unused buffers onto pending queue */
196 	while (!list_empty(&fimc->active_buf_q)) {
197 		buf = fimc_lite_active_queue_pop(fimc);
198 		if (suspend)
199 			fimc_lite_pending_queue_add(fimc, buf);
200 		else
201 			vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
202 	}
203 
204 	spin_unlock_irqrestore(&fimc->slock, flags);
205 
206 	flite_hw_reset(fimc);
207 
208 	if (!streaming)
209 		return 0;
210 
211 	return fimc_pipeline_call(&fimc->ve, set_stream, 0);
212 }
213 
fimc_lite_stop_capture(struct fimc_lite * fimc,bool suspend)214 static int fimc_lite_stop_capture(struct fimc_lite *fimc, bool suspend)
215 {
216 	unsigned long flags;
217 
218 	if (!fimc_lite_active(fimc))
219 		return 0;
220 
221 	spin_lock_irqsave(&fimc->slock, flags);
222 	set_bit(ST_FLITE_OFF, &fimc->state);
223 	flite_hw_capture_stop(fimc);
224 	spin_unlock_irqrestore(&fimc->slock, flags);
225 
226 	wait_event_timeout(fimc->irq_queue,
227 			   !test_bit(ST_FLITE_OFF, &fimc->state),
228 			   (2*HZ/10)); /* 200 ms */
229 
230 	return fimc_lite_reinit(fimc, suspend);
231 }
232 
233 /* Must be called  with fimc.slock spinlock held. */
fimc_lite_config_update(struct fimc_lite * fimc)234 static void fimc_lite_config_update(struct fimc_lite *fimc)
235 {
236 	flite_hw_set_window_offset(fimc, &fimc->inp_frame);
237 	flite_hw_set_dma_window(fimc, &fimc->out_frame);
238 	flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
239 	clear_bit(ST_FLITE_CONFIG, &fimc->state);
240 }
241 
flite_irq_handler(int irq,void * priv)242 static irqreturn_t flite_irq_handler(int irq, void *priv)
243 {
244 	struct fimc_lite *fimc = priv;
245 	struct flite_buffer *vbuf;
246 	unsigned long flags;
247 	u32 intsrc;
248 
249 	spin_lock_irqsave(&fimc->slock, flags);
250 
251 	intsrc = flite_hw_get_interrupt_source(fimc);
252 	flite_hw_clear_pending_irq(fimc);
253 
254 	if (test_and_clear_bit(ST_FLITE_OFF, &fimc->state)) {
255 		wake_up(&fimc->irq_queue);
256 		goto done;
257 	}
258 
259 	if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_OVERFLOW) {
260 		clear_bit(ST_FLITE_RUN, &fimc->state);
261 		fimc->events.data_overflow++;
262 	}
263 
264 	if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_LASTCAPEND) {
265 		flite_hw_clear_last_capture_end(fimc);
266 		clear_bit(ST_FLITE_STREAM, &fimc->state);
267 		wake_up(&fimc->irq_queue);
268 	}
269 
270 	if (atomic_read(&fimc->out_path) != FIMC_IO_DMA)
271 		goto done;
272 
273 	if ((intsrc & FLITE_REG_CISTATUS_IRQ_SRC_FRMSTART) &&
274 	    test_bit(ST_FLITE_RUN, &fimc->state) &&
275 	    !list_empty(&fimc->pending_buf_q)) {
276 		vbuf = fimc_lite_pending_queue_pop(fimc);
277 		flite_hw_set_dma_buffer(fimc, vbuf);
278 		fimc_lite_active_queue_add(fimc, vbuf);
279 	}
280 
281 	if ((intsrc & FLITE_REG_CISTATUS_IRQ_SRC_FRMEND) &&
282 	    test_bit(ST_FLITE_RUN, &fimc->state) &&
283 	    !list_empty(&fimc->active_buf_q)) {
284 		vbuf = fimc_lite_active_queue_pop(fimc);
285 		vbuf->vb.vb2_buf.timestamp = ktime_get_ns();
286 		vbuf->vb.sequence = fimc->frame_count++;
287 		flite_hw_mask_dma_buffer(fimc, vbuf->index);
288 		vb2_buffer_done(&vbuf->vb.vb2_buf, VB2_BUF_STATE_DONE);
289 	}
290 
291 	if (test_bit(ST_FLITE_CONFIG, &fimc->state))
292 		fimc_lite_config_update(fimc);
293 
294 	if (list_empty(&fimc->pending_buf_q)) {
295 		flite_hw_capture_stop(fimc);
296 		clear_bit(ST_FLITE_STREAM, &fimc->state);
297 	}
298 done:
299 	set_bit(ST_FLITE_RUN, &fimc->state);
300 	spin_unlock_irqrestore(&fimc->slock, flags);
301 	return IRQ_HANDLED;
302 }
303 
start_streaming(struct vb2_queue * q,unsigned int count)304 static int start_streaming(struct vb2_queue *q, unsigned int count)
305 {
306 	struct fimc_lite *fimc = q->drv_priv;
307 	unsigned long flags;
308 	int ret;
309 
310 	spin_lock_irqsave(&fimc->slock, flags);
311 
312 	fimc->buf_index = 0;
313 	fimc->frame_count = 0;
314 
315 	spin_unlock_irqrestore(&fimc->slock, flags);
316 
317 	ret = fimc_lite_hw_init(fimc, false);
318 	if (ret) {
319 		fimc_lite_reinit(fimc, false);
320 		return ret;
321 	}
322 
323 	set_bit(ST_FLITE_PENDING, &fimc->state);
324 
325 	if (!list_empty(&fimc->active_buf_q) &&
326 	    !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
327 		flite_hw_capture_start(fimc);
328 
329 		if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
330 			fimc_pipeline_call(&fimc->ve, set_stream, 1);
331 	}
332 	if (debug > 0)
333 		flite_hw_dump_regs(fimc, __func__);
334 
335 	return 0;
336 }
337 
stop_streaming(struct vb2_queue * q)338 static void stop_streaming(struct vb2_queue *q)
339 {
340 	struct fimc_lite *fimc = q->drv_priv;
341 
342 	if (!fimc_lite_active(fimc))
343 		return;
344 
345 	fimc_lite_stop_capture(fimc, false);
346 }
347 
queue_setup(struct vb2_queue * vq,unsigned int * num_buffers,unsigned int * num_planes,unsigned int sizes[],struct device * alloc_devs[])348 static int queue_setup(struct vb2_queue *vq,
349 		       unsigned int *num_buffers, unsigned int *num_planes,
350 		       unsigned int sizes[], struct device *alloc_devs[])
351 {
352 	struct fimc_lite *fimc = vq->drv_priv;
353 	struct flite_frame *frame = &fimc->out_frame;
354 	const struct fimc_fmt *fmt = frame->fmt;
355 	unsigned long wh = frame->f_width * frame->f_height;
356 	int i;
357 
358 	if (fmt == NULL)
359 		return -EINVAL;
360 
361 	if (*num_planes) {
362 		if (*num_planes != fmt->memplanes)
363 			return -EINVAL;
364 		for (i = 0; i < *num_planes; i++)
365 			if (sizes[i] < (wh * fmt->depth[i]) / 8)
366 				return -EINVAL;
367 		return 0;
368 	}
369 
370 	*num_planes = fmt->memplanes;
371 
372 	for (i = 0; i < fmt->memplanes; i++)
373 		sizes[i] = (wh * fmt->depth[i]) / 8;
374 
375 	return 0;
376 }
377 
buffer_prepare(struct vb2_buffer * vb)378 static int buffer_prepare(struct vb2_buffer *vb)
379 {
380 	struct vb2_queue *vq = vb->vb2_queue;
381 	struct fimc_lite *fimc = vq->drv_priv;
382 	int i;
383 
384 	if (fimc->out_frame.fmt == NULL)
385 		return -EINVAL;
386 
387 	for (i = 0; i < fimc->out_frame.fmt->memplanes; i++) {
388 		unsigned long size = fimc->payload[i];
389 
390 		if (vb2_plane_size(vb, i) < size) {
391 			v4l2_err(&fimc->ve.vdev,
392 				 "User buffer too small (%ld < %ld)\n",
393 				 vb2_plane_size(vb, i), size);
394 			return -EINVAL;
395 		}
396 		vb2_set_plane_payload(vb, i, size);
397 	}
398 
399 	return 0;
400 }
401 
buffer_queue(struct vb2_buffer * vb)402 static void buffer_queue(struct vb2_buffer *vb)
403 {
404 	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
405 	struct flite_buffer *buf
406 		= container_of(vbuf, struct flite_buffer, vb);
407 	struct fimc_lite *fimc = vb2_get_drv_priv(vb->vb2_queue);
408 	unsigned long flags;
409 
410 	spin_lock_irqsave(&fimc->slock, flags);
411 	buf->paddr = vb2_dma_contig_plane_dma_addr(vb, 0);
412 
413 	buf->index = fimc->buf_index++;
414 	if (fimc->buf_index >= fimc->reqbufs_count)
415 		fimc->buf_index = 0;
416 
417 	if (!test_bit(ST_FLITE_SUSPENDED, &fimc->state) &&
418 	    !test_bit(ST_FLITE_STREAM, &fimc->state) &&
419 	    list_empty(&fimc->active_buf_q)) {
420 		flite_hw_set_dma_buffer(fimc, buf);
421 		fimc_lite_active_queue_add(fimc, buf);
422 	} else {
423 		fimc_lite_pending_queue_add(fimc, buf);
424 	}
425 
426 	if (vb2_is_streaming(&fimc->vb_queue) &&
427 	    !list_empty(&fimc->pending_buf_q) &&
428 	    !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
429 		flite_hw_capture_start(fimc);
430 		spin_unlock_irqrestore(&fimc->slock, flags);
431 
432 		if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
433 			fimc_pipeline_call(&fimc->ve, set_stream, 1);
434 		return;
435 	}
436 	spin_unlock_irqrestore(&fimc->slock, flags);
437 }
438 
439 static const struct vb2_ops fimc_lite_qops = {
440 	.queue_setup	 = queue_setup,
441 	.buf_prepare	 = buffer_prepare,
442 	.buf_queue	 = buffer_queue,
443 	.wait_prepare	 = vb2_ops_wait_prepare,
444 	.wait_finish	 = vb2_ops_wait_finish,
445 	.start_streaming = start_streaming,
446 	.stop_streaming	 = stop_streaming,
447 };
448 
fimc_lite_clear_event_counters(struct fimc_lite * fimc)449 static void fimc_lite_clear_event_counters(struct fimc_lite *fimc)
450 {
451 	unsigned long flags;
452 
453 	spin_lock_irqsave(&fimc->slock, flags);
454 	memset(&fimc->events, 0, sizeof(fimc->events));
455 	spin_unlock_irqrestore(&fimc->slock, flags);
456 }
457 
fimc_lite_open(struct file * file)458 static int fimc_lite_open(struct file *file)
459 {
460 	struct fimc_lite *fimc = video_drvdata(file);
461 	struct media_entity *me = &fimc->ve.vdev.entity;
462 	int ret;
463 
464 	mutex_lock(&fimc->lock);
465 	if (atomic_read(&fimc->out_path) != FIMC_IO_DMA) {
466 		ret = -EBUSY;
467 		goto unlock;
468 	}
469 
470 	set_bit(ST_FLITE_IN_USE, &fimc->state);
471 	ret = pm_runtime_get_sync(&fimc->pdev->dev);
472 	if (ret < 0)
473 		goto unlock;
474 
475 	ret = v4l2_fh_open(file);
476 	if (ret < 0)
477 		goto err_pm;
478 
479 	if (!v4l2_fh_is_singular_file(file) ||
480 	    atomic_read(&fimc->out_path) != FIMC_IO_DMA)
481 		goto unlock;
482 
483 	mutex_lock(&me->graph_obj.mdev->graph_mutex);
484 
485 	ret = fimc_pipeline_call(&fimc->ve, open, me, true);
486 
487 	/* Mark video pipeline ending at this video node as in use. */
488 	if (ret == 0)
489 		me->use_count++;
490 
491 	mutex_unlock(&me->graph_obj.mdev->graph_mutex);
492 
493 	if (!ret) {
494 		fimc_lite_clear_event_counters(fimc);
495 		goto unlock;
496 	}
497 
498 	v4l2_fh_release(file);
499 err_pm:
500 	pm_runtime_put_sync(&fimc->pdev->dev);
501 	clear_bit(ST_FLITE_IN_USE, &fimc->state);
502 unlock:
503 	mutex_unlock(&fimc->lock);
504 	return ret;
505 }
506 
fimc_lite_release(struct file * file)507 static int fimc_lite_release(struct file *file)
508 {
509 	struct fimc_lite *fimc = video_drvdata(file);
510 	struct media_entity *entity = &fimc->ve.vdev.entity;
511 
512 	mutex_lock(&fimc->lock);
513 
514 	if (v4l2_fh_is_singular_file(file) &&
515 	    atomic_read(&fimc->out_path) == FIMC_IO_DMA) {
516 		if (fimc->streaming) {
517 			media_pipeline_stop(entity);
518 			fimc->streaming = false;
519 		}
520 		fimc_lite_stop_capture(fimc, false);
521 		fimc_pipeline_call(&fimc->ve, close);
522 		clear_bit(ST_FLITE_IN_USE, &fimc->state);
523 
524 		mutex_lock(&entity->graph_obj.mdev->graph_mutex);
525 		entity->use_count--;
526 		mutex_unlock(&entity->graph_obj.mdev->graph_mutex);
527 	}
528 
529 	_vb2_fop_release(file, NULL);
530 	pm_runtime_put(&fimc->pdev->dev);
531 	clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
532 
533 	mutex_unlock(&fimc->lock);
534 	return 0;
535 }
536 
537 static const struct v4l2_file_operations fimc_lite_fops = {
538 	.owner		= THIS_MODULE,
539 	.open		= fimc_lite_open,
540 	.release	= fimc_lite_release,
541 	.poll		= vb2_fop_poll,
542 	.unlocked_ioctl	= video_ioctl2,
543 	.mmap		= vb2_fop_mmap,
544 };
545 
546 /*
547  * Format and crop negotiation helpers
548  */
549 
fimc_lite_subdev_try_fmt(struct fimc_lite * fimc,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * format)550 static const struct fimc_fmt *fimc_lite_subdev_try_fmt(struct fimc_lite *fimc,
551 					struct v4l2_subdev_pad_config *cfg,
552 					struct v4l2_subdev_format *format)
553 {
554 	struct flite_drvdata *dd = fimc->dd;
555 	struct v4l2_mbus_framefmt *mf = &format->format;
556 	const struct fimc_fmt *fmt = NULL;
557 
558 	if (format->pad == FLITE_SD_PAD_SINK) {
559 		v4l_bound_align_image(&mf->width, 8, dd->max_width,
560 				ffs(dd->out_width_align) - 1,
561 				&mf->height, 0, dd->max_height, 0, 0);
562 
563 		fmt = fimc_lite_find_format(NULL, &mf->code, 0, 0);
564 		if (WARN_ON(!fmt))
565 			return NULL;
566 
567 		mf->colorspace = fmt->colorspace;
568 		mf->code = fmt->mbus_code;
569 	} else {
570 		struct flite_frame *sink = &fimc->inp_frame;
571 		struct v4l2_mbus_framefmt *sink_fmt;
572 		struct v4l2_rect *rect;
573 
574 		if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
575 			sink_fmt = v4l2_subdev_get_try_format(&fimc->subdev, cfg,
576 						FLITE_SD_PAD_SINK);
577 
578 			mf->code = sink_fmt->code;
579 			mf->colorspace = sink_fmt->colorspace;
580 
581 			rect = v4l2_subdev_get_try_crop(&fimc->subdev, cfg,
582 						FLITE_SD_PAD_SINK);
583 		} else {
584 			mf->code = sink->fmt->mbus_code;
585 			mf->colorspace = sink->fmt->colorspace;
586 			rect = &sink->rect;
587 		}
588 
589 		/* Allow changing format only on sink pad */
590 		mf->width = rect->width;
591 		mf->height = rect->height;
592 	}
593 
594 	mf->field = V4L2_FIELD_NONE;
595 
596 	v4l2_dbg(1, debug, &fimc->subdev, "code: %#x (%d), %dx%d\n",
597 		 mf->code, mf->colorspace, mf->width, mf->height);
598 
599 	return fmt;
600 }
601 
fimc_lite_try_crop(struct fimc_lite * fimc,struct v4l2_rect * r)602 static void fimc_lite_try_crop(struct fimc_lite *fimc, struct v4l2_rect *r)
603 {
604 	struct flite_frame *frame = &fimc->inp_frame;
605 
606 	v4l_bound_align_image(&r->width, 0, frame->f_width, 0,
607 			      &r->height, 0, frame->f_height, 0, 0);
608 
609 	/* Adjust left/top if cropping rectangle got out of bounds */
610 	r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
611 	r->left = round_down(r->left, fimc->dd->win_hor_offs_align);
612 	r->top  = clamp_t(u32, r->top, 0, frame->f_height - r->height);
613 
614 	v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, sink fmt: %dx%d\n",
615 		 r->left, r->top, r->width, r->height,
616 		 frame->f_width, frame->f_height);
617 }
618 
fimc_lite_try_compose(struct fimc_lite * fimc,struct v4l2_rect * r)619 static void fimc_lite_try_compose(struct fimc_lite *fimc, struct v4l2_rect *r)
620 {
621 	struct flite_frame *frame = &fimc->out_frame;
622 	struct v4l2_rect *crop_rect = &fimc->inp_frame.rect;
623 
624 	/* Scaling is not supported so we enforce compose rectangle size
625 	   same as size of the sink crop rectangle. */
626 	r->width = crop_rect->width;
627 	r->height = crop_rect->height;
628 
629 	/* Adjust left/top if the composing rectangle got out of bounds */
630 	r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
631 	r->left = round_down(r->left, fimc->dd->out_hor_offs_align);
632 	r->top  = clamp_t(u32, r->top, 0, fimc->out_frame.f_height - r->height);
633 
634 	v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, source fmt: %dx%d\n",
635 		 r->left, r->top, r->width, r->height,
636 		 frame->f_width, frame->f_height);
637 }
638 
639 /*
640  * Video node ioctl operations
641  */
fimc_lite_querycap(struct file * file,void * priv,struct v4l2_capability * cap)642 static int fimc_lite_querycap(struct file *file, void *priv,
643 					struct v4l2_capability *cap)
644 {
645 	struct fimc_lite *fimc = video_drvdata(file);
646 
647 	strscpy(cap->driver, FIMC_LITE_DRV_NAME, sizeof(cap->driver));
648 	strscpy(cap->card, FIMC_LITE_DRV_NAME, sizeof(cap->card));
649 	snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s",
650 					dev_name(&fimc->pdev->dev));
651 	return 0;
652 }
653 
fimc_lite_enum_fmt(struct file * file,void * priv,struct v4l2_fmtdesc * f)654 static int fimc_lite_enum_fmt(struct file *file, void *priv,
655 			      struct v4l2_fmtdesc *f)
656 {
657 	const struct fimc_fmt *fmt;
658 
659 	if (f->index >= ARRAY_SIZE(fimc_lite_formats))
660 		return -EINVAL;
661 
662 	fmt = &fimc_lite_formats[f->index];
663 	f->pixelformat = fmt->fourcc;
664 
665 	return 0;
666 }
667 
fimc_lite_g_fmt_mplane(struct file * file,void * fh,struct v4l2_format * f)668 static int fimc_lite_g_fmt_mplane(struct file *file, void *fh,
669 				  struct v4l2_format *f)
670 {
671 	struct fimc_lite *fimc = video_drvdata(file);
672 	struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
673 	struct v4l2_plane_pix_format *plane_fmt = &pixm->plane_fmt[0];
674 	struct flite_frame *frame = &fimc->out_frame;
675 	const struct fimc_fmt *fmt = frame->fmt;
676 
677 	plane_fmt->bytesperline = (frame->f_width * fmt->depth[0]) / 8;
678 	plane_fmt->sizeimage = plane_fmt->bytesperline * frame->f_height;
679 
680 	pixm->num_planes = fmt->memplanes;
681 	pixm->pixelformat = fmt->fourcc;
682 	pixm->width = frame->f_width;
683 	pixm->height = frame->f_height;
684 	pixm->field = V4L2_FIELD_NONE;
685 	pixm->colorspace = fmt->colorspace;
686 	return 0;
687 }
688 
fimc_lite_try_fmt(struct fimc_lite * fimc,struct v4l2_pix_format_mplane * pixm,const struct fimc_fmt ** ffmt)689 static int fimc_lite_try_fmt(struct fimc_lite *fimc,
690 			     struct v4l2_pix_format_mplane *pixm,
691 			     const struct fimc_fmt **ffmt)
692 {
693 	u32 bpl = pixm->plane_fmt[0].bytesperline;
694 	struct flite_drvdata *dd = fimc->dd;
695 	const struct fimc_fmt *inp_fmt = fimc->inp_frame.fmt;
696 	const struct fimc_fmt *fmt;
697 
698 	if (WARN_ON(inp_fmt == NULL))
699 		return -EINVAL;
700 	/*
701 	 * We allow some flexibility only for YUV formats. In case of raw
702 	 * raw Bayer the FIMC-LITE's output format must match its camera
703 	 * interface input format.
704 	 */
705 	if (inp_fmt->flags & FMT_FLAGS_YUV)
706 		fmt = fimc_lite_find_format(&pixm->pixelformat, NULL,
707 						inp_fmt->flags, 0);
708 	else
709 		fmt = inp_fmt;
710 
711 	if (WARN_ON(fmt == NULL))
712 		return -EINVAL;
713 	if (ffmt)
714 		*ffmt = fmt;
715 	v4l_bound_align_image(&pixm->width, 8, dd->max_width,
716 			      ffs(dd->out_width_align) - 1,
717 			      &pixm->height, 0, dd->max_height, 0, 0);
718 
719 	if ((bpl == 0 || ((bpl * 8) / fmt->depth[0]) < pixm->width))
720 		pixm->plane_fmt[0].bytesperline = (pixm->width *
721 						   fmt->depth[0]) / 8;
722 
723 	if (pixm->plane_fmt[0].sizeimage == 0)
724 		pixm->plane_fmt[0].sizeimage = (pixm->width * pixm->height *
725 						fmt->depth[0]) / 8;
726 	pixm->num_planes = fmt->memplanes;
727 	pixm->pixelformat = fmt->fourcc;
728 	pixm->colorspace = fmt->colorspace;
729 	pixm->field = V4L2_FIELD_NONE;
730 	return 0;
731 }
732 
fimc_lite_try_fmt_mplane(struct file * file,void * fh,struct v4l2_format * f)733 static int fimc_lite_try_fmt_mplane(struct file *file, void *fh,
734 				    struct v4l2_format *f)
735 {
736 	struct fimc_lite *fimc = video_drvdata(file);
737 	return fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, NULL);
738 }
739 
fimc_lite_s_fmt_mplane(struct file * file,void * priv,struct v4l2_format * f)740 static int fimc_lite_s_fmt_mplane(struct file *file, void *priv,
741 				  struct v4l2_format *f)
742 {
743 	struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
744 	struct fimc_lite *fimc = video_drvdata(file);
745 	struct flite_frame *frame = &fimc->out_frame;
746 	const struct fimc_fmt *fmt = NULL;
747 	int ret;
748 
749 	if (vb2_is_busy(&fimc->vb_queue))
750 		return -EBUSY;
751 
752 	ret = fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, &fmt);
753 	if (ret < 0)
754 		return ret;
755 
756 	frame->fmt = fmt;
757 	fimc->payload[0] = max((pixm->width * pixm->height * fmt->depth[0]) / 8,
758 			       pixm->plane_fmt[0].sizeimage);
759 	frame->f_width = pixm->width;
760 	frame->f_height = pixm->height;
761 
762 	return 0;
763 }
764 
fimc_pipeline_validate(struct fimc_lite * fimc)765 static int fimc_pipeline_validate(struct fimc_lite *fimc)
766 {
767 	struct v4l2_subdev *sd = &fimc->subdev;
768 	struct v4l2_subdev_format sink_fmt, src_fmt;
769 	struct media_pad *pad;
770 	int ret;
771 
772 	while (1) {
773 		/* Retrieve format at the sink pad */
774 		pad = &sd->entity.pads[0];
775 		if (!(pad->flags & MEDIA_PAD_FL_SINK))
776 			break;
777 		/* Don't call FIMC subdev operation to avoid nested locking */
778 		if (sd == &fimc->subdev) {
779 			struct flite_frame *ff = &fimc->out_frame;
780 			sink_fmt.format.width = ff->f_width;
781 			sink_fmt.format.height = ff->f_height;
782 			sink_fmt.format.code = fimc->inp_frame.fmt->mbus_code;
783 		} else {
784 			sink_fmt.pad = pad->index;
785 			sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
786 			ret = v4l2_subdev_call(sd, pad, get_fmt, NULL,
787 					       &sink_fmt);
788 			if (ret < 0 && ret != -ENOIOCTLCMD)
789 				return -EPIPE;
790 		}
791 		/* Retrieve format at the source pad */
792 		pad = media_entity_remote_pad(pad);
793 		if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
794 			break;
795 
796 		sd = media_entity_to_v4l2_subdev(pad->entity);
797 		src_fmt.pad = pad->index;
798 		src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
799 		ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
800 		if (ret < 0 && ret != -ENOIOCTLCMD)
801 			return -EPIPE;
802 
803 		if (src_fmt.format.width != sink_fmt.format.width ||
804 		    src_fmt.format.height != sink_fmt.format.height ||
805 		    src_fmt.format.code != sink_fmt.format.code)
806 			return -EPIPE;
807 	}
808 	return 0;
809 }
810 
fimc_lite_streamon(struct file * file,void * priv,enum v4l2_buf_type type)811 static int fimc_lite_streamon(struct file *file, void *priv,
812 			      enum v4l2_buf_type type)
813 {
814 	struct fimc_lite *fimc = video_drvdata(file);
815 	struct media_entity *entity = &fimc->ve.vdev.entity;
816 	int ret;
817 
818 	if (fimc_lite_active(fimc))
819 		return -EBUSY;
820 
821 	ret = media_pipeline_start(entity, &fimc->ve.pipe->mp);
822 	if (ret < 0)
823 		return ret;
824 
825 	ret = fimc_pipeline_validate(fimc);
826 	if (ret < 0)
827 		goto err_p_stop;
828 
829 	fimc->sensor = fimc_find_remote_sensor(&fimc->subdev.entity);
830 
831 	ret = vb2_ioctl_streamon(file, priv, type);
832 	if (!ret) {
833 		fimc->streaming = true;
834 		return ret;
835 	}
836 
837 err_p_stop:
838 	media_pipeline_stop(entity);
839 	return 0;
840 }
841 
fimc_lite_streamoff(struct file * file,void * priv,enum v4l2_buf_type type)842 static int fimc_lite_streamoff(struct file *file, void *priv,
843 			       enum v4l2_buf_type type)
844 {
845 	struct fimc_lite *fimc = video_drvdata(file);
846 	int ret;
847 
848 	ret = vb2_ioctl_streamoff(file, priv, type);
849 	if (ret < 0)
850 		return ret;
851 
852 	media_pipeline_stop(&fimc->ve.vdev.entity);
853 	fimc->streaming = false;
854 	return 0;
855 }
856 
fimc_lite_reqbufs(struct file * file,void * priv,struct v4l2_requestbuffers * reqbufs)857 static int fimc_lite_reqbufs(struct file *file, void *priv,
858 			     struct v4l2_requestbuffers *reqbufs)
859 {
860 	struct fimc_lite *fimc = video_drvdata(file);
861 	int ret;
862 
863 	reqbufs->count = max_t(u32, FLITE_REQ_BUFS_MIN, reqbufs->count);
864 	ret = vb2_ioctl_reqbufs(file, priv, reqbufs);
865 	if (!ret)
866 		fimc->reqbufs_count = reqbufs->count;
867 
868 	return ret;
869 }
870 
871 /* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */
enclosed_rectangle(struct v4l2_rect * a,struct v4l2_rect * b)872 static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
873 {
874 	if (a->left < b->left || a->top < b->top)
875 		return 0;
876 	if (a->left + a->width > b->left + b->width)
877 		return 0;
878 	if (a->top + a->height > b->top + b->height)
879 		return 0;
880 
881 	return 1;
882 }
883 
fimc_lite_g_selection(struct file * file,void * fh,struct v4l2_selection * sel)884 static int fimc_lite_g_selection(struct file *file, void *fh,
885 				 struct v4l2_selection *sel)
886 {
887 	struct fimc_lite *fimc = video_drvdata(file);
888 	struct flite_frame *f = &fimc->out_frame;
889 
890 	if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
891 		return -EINVAL;
892 
893 	switch (sel->target) {
894 	case V4L2_SEL_TGT_COMPOSE_BOUNDS:
895 	case V4L2_SEL_TGT_COMPOSE_DEFAULT:
896 		sel->r.left = 0;
897 		sel->r.top = 0;
898 		sel->r.width = f->f_width;
899 		sel->r.height = f->f_height;
900 		return 0;
901 
902 	case V4L2_SEL_TGT_COMPOSE:
903 		sel->r = f->rect;
904 		return 0;
905 	}
906 
907 	return -EINVAL;
908 }
909 
fimc_lite_s_selection(struct file * file,void * fh,struct v4l2_selection * sel)910 static int fimc_lite_s_selection(struct file *file, void *fh,
911 				 struct v4l2_selection *sel)
912 {
913 	struct fimc_lite *fimc = video_drvdata(file);
914 	struct flite_frame *f = &fimc->out_frame;
915 	struct v4l2_rect rect = sel->r;
916 	unsigned long flags;
917 
918 	if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE ||
919 	    sel->target != V4L2_SEL_TGT_COMPOSE)
920 		return -EINVAL;
921 
922 	fimc_lite_try_compose(fimc, &rect);
923 
924 	if ((sel->flags & V4L2_SEL_FLAG_LE) &&
925 	    !enclosed_rectangle(&rect, &sel->r))
926 		return -ERANGE;
927 
928 	if ((sel->flags & V4L2_SEL_FLAG_GE) &&
929 	    !enclosed_rectangle(&sel->r, &rect))
930 		return -ERANGE;
931 
932 	sel->r = rect;
933 	spin_lock_irqsave(&fimc->slock, flags);
934 	f->rect = rect;
935 	set_bit(ST_FLITE_CONFIG, &fimc->state);
936 	spin_unlock_irqrestore(&fimc->slock, flags);
937 
938 	return 0;
939 }
940 
941 static const struct v4l2_ioctl_ops fimc_lite_ioctl_ops = {
942 	.vidioc_querycap		= fimc_lite_querycap,
943 	.vidioc_enum_fmt_vid_cap	= fimc_lite_enum_fmt,
944 	.vidioc_try_fmt_vid_cap_mplane	= fimc_lite_try_fmt_mplane,
945 	.vidioc_s_fmt_vid_cap_mplane	= fimc_lite_s_fmt_mplane,
946 	.vidioc_g_fmt_vid_cap_mplane	= fimc_lite_g_fmt_mplane,
947 	.vidioc_g_selection		= fimc_lite_g_selection,
948 	.vidioc_s_selection		= fimc_lite_s_selection,
949 	.vidioc_reqbufs			= fimc_lite_reqbufs,
950 	.vidioc_querybuf		= vb2_ioctl_querybuf,
951 	.vidioc_prepare_buf		= vb2_ioctl_prepare_buf,
952 	.vidioc_create_bufs		= vb2_ioctl_create_bufs,
953 	.vidioc_qbuf			= vb2_ioctl_qbuf,
954 	.vidioc_dqbuf			= vb2_ioctl_dqbuf,
955 	.vidioc_streamon		= fimc_lite_streamon,
956 	.vidioc_streamoff		= fimc_lite_streamoff,
957 };
958 
959 /* Capture subdev media entity operations */
fimc_lite_link_setup(struct media_entity * entity,const struct media_pad * local,const struct media_pad * remote,u32 flags)960 static int fimc_lite_link_setup(struct media_entity *entity,
961 				const struct media_pad *local,
962 				const struct media_pad *remote, u32 flags)
963 {
964 	struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
965 	struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
966 	int ret = 0;
967 
968 	if (WARN_ON(fimc == NULL))
969 		return 0;
970 
971 	v4l2_dbg(1, debug, sd, "%s: %s --> %s, flags: 0x%x. source_id: 0x%x\n",
972 		 __func__, remote->entity->name, local->entity->name,
973 		 flags, fimc->source_subdev_grp_id);
974 
975 	switch (local->index) {
976 	case FLITE_SD_PAD_SINK:
977 		if (flags & MEDIA_LNK_FL_ENABLED) {
978 			if (fimc->source_subdev_grp_id == 0)
979 				fimc->source_subdev_grp_id = sd->grp_id;
980 			else
981 				ret = -EBUSY;
982 		} else {
983 			fimc->source_subdev_grp_id = 0;
984 			fimc->sensor = NULL;
985 		}
986 		break;
987 
988 	case FLITE_SD_PAD_SOURCE_DMA:
989 		if (!(flags & MEDIA_LNK_FL_ENABLED))
990 			atomic_set(&fimc->out_path, FIMC_IO_NONE);
991 		else
992 			atomic_set(&fimc->out_path, FIMC_IO_DMA);
993 		break;
994 
995 	case FLITE_SD_PAD_SOURCE_ISP:
996 		if (!(flags & MEDIA_LNK_FL_ENABLED))
997 			atomic_set(&fimc->out_path, FIMC_IO_NONE);
998 		else
999 			atomic_set(&fimc->out_path, FIMC_IO_ISP);
1000 		break;
1001 
1002 	default:
1003 		v4l2_err(sd, "Invalid pad index\n");
1004 		ret = -EINVAL;
1005 	}
1006 	mb();
1007 
1008 	return ret;
1009 }
1010 
1011 static const struct media_entity_operations fimc_lite_subdev_media_ops = {
1012 	.link_setup = fimc_lite_link_setup,
1013 };
1014 
fimc_lite_subdev_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)1015 static int fimc_lite_subdev_enum_mbus_code(struct v4l2_subdev *sd,
1016 					   struct v4l2_subdev_pad_config *cfg,
1017 					   struct v4l2_subdev_mbus_code_enum *code)
1018 {
1019 	const struct fimc_fmt *fmt;
1020 
1021 	fmt = fimc_lite_find_format(NULL, NULL, 0, code->index);
1022 	if (!fmt)
1023 		return -EINVAL;
1024 	code->code = fmt->mbus_code;
1025 	return 0;
1026 }
1027 
__fimc_lite_subdev_get_try_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,unsigned int pad)1028 static struct v4l2_mbus_framefmt *__fimc_lite_subdev_get_try_fmt(
1029 		struct v4l2_subdev *sd,
1030 		struct v4l2_subdev_pad_config *cfg, unsigned int pad)
1031 {
1032 	if (pad != FLITE_SD_PAD_SINK)
1033 		pad = FLITE_SD_PAD_SOURCE_DMA;
1034 
1035 	return v4l2_subdev_get_try_format(sd, cfg, pad);
1036 }
1037 
fimc_lite_subdev_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)1038 static int fimc_lite_subdev_get_fmt(struct v4l2_subdev *sd,
1039 				    struct v4l2_subdev_pad_config *cfg,
1040 				    struct v4l2_subdev_format *fmt)
1041 {
1042 	struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1043 	struct v4l2_mbus_framefmt *mf = &fmt->format;
1044 	struct flite_frame *f = &fimc->inp_frame;
1045 
1046 	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1047 		mf = __fimc_lite_subdev_get_try_fmt(sd, cfg, fmt->pad);
1048 		fmt->format = *mf;
1049 		return 0;
1050 	}
1051 
1052 	mutex_lock(&fimc->lock);
1053 	mf->colorspace = f->fmt->colorspace;
1054 	mf->code = f->fmt->mbus_code;
1055 
1056 	if (fmt->pad == FLITE_SD_PAD_SINK) {
1057 		/* full camera input frame size */
1058 		mf->width = f->f_width;
1059 		mf->height = f->f_height;
1060 	} else {
1061 		/* crop size */
1062 		mf->width = f->rect.width;
1063 		mf->height = f->rect.height;
1064 	}
1065 	mutex_unlock(&fimc->lock);
1066 	return 0;
1067 }
1068 
fimc_lite_subdev_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)1069 static int fimc_lite_subdev_set_fmt(struct v4l2_subdev *sd,
1070 				    struct v4l2_subdev_pad_config *cfg,
1071 				    struct v4l2_subdev_format *fmt)
1072 {
1073 	struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1074 	struct v4l2_mbus_framefmt *mf = &fmt->format;
1075 	struct flite_frame *sink = &fimc->inp_frame;
1076 	struct flite_frame *source = &fimc->out_frame;
1077 	const struct fimc_fmt *ffmt;
1078 
1079 	v4l2_dbg(1, debug, sd, "pad%d: code: 0x%x, %dx%d\n",
1080 		 fmt->pad, mf->code, mf->width, mf->height);
1081 
1082 	mutex_lock(&fimc->lock);
1083 
1084 	if ((atomic_read(&fimc->out_path) == FIMC_IO_ISP &&
1085 	    sd->entity.stream_count > 0) ||
1086 	    (atomic_read(&fimc->out_path) == FIMC_IO_DMA &&
1087 	    vb2_is_busy(&fimc->vb_queue))) {
1088 		mutex_unlock(&fimc->lock);
1089 		return -EBUSY;
1090 	}
1091 
1092 	ffmt = fimc_lite_subdev_try_fmt(fimc, cfg, fmt);
1093 
1094 	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1095 		struct v4l2_mbus_framefmt *src_fmt;
1096 
1097 		mf = __fimc_lite_subdev_get_try_fmt(sd, cfg, fmt->pad);
1098 		*mf = fmt->format;
1099 
1100 		if (fmt->pad == FLITE_SD_PAD_SINK) {
1101 			unsigned int pad = FLITE_SD_PAD_SOURCE_DMA;
1102 			src_fmt = __fimc_lite_subdev_get_try_fmt(sd, cfg, pad);
1103 			*src_fmt = *mf;
1104 		}
1105 
1106 		mutex_unlock(&fimc->lock);
1107 		return 0;
1108 	}
1109 
1110 	if (fmt->pad == FLITE_SD_PAD_SINK) {
1111 		sink->f_width = mf->width;
1112 		sink->f_height = mf->height;
1113 		sink->fmt = ffmt;
1114 		/* Set sink crop rectangle */
1115 		sink->rect.width = mf->width;
1116 		sink->rect.height = mf->height;
1117 		sink->rect.left = 0;
1118 		sink->rect.top = 0;
1119 		/* Reset source format and crop rectangle */
1120 		source->rect = sink->rect;
1121 		source->f_width = mf->width;
1122 		source->f_height = mf->height;
1123 	}
1124 
1125 	mutex_unlock(&fimc->lock);
1126 	return 0;
1127 }
1128 
fimc_lite_subdev_get_selection(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_selection * sel)1129 static int fimc_lite_subdev_get_selection(struct v4l2_subdev *sd,
1130 					  struct v4l2_subdev_pad_config *cfg,
1131 					  struct v4l2_subdev_selection *sel)
1132 {
1133 	struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1134 	struct flite_frame *f = &fimc->inp_frame;
1135 
1136 	if ((sel->target != V4L2_SEL_TGT_CROP &&
1137 	     sel->target != V4L2_SEL_TGT_CROP_BOUNDS) ||
1138 	     sel->pad != FLITE_SD_PAD_SINK)
1139 		return -EINVAL;
1140 
1141 	if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
1142 		sel->r = *v4l2_subdev_get_try_crop(sd, cfg, sel->pad);
1143 		return 0;
1144 	}
1145 
1146 	mutex_lock(&fimc->lock);
1147 	if (sel->target == V4L2_SEL_TGT_CROP) {
1148 		sel->r = f->rect;
1149 	} else {
1150 		sel->r.left = 0;
1151 		sel->r.top = 0;
1152 		sel->r.width = f->f_width;
1153 		sel->r.height = f->f_height;
1154 	}
1155 	mutex_unlock(&fimc->lock);
1156 
1157 	v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d\n",
1158 		 __func__, f->rect.left, f->rect.top, f->rect.width,
1159 		 f->rect.height, f->f_width, f->f_height);
1160 
1161 	return 0;
1162 }
1163 
fimc_lite_subdev_set_selection(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_selection * sel)1164 static int fimc_lite_subdev_set_selection(struct v4l2_subdev *sd,
1165 					  struct v4l2_subdev_pad_config *cfg,
1166 					  struct v4l2_subdev_selection *sel)
1167 {
1168 	struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1169 	struct flite_frame *f = &fimc->inp_frame;
1170 	int ret = 0;
1171 
1172 	if (sel->target != V4L2_SEL_TGT_CROP || sel->pad != FLITE_SD_PAD_SINK)
1173 		return -EINVAL;
1174 
1175 	mutex_lock(&fimc->lock);
1176 	fimc_lite_try_crop(fimc, &sel->r);
1177 
1178 	if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
1179 		*v4l2_subdev_get_try_crop(sd, cfg, sel->pad) = sel->r;
1180 	} else {
1181 		unsigned long flags;
1182 		spin_lock_irqsave(&fimc->slock, flags);
1183 		f->rect = sel->r;
1184 		/* Same crop rectangle on the source pad */
1185 		fimc->out_frame.rect = sel->r;
1186 		set_bit(ST_FLITE_CONFIG, &fimc->state);
1187 		spin_unlock_irqrestore(&fimc->slock, flags);
1188 	}
1189 	mutex_unlock(&fimc->lock);
1190 
1191 	v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d\n",
1192 		 __func__, f->rect.left, f->rect.top, f->rect.width,
1193 		 f->rect.height, f->f_width, f->f_height);
1194 
1195 	return ret;
1196 }
1197 
fimc_lite_subdev_s_stream(struct v4l2_subdev * sd,int on)1198 static int fimc_lite_subdev_s_stream(struct v4l2_subdev *sd, int on)
1199 {
1200 	struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1201 	unsigned long flags;
1202 	int ret;
1203 
1204 	/*
1205 	 * Find sensor subdev linked to FIMC-LITE directly or through
1206 	 * MIPI-CSIS. This is required for configuration where FIMC-LITE
1207 	 * is used as a subdev only and feeds data internally to FIMC-IS.
1208 	 * The pipeline links are protected through entity.stream_count
1209 	 * so there is no need to take the media graph mutex here.
1210 	 */
1211 	fimc->sensor = fimc_find_remote_sensor(&sd->entity);
1212 
1213 	if (atomic_read(&fimc->out_path) != FIMC_IO_ISP)
1214 		return -ENOIOCTLCMD;
1215 
1216 	mutex_lock(&fimc->lock);
1217 	if (on) {
1218 		flite_hw_reset(fimc);
1219 		ret = fimc_lite_hw_init(fimc, true);
1220 		if (!ret) {
1221 			spin_lock_irqsave(&fimc->slock, flags);
1222 			flite_hw_capture_start(fimc);
1223 			spin_unlock_irqrestore(&fimc->slock, flags);
1224 		}
1225 	} else {
1226 		set_bit(ST_FLITE_OFF, &fimc->state);
1227 
1228 		spin_lock_irqsave(&fimc->slock, flags);
1229 		flite_hw_capture_stop(fimc);
1230 		spin_unlock_irqrestore(&fimc->slock, flags);
1231 
1232 		ret = wait_event_timeout(fimc->irq_queue,
1233 				!test_bit(ST_FLITE_OFF, &fimc->state),
1234 				msecs_to_jiffies(200));
1235 		if (ret == 0)
1236 			v4l2_err(sd, "s_stream(0) timeout\n");
1237 		clear_bit(ST_FLITE_RUN, &fimc->state);
1238 	}
1239 
1240 	mutex_unlock(&fimc->lock);
1241 	return ret;
1242 }
1243 
fimc_lite_log_status(struct v4l2_subdev * sd)1244 static int fimc_lite_log_status(struct v4l2_subdev *sd)
1245 {
1246 	struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1247 
1248 	flite_hw_dump_regs(fimc, __func__);
1249 	return 0;
1250 }
1251 
fimc_lite_subdev_registered(struct v4l2_subdev * sd)1252 static int fimc_lite_subdev_registered(struct v4l2_subdev *sd)
1253 {
1254 	struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1255 	struct vb2_queue *q = &fimc->vb_queue;
1256 	struct video_device *vfd = &fimc->ve.vdev;
1257 	int ret;
1258 
1259 	memset(vfd, 0, sizeof(*vfd));
1260 	atomic_set(&fimc->out_path, FIMC_IO_DMA);
1261 
1262 	snprintf(vfd->name, sizeof(vfd->name), "fimc-lite.%d.capture",
1263 		 fimc->index);
1264 
1265 	vfd->fops = &fimc_lite_fops;
1266 	vfd->ioctl_ops = &fimc_lite_ioctl_ops;
1267 	vfd->v4l2_dev = sd->v4l2_dev;
1268 	vfd->minor = -1;
1269 	vfd->release = video_device_release_empty;
1270 	vfd->queue = q;
1271 	vfd->device_caps = V4L2_CAP_VIDEO_CAPTURE_MPLANE | V4L2_CAP_STREAMING;
1272 	fimc->reqbufs_count = 0;
1273 
1274 	INIT_LIST_HEAD(&fimc->pending_buf_q);
1275 	INIT_LIST_HEAD(&fimc->active_buf_q);
1276 
1277 	memset(q, 0, sizeof(*q));
1278 	q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
1279 	q->io_modes = VB2_MMAP | VB2_USERPTR;
1280 	q->ops = &fimc_lite_qops;
1281 	q->mem_ops = &vb2_dma_contig_memops;
1282 	q->buf_struct_size = sizeof(struct flite_buffer);
1283 	q->drv_priv = fimc;
1284 	q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1285 	q->lock = &fimc->lock;
1286 	q->dev = &fimc->pdev->dev;
1287 
1288 	ret = vb2_queue_init(q);
1289 	if (ret < 0)
1290 		return ret;
1291 
1292 	fimc->vd_pad.flags = MEDIA_PAD_FL_SINK;
1293 	ret = media_entity_pads_init(&vfd->entity, 1, &fimc->vd_pad);
1294 	if (ret < 0)
1295 		return ret;
1296 
1297 	video_set_drvdata(vfd, fimc);
1298 	fimc->ve.pipe = v4l2_get_subdev_hostdata(sd);
1299 
1300 	ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
1301 	if (ret < 0) {
1302 		media_entity_cleanup(&vfd->entity);
1303 		fimc->ve.pipe = NULL;
1304 		return ret;
1305 	}
1306 
1307 	v4l2_info(sd->v4l2_dev, "Registered %s as /dev/%s\n",
1308 		  vfd->name, video_device_node_name(vfd));
1309 	return 0;
1310 }
1311 
fimc_lite_subdev_unregistered(struct v4l2_subdev * sd)1312 static void fimc_lite_subdev_unregistered(struct v4l2_subdev *sd)
1313 {
1314 	struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1315 
1316 	if (fimc == NULL)
1317 		return;
1318 
1319 	mutex_lock(&fimc->lock);
1320 
1321 	if (video_is_registered(&fimc->ve.vdev)) {
1322 		video_unregister_device(&fimc->ve.vdev);
1323 		media_entity_cleanup(&fimc->ve.vdev.entity);
1324 		fimc->ve.pipe = NULL;
1325 	}
1326 
1327 	mutex_unlock(&fimc->lock);
1328 }
1329 
1330 static const struct v4l2_subdev_internal_ops fimc_lite_subdev_internal_ops = {
1331 	.registered = fimc_lite_subdev_registered,
1332 	.unregistered = fimc_lite_subdev_unregistered,
1333 };
1334 
1335 static const struct v4l2_subdev_pad_ops fimc_lite_subdev_pad_ops = {
1336 	.enum_mbus_code = fimc_lite_subdev_enum_mbus_code,
1337 	.get_selection = fimc_lite_subdev_get_selection,
1338 	.set_selection = fimc_lite_subdev_set_selection,
1339 	.get_fmt = fimc_lite_subdev_get_fmt,
1340 	.set_fmt = fimc_lite_subdev_set_fmt,
1341 };
1342 
1343 static const struct v4l2_subdev_video_ops fimc_lite_subdev_video_ops = {
1344 	.s_stream = fimc_lite_subdev_s_stream,
1345 };
1346 
1347 static const struct v4l2_subdev_core_ops fimc_lite_core_ops = {
1348 	.log_status = fimc_lite_log_status,
1349 };
1350 
1351 static const struct v4l2_subdev_ops fimc_lite_subdev_ops = {
1352 	.core = &fimc_lite_core_ops,
1353 	.video = &fimc_lite_subdev_video_ops,
1354 	.pad = &fimc_lite_subdev_pad_ops,
1355 };
1356 
fimc_lite_s_ctrl(struct v4l2_ctrl * ctrl)1357 static int fimc_lite_s_ctrl(struct v4l2_ctrl *ctrl)
1358 {
1359 	struct fimc_lite *fimc = container_of(ctrl->handler, struct fimc_lite,
1360 					      ctrl_handler);
1361 	set_bit(ST_FLITE_CONFIG, &fimc->state);
1362 	return 0;
1363 }
1364 
1365 static const struct v4l2_ctrl_ops fimc_lite_ctrl_ops = {
1366 	.s_ctrl	= fimc_lite_s_ctrl,
1367 };
1368 
1369 static const struct v4l2_ctrl_config fimc_lite_ctrl = {
1370 	.ops	= &fimc_lite_ctrl_ops,
1371 	.id	= V4L2_CTRL_CLASS_USER | 0x1001,
1372 	.type	= V4L2_CTRL_TYPE_BOOLEAN,
1373 	.name	= "Test Pattern 640x480",
1374 	.step	= 1,
1375 };
1376 
fimc_lite_set_default_config(struct fimc_lite * fimc)1377 static void fimc_lite_set_default_config(struct fimc_lite *fimc)
1378 {
1379 	struct flite_frame *sink = &fimc->inp_frame;
1380 	struct flite_frame *source = &fimc->out_frame;
1381 
1382 	sink->fmt = &fimc_lite_formats[0];
1383 	sink->f_width = FLITE_DEFAULT_WIDTH;
1384 	sink->f_height = FLITE_DEFAULT_HEIGHT;
1385 
1386 	sink->rect.width = FLITE_DEFAULT_WIDTH;
1387 	sink->rect.height = FLITE_DEFAULT_HEIGHT;
1388 	sink->rect.left = 0;
1389 	sink->rect.top = 0;
1390 
1391 	*source = *sink;
1392 }
1393 
fimc_lite_create_capture_subdev(struct fimc_lite * fimc)1394 static int fimc_lite_create_capture_subdev(struct fimc_lite *fimc)
1395 {
1396 	struct v4l2_ctrl_handler *handler = &fimc->ctrl_handler;
1397 	struct v4l2_subdev *sd = &fimc->subdev;
1398 	int ret;
1399 
1400 	v4l2_subdev_init(sd, &fimc_lite_subdev_ops);
1401 	sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1402 	snprintf(sd->name, sizeof(sd->name), "FIMC-LITE.%d", fimc->index);
1403 
1404 	fimc->subdev_pads[FLITE_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
1405 	fimc->subdev_pads[FLITE_SD_PAD_SOURCE_DMA].flags = MEDIA_PAD_FL_SOURCE;
1406 	fimc->subdev_pads[FLITE_SD_PAD_SOURCE_ISP].flags = MEDIA_PAD_FL_SOURCE;
1407 	ret = media_entity_pads_init(&sd->entity, FLITE_SD_PADS_NUM,
1408 				fimc->subdev_pads);
1409 	if (ret)
1410 		return ret;
1411 
1412 	v4l2_ctrl_handler_init(handler, 1);
1413 	fimc->test_pattern = v4l2_ctrl_new_custom(handler, &fimc_lite_ctrl,
1414 						  NULL);
1415 	if (handler->error) {
1416 		media_entity_cleanup(&sd->entity);
1417 		return handler->error;
1418 	}
1419 
1420 	sd->ctrl_handler = handler;
1421 	sd->internal_ops = &fimc_lite_subdev_internal_ops;
1422 	sd->entity.function = MEDIA_ENT_F_PROC_VIDEO_SCALER;
1423 	sd->entity.ops = &fimc_lite_subdev_media_ops;
1424 	sd->owner = THIS_MODULE;
1425 	v4l2_set_subdevdata(sd, fimc);
1426 
1427 	return 0;
1428 }
1429 
fimc_lite_unregister_capture_subdev(struct fimc_lite * fimc)1430 static void fimc_lite_unregister_capture_subdev(struct fimc_lite *fimc)
1431 {
1432 	struct v4l2_subdev *sd = &fimc->subdev;
1433 
1434 	v4l2_device_unregister_subdev(sd);
1435 	media_entity_cleanup(&sd->entity);
1436 	v4l2_ctrl_handler_free(&fimc->ctrl_handler);
1437 	v4l2_set_subdevdata(sd, NULL);
1438 }
1439 
fimc_lite_clk_put(struct fimc_lite * fimc)1440 static void fimc_lite_clk_put(struct fimc_lite *fimc)
1441 {
1442 	if (IS_ERR(fimc->clock))
1443 		return;
1444 
1445 	clk_put(fimc->clock);
1446 	fimc->clock = ERR_PTR(-EINVAL);
1447 }
1448 
fimc_lite_clk_get(struct fimc_lite * fimc)1449 static int fimc_lite_clk_get(struct fimc_lite *fimc)
1450 {
1451 	fimc->clock = clk_get(&fimc->pdev->dev, FLITE_CLK_NAME);
1452 	return PTR_ERR_OR_ZERO(fimc->clock);
1453 }
1454 
1455 static const struct of_device_id flite_of_match[];
1456 
fimc_lite_probe(struct platform_device * pdev)1457 static int fimc_lite_probe(struct platform_device *pdev)
1458 {
1459 	struct flite_drvdata *drv_data = NULL;
1460 	struct device *dev = &pdev->dev;
1461 	const struct of_device_id *of_id;
1462 	struct fimc_lite *fimc;
1463 	struct resource *res;
1464 	int ret;
1465 
1466 	if (!dev->of_node)
1467 		return -ENODEV;
1468 
1469 	fimc = devm_kzalloc(dev, sizeof(*fimc), GFP_KERNEL);
1470 	if (!fimc)
1471 		return -ENOMEM;
1472 
1473 	of_id = of_match_node(flite_of_match, dev->of_node);
1474 	if (of_id)
1475 		drv_data = (struct flite_drvdata *)of_id->data;
1476 	fimc->index = of_alias_get_id(dev->of_node, "fimc-lite");
1477 
1478 	if (!drv_data || fimc->index >= drv_data->num_instances ||
1479 						fimc->index < 0) {
1480 		dev_err(dev, "Wrong %pOF node alias\n", dev->of_node);
1481 		return -EINVAL;
1482 	}
1483 
1484 	fimc->dd = drv_data;
1485 	fimc->pdev = pdev;
1486 
1487 	init_waitqueue_head(&fimc->irq_queue);
1488 	spin_lock_init(&fimc->slock);
1489 	mutex_init(&fimc->lock);
1490 
1491 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1492 	fimc->regs = devm_ioremap_resource(dev, res);
1493 	if (IS_ERR(fimc->regs))
1494 		return PTR_ERR(fimc->regs);
1495 
1496 	res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1497 	if (res == NULL) {
1498 		dev_err(dev, "Failed to get IRQ resource\n");
1499 		return -ENXIO;
1500 	}
1501 
1502 	ret = fimc_lite_clk_get(fimc);
1503 	if (ret)
1504 		return ret;
1505 
1506 	ret = devm_request_irq(dev, res->start, flite_irq_handler,
1507 			       0, dev_name(dev), fimc);
1508 	if (ret) {
1509 		dev_err(dev, "Failed to install irq (%d)\n", ret);
1510 		goto err_clk_put;
1511 	}
1512 
1513 	/* The video node will be created within the subdev's registered() op */
1514 	ret = fimc_lite_create_capture_subdev(fimc);
1515 	if (ret)
1516 		goto err_clk_put;
1517 
1518 	platform_set_drvdata(pdev, fimc);
1519 	pm_runtime_enable(dev);
1520 
1521 	if (!pm_runtime_enabled(dev)) {
1522 		ret = clk_prepare_enable(fimc->clock);
1523 		if (ret < 0)
1524 			goto err_sd;
1525 	}
1526 
1527 	vb2_dma_contig_set_max_seg_size(dev, DMA_BIT_MASK(32));
1528 
1529 	fimc_lite_set_default_config(fimc);
1530 
1531 	dev_dbg(dev, "FIMC-LITE.%d registered successfully\n",
1532 		fimc->index);
1533 	return 0;
1534 
1535 err_sd:
1536 	fimc_lite_unregister_capture_subdev(fimc);
1537 err_clk_put:
1538 	fimc_lite_clk_put(fimc);
1539 	return ret;
1540 }
1541 
1542 #ifdef CONFIG_PM
fimc_lite_runtime_resume(struct device * dev)1543 static int fimc_lite_runtime_resume(struct device *dev)
1544 {
1545 	struct fimc_lite *fimc = dev_get_drvdata(dev);
1546 
1547 	clk_prepare_enable(fimc->clock);
1548 	return 0;
1549 }
1550 
fimc_lite_runtime_suspend(struct device * dev)1551 static int fimc_lite_runtime_suspend(struct device *dev)
1552 {
1553 	struct fimc_lite *fimc = dev_get_drvdata(dev);
1554 
1555 	clk_disable_unprepare(fimc->clock);
1556 	return 0;
1557 }
1558 #endif
1559 
1560 #ifdef CONFIG_PM_SLEEP
fimc_lite_resume(struct device * dev)1561 static int fimc_lite_resume(struct device *dev)
1562 {
1563 	struct fimc_lite *fimc = dev_get_drvdata(dev);
1564 	struct flite_buffer *buf;
1565 	unsigned long flags;
1566 	int i;
1567 
1568 	spin_lock_irqsave(&fimc->slock, flags);
1569 	if (!test_and_clear_bit(ST_LPM, &fimc->state) ||
1570 	    !test_bit(ST_FLITE_IN_USE, &fimc->state)) {
1571 		spin_unlock_irqrestore(&fimc->slock, flags);
1572 		return 0;
1573 	}
1574 	flite_hw_reset(fimc);
1575 	spin_unlock_irqrestore(&fimc->slock, flags);
1576 
1577 	if (!test_and_clear_bit(ST_FLITE_SUSPENDED, &fimc->state))
1578 		return 0;
1579 
1580 	INIT_LIST_HEAD(&fimc->active_buf_q);
1581 	fimc_pipeline_call(&fimc->ve, open,
1582 			   &fimc->ve.vdev.entity, false);
1583 	fimc_lite_hw_init(fimc, atomic_read(&fimc->out_path) == FIMC_IO_ISP);
1584 	clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
1585 
1586 	for (i = 0; i < fimc->reqbufs_count; i++) {
1587 		if (list_empty(&fimc->pending_buf_q))
1588 			break;
1589 		buf = fimc_lite_pending_queue_pop(fimc);
1590 		buffer_queue(&buf->vb.vb2_buf);
1591 	}
1592 	return 0;
1593 }
1594 
fimc_lite_suspend(struct device * dev)1595 static int fimc_lite_suspend(struct device *dev)
1596 {
1597 	struct fimc_lite *fimc = dev_get_drvdata(dev);
1598 	bool suspend = test_bit(ST_FLITE_IN_USE, &fimc->state);
1599 	int ret;
1600 
1601 	if (test_and_set_bit(ST_LPM, &fimc->state))
1602 		return 0;
1603 
1604 	ret = fimc_lite_stop_capture(fimc, suspend);
1605 	if (ret < 0 || !fimc_lite_active(fimc))
1606 		return ret;
1607 
1608 	return fimc_pipeline_call(&fimc->ve, close);
1609 }
1610 #endif /* CONFIG_PM_SLEEP */
1611 
fimc_lite_remove(struct platform_device * pdev)1612 static int fimc_lite_remove(struct platform_device *pdev)
1613 {
1614 	struct fimc_lite *fimc = platform_get_drvdata(pdev);
1615 	struct device *dev = &pdev->dev;
1616 
1617 	pm_runtime_disable(dev);
1618 	pm_runtime_set_suspended(dev);
1619 	fimc_lite_unregister_capture_subdev(fimc);
1620 	vb2_dma_contig_clear_max_seg_size(dev);
1621 	fimc_lite_clk_put(fimc);
1622 
1623 	dev_info(dev, "Driver unloaded\n");
1624 	return 0;
1625 }
1626 
1627 static const struct dev_pm_ops fimc_lite_pm_ops = {
1628 	SET_SYSTEM_SLEEP_PM_OPS(fimc_lite_suspend, fimc_lite_resume)
1629 	SET_RUNTIME_PM_OPS(fimc_lite_runtime_suspend, fimc_lite_runtime_resume,
1630 			   NULL)
1631 };
1632 
1633 /* EXYNOS4412 */
1634 static struct flite_drvdata fimc_lite_drvdata_exynos4 = {
1635 	.max_width		= 8192,
1636 	.max_height		= 8192,
1637 	.out_width_align	= 8,
1638 	.win_hor_offs_align	= 2,
1639 	.out_hor_offs_align	= 8,
1640 	.max_dma_bufs		= 1,
1641 	.num_instances		= 2,
1642 };
1643 
1644 /* EXYNOS5250 */
1645 static struct flite_drvdata fimc_lite_drvdata_exynos5 = {
1646 	.max_width		= 8192,
1647 	.max_height		= 8192,
1648 	.out_width_align	= 8,
1649 	.win_hor_offs_align	= 2,
1650 	.out_hor_offs_align	= 8,
1651 	.max_dma_bufs		= 32,
1652 	.num_instances		= 3,
1653 };
1654 
1655 static const struct of_device_id flite_of_match[] = {
1656 	{
1657 		.compatible = "samsung,exynos4212-fimc-lite",
1658 		.data = &fimc_lite_drvdata_exynos4,
1659 	},
1660 	{
1661 		.compatible = "samsung,exynos5250-fimc-lite",
1662 		.data = &fimc_lite_drvdata_exynos5,
1663 	},
1664 	{ /* sentinel */ },
1665 };
1666 MODULE_DEVICE_TABLE(of, flite_of_match);
1667 
1668 static struct platform_driver fimc_lite_driver = {
1669 	.probe		= fimc_lite_probe,
1670 	.remove		= fimc_lite_remove,
1671 	.driver = {
1672 		.of_match_table = flite_of_match,
1673 		.name		= FIMC_LITE_DRV_NAME,
1674 		.pm		= &fimc_lite_pm_ops,
1675 	}
1676 };
1677 module_platform_driver(fimc_lite_driver);
1678 MODULE_LICENSE("GPL");
1679 MODULE_ALIAS("platform:" FIMC_LITE_DRV_NAME);
1680