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1 // SPDX-License-Identifier: GPL-2.0-only
2 /**
3  * omap-usb-tll.c - The USB TLL driver for OMAP EHCI & OHCI
4  *
5  * Copyright (C) 2012-2013 Texas Instruments Incorporated - http://www.ti.com
6  * Author: Keshava Munegowda <keshava_mgowda@ti.com>
7  * Author: Roger Quadros <rogerq@ti.com>
8  */
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/types.h>
12 #include <linux/slab.h>
13 #include <linux/spinlock.h>
14 #include <linux/platform_device.h>
15 #include <linux/clk.h>
16 #include <linux/io.h>
17 #include <linux/err.h>
18 #include <linux/pm_runtime.h>
19 #include <linux/platform_data/usb-omap.h>
20 #include <linux/of.h>
21 
22 #include "omap-usb.h"
23 
24 #define USBTLL_DRIVER_NAME	"usbhs_tll"
25 
26 /* TLL Register Set */
27 #define	OMAP_USBTLL_REVISION				(0x00)
28 #define	OMAP_USBTLL_SYSCONFIG				(0x10)
29 #define	OMAP_USBTLL_SYSCONFIG_CACTIVITY			(1 << 8)
30 #define	OMAP_USBTLL_SYSCONFIG_SIDLEMODE			(1 << 3)
31 #define	OMAP_USBTLL_SYSCONFIG_ENAWAKEUP			(1 << 2)
32 #define	OMAP_USBTLL_SYSCONFIG_SOFTRESET			(1 << 1)
33 #define	OMAP_USBTLL_SYSCONFIG_AUTOIDLE			(1 << 0)
34 
35 #define	OMAP_USBTLL_SYSSTATUS				(0x14)
36 #define	OMAP_USBTLL_SYSSTATUS_RESETDONE			(1 << 0)
37 
38 #define	OMAP_USBTLL_IRQSTATUS				(0x18)
39 #define	OMAP_USBTLL_IRQENABLE				(0x1C)
40 
41 #define	OMAP_TLL_SHARED_CONF				(0x30)
42 #define	OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN		(1 << 6)
43 #define	OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN		(1 << 5)
44 #define	OMAP_TLL_SHARED_CONF_USB_DIVRATION		(1 << 2)
45 #define	OMAP_TLL_SHARED_CONF_FCLK_REQ			(1 << 1)
46 #define	OMAP_TLL_SHARED_CONF_FCLK_IS_ON			(1 << 0)
47 
48 #define	OMAP_TLL_CHANNEL_CONF(num)			(0x040 + 0x004 * num)
49 #define OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT		24
50 #define OMAP_TLL_CHANNEL_CONF_DRVVBUS			(1 << 16)
51 #define OMAP_TLL_CHANNEL_CONF_CHRGVBUS			(1 << 15)
52 #define	OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF		(1 << 11)
53 #define	OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE		(1 << 10)
54 #define	OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE		(1 << 9)
55 #define	OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE		(1 << 8)
56 #define OMAP_TLL_CHANNEL_CONF_MODE_TRANSPARENT_UTMI	(2 << 1)
57 #define OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS		(1 << 1)
58 #define	OMAP_TLL_CHANNEL_CONF_CHANEN			(1 << 0)
59 
60 #define OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0		0x0
61 #define OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM		0x1
62 #define OMAP_TLL_FSLSMODE_3PIN_PHY			0x2
63 #define OMAP_TLL_FSLSMODE_4PIN_PHY			0x3
64 #define OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0		0x4
65 #define OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM		0x5
66 #define OMAP_TLL_FSLSMODE_3PIN_TLL			0x6
67 #define OMAP_TLL_FSLSMODE_4PIN_TLL			0x7
68 #define OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0		0xA
69 #define OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM		0xB
70 
71 #define	OMAP_TLL_ULPI_FUNCTION_CTRL(num)		(0x804 + 0x100 * num)
72 #define	OMAP_TLL_ULPI_INTERFACE_CTRL(num)		(0x807 + 0x100 * num)
73 #define	OMAP_TLL_ULPI_OTG_CTRL(num)			(0x80A + 0x100 * num)
74 #define	OMAP_TLL_ULPI_INT_EN_RISE(num)			(0x80D + 0x100 * num)
75 #define	OMAP_TLL_ULPI_INT_EN_FALL(num)			(0x810 + 0x100 * num)
76 #define	OMAP_TLL_ULPI_INT_STATUS(num)			(0x813 + 0x100 * num)
77 #define	OMAP_TLL_ULPI_INT_LATCH(num)			(0x814 + 0x100 * num)
78 #define	OMAP_TLL_ULPI_DEBUG(num)			(0x815 + 0x100 * num)
79 #define	OMAP_TLL_ULPI_SCRATCH_REGISTER(num)		(0x816 + 0x100 * num)
80 
81 #define OMAP_REV2_TLL_CHANNEL_COUNT			2
82 #define OMAP_TLL_CHANNEL_COUNT				3
83 #define OMAP_TLL_CHANNEL_1_EN_MASK			(1 << 0)
84 #define OMAP_TLL_CHANNEL_2_EN_MASK			(1 << 1)
85 #define OMAP_TLL_CHANNEL_3_EN_MASK			(1 << 2)
86 
87 /* Values of USBTLL_REVISION - Note: these are not given in the TRM */
88 #define OMAP_USBTLL_REV1		0x00000015	/* OMAP3 */
89 #define OMAP_USBTLL_REV2		0x00000018	/* OMAP 3630 */
90 #define OMAP_USBTLL_REV3		0x00000004	/* OMAP4 */
91 #define OMAP_USBTLL_REV4		0x00000006	/* OMAP5 */
92 
93 #define is_ehci_tll_mode(x)	(x == OMAP_EHCI_PORT_MODE_TLL)
94 
95 /* only PHY and UNUSED modes don't need TLL */
96 #define omap_usb_mode_needs_tll(x)	((x) != OMAP_USBHS_PORT_MODE_UNUSED &&\
97 					 (x) != OMAP_EHCI_PORT_MODE_PHY)
98 
99 struct usbtll_omap {
100 	void __iomem	*base;
101 	int		nch;		/* num. of channels */
102 	struct clk	*ch_clk[0];	/* must be the last member */
103 };
104 
105 /*-------------------------------------------------------------------------*/
106 
107 static const char usbtll_driver_name[] = USBTLL_DRIVER_NAME;
108 static struct device	*tll_dev;
109 static DEFINE_SPINLOCK(tll_lock);	/* serialize access to tll_dev */
110 
111 /*-------------------------------------------------------------------------*/
112 
usbtll_write(void __iomem * base,u32 reg,u32 val)113 static inline void usbtll_write(void __iomem *base, u32 reg, u32 val)
114 {
115 	writel_relaxed(val, base + reg);
116 }
117 
usbtll_read(void __iomem * base,u32 reg)118 static inline u32 usbtll_read(void __iomem *base, u32 reg)
119 {
120 	return readl_relaxed(base + reg);
121 }
122 
usbtll_writeb(void __iomem * base,u32 reg,u8 val)123 static inline void usbtll_writeb(void __iomem *base, u32 reg, u8 val)
124 {
125 	writeb_relaxed(val, base + reg);
126 }
127 
usbtll_readb(void __iomem * base,u32 reg)128 static inline u8 usbtll_readb(void __iomem *base, u32 reg)
129 {
130 	return readb_relaxed(base + reg);
131 }
132 
133 /*-------------------------------------------------------------------------*/
134 
is_ohci_port(enum usbhs_omap_port_mode pmode)135 static bool is_ohci_port(enum usbhs_omap_port_mode pmode)
136 {
137 	switch (pmode) {
138 	case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
139 	case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
140 	case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
141 	case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
142 	case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
143 	case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
144 	case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
145 	case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
146 	case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
147 	case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
148 		return true;
149 
150 	default:
151 		return false;
152 	}
153 }
154 
155 /*
156  * convert the port-mode enum to a value we can use in the FSLSMODE
157  * field of USBTLL_CHANNEL_CONF
158  */
ohci_omap3_fslsmode(enum usbhs_omap_port_mode mode)159 static unsigned ohci_omap3_fslsmode(enum usbhs_omap_port_mode mode)
160 {
161 	switch (mode) {
162 	case OMAP_USBHS_PORT_MODE_UNUSED:
163 	case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
164 		return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;
165 
166 	case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
167 		return OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM;
168 
169 	case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
170 		return OMAP_TLL_FSLSMODE_3PIN_PHY;
171 
172 	case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
173 		return OMAP_TLL_FSLSMODE_4PIN_PHY;
174 
175 	case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
176 		return OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0;
177 
178 	case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
179 		return OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM;
180 
181 	case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
182 		return OMAP_TLL_FSLSMODE_3PIN_TLL;
183 
184 	case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
185 		return OMAP_TLL_FSLSMODE_4PIN_TLL;
186 
187 	case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
188 		return OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0;
189 
190 	case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
191 		return OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM;
192 	default:
193 		pr_warn("Invalid port mode, using default\n");
194 		return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;
195 	}
196 }
197 
198 /**
199  * usbtll_omap_probe - initialize TI-based HCDs
200  *
201  * Allocates basic resources for this USB host controller.
202  */
usbtll_omap_probe(struct platform_device * pdev)203 static int usbtll_omap_probe(struct platform_device *pdev)
204 {
205 	struct device				*dev =  &pdev->dev;
206 	struct resource				*res;
207 	struct usbtll_omap			*tll;
208 	void __iomem				*base;
209 	int					i, nch, ver;
210 
211 	dev_dbg(dev, "starting TI HSUSB TLL Controller\n");
212 
213 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
214 	base = devm_ioremap_resource(dev, res);
215 	if (IS_ERR(base))
216 		return PTR_ERR(base);
217 
218 	pm_runtime_enable(dev);
219 	pm_runtime_get_sync(dev);
220 
221 	ver = usbtll_read(base, OMAP_USBTLL_REVISION);
222 	switch (ver) {
223 	case OMAP_USBTLL_REV1:
224 	case OMAP_USBTLL_REV4:
225 		nch = OMAP_TLL_CHANNEL_COUNT;
226 		break;
227 	case OMAP_USBTLL_REV2:
228 	case OMAP_USBTLL_REV3:
229 		nch = OMAP_REV2_TLL_CHANNEL_COUNT;
230 		break;
231 	default:
232 		nch = OMAP_TLL_CHANNEL_COUNT;
233 		dev_dbg(dev, "rev 0x%x not recognized, assuming %d channels\n",
234 			ver, nch);
235 		break;
236 	}
237 
238 	tll = devm_kzalloc(dev, sizeof(*tll) + sizeof(tll->ch_clk[nch]),
239 			   GFP_KERNEL);
240 	if (!tll) {
241 		pm_runtime_put_sync(dev);
242 		pm_runtime_disable(dev);
243 		return -ENOMEM;
244 	}
245 
246 	tll->base = base;
247 	tll->nch = nch;
248 	platform_set_drvdata(pdev, tll);
249 
250 	for (i = 0; i < nch; i++) {
251 		char clkname[] = "usb_tll_hs_usb_chx_clk";
252 
253 		snprintf(clkname, sizeof(clkname),
254 					"usb_tll_hs_usb_ch%d_clk", i);
255 		tll->ch_clk[i] = clk_get(dev, clkname);
256 
257 		if (IS_ERR(tll->ch_clk[i]))
258 			dev_dbg(dev, "can't get clock : %s\n", clkname);
259 		else
260 			clk_prepare(tll->ch_clk[i]);
261 	}
262 
263 	pm_runtime_put_sync(dev);
264 	/* only after this can omap_tll_enable/disable work */
265 	spin_lock(&tll_lock);
266 	tll_dev = dev;
267 	spin_unlock(&tll_lock);
268 
269 	return 0;
270 }
271 
272 /**
273  * usbtll_omap_remove - shutdown processing for UHH & TLL HCDs
274  * @pdev: USB Host Controller being removed
275  *
276  * Reverses the effect of usbtll_omap_probe().
277  */
usbtll_omap_remove(struct platform_device * pdev)278 static int usbtll_omap_remove(struct platform_device *pdev)
279 {
280 	struct usbtll_omap *tll = platform_get_drvdata(pdev);
281 	int i;
282 
283 	spin_lock(&tll_lock);
284 	tll_dev = NULL;
285 	spin_unlock(&tll_lock);
286 
287 	for (i = 0; i < tll->nch; i++) {
288 		if (!IS_ERR(tll->ch_clk[i])) {
289 			clk_unprepare(tll->ch_clk[i]);
290 			clk_put(tll->ch_clk[i]);
291 		}
292 	}
293 
294 	pm_runtime_disable(&pdev->dev);
295 	return 0;
296 }
297 
298 static const struct of_device_id usbtll_omap_dt_ids[] = {
299 	{ .compatible = "ti,usbhs-tll" },
300 	{ }
301 };
302 
303 MODULE_DEVICE_TABLE(of, usbtll_omap_dt_ids);
304 
305 static struct platform_driver usbtll_omap_driver = {
306 	.driver = {
307 		.name		= (char *)usbtll_driver_name,
308 		.of_match_table = usbtll_omap_dt_ids,
309 	},
310 	.probe		= usbtll_omap_probe,
311 	.remove		= usbtll_omap_remove,
312 };
313 
omap_tll_init(struct usbhs_omap_platform_data * pdata)314 int omap_tll_init(struct usbhs_omap_platform_data *pdata)
315 {
316 	int i;
317 	bool needs_tll;
318 	unsigned reg;
319 	struct usbtll_omap *tll;
320 
321 	if (!tll_dev)
322 		return -ENODEV;
323 
324 	pm_runtime_get_sync(tll_dev);
325 
326 	spin_lock(&tll_lock);
327 	tll = dev_get_drvdata(tll_dev);
328 	needs_tll = false;
329 	for (i = 0; i < tll->nch; i++)
330 		needs_tll |= omap_usb_mode_needs_tll(pdata->port_mode[i]);
331 
332 	if (needs_tll) {
333 		void __iomem *base = tll->base;
334 
335 		/* Program Common TLL register */
336 		reg = usbtll_read(base, OMAP_TLL_SHARED_CONF);
337 		reg |= (OMAP_TLL_SHARED_CONF_FCLK_IS_ON
338 			| OMAP_TLL_SHARED_CONF_USB_DIVRATION);
339 		reg &= ~OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN;
340 		reg &= ~OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN;
341 
342 		usbtll_write(base, OMAP_TLL_SHARED_CONF, reg);
343 
344 		/* Enable channels now */
345 		for (i = 0; i < tll->nch; i++) {
346 			reg = usbtll_read(base,	OMAP_TLL_CHANNEL_CONF(i));
347 
348 			if (is_ohci_port(pdata->port_mode[i])) {
349 				reg |= ohci_omap3_fslsmode(pdata->port_mode[i])
350 				<< OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT;
351 				reg |= OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS;
352 			} else if (pdata->port_mode[i] ==
353 					OMAP_EHCI_PORT_MODE_TLL) {
354 				/*
355 				 * Disable UTMI AutoIdle, BitStuffing
356 				 * and use SDR Mode. Enable ULPI AutoIdle.
357 				 */
358 				reg &= ~(OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE
359 					| OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE);
360 				reg |= OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF;
361 				reg |= OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE;
362 			} else if (pdata->port_mode[i] ==
363 					OMAP_EHCI_PORT_MODE_HSIC) {
364 				/*
365 				 * HSIC Mode requires UTMI port configurations
366 				 */
367 				reg |= OMAP_TLL_CHANNEL_CONF_DRVVBUS
368 				 | OMAP_TLL_CHANNEL_CONF_CHRGVBUS
369 				 | OMAP_TLL_CHANNEL_CONF_MODE_TRANSPARENT_UTMI
370 				 | OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF;
371 			} else {
372 				continue;
373 			}
374 			reg |= OMAP_TLL_CHANNEL_CONF_CHANEN;
375 			usbtll_write(base, OMAP_TLL_CHANNEL_CONF(i), reg);
376 
377 			usbtll_writeb(base,
378 				      OMAP_TLL_ULPI_SCRATCH_REGISTER(i),
379 				      0xbe);
380 		}
381 	}
382 
383 	spin_unlock(&tll_lock);
384 	pm_runtime_put_sync(tll_dev);
385 
386 	return 0;
387 }
388 EXPORT_SYMBOL_GPL(omap_tll_init);
389 
omap_tll_enable(struct usbhs_omap_platform_data * pdata)390 int omap_tll_enable(struct usbhs_omap_platform_data *pdata)
391 {
392 	int i;
393 	struct usbtll_omap *tll;
394 
395 	if (!tll_dev)
396 		return -ENODEV;
397 
398 	pm_runtime_get_sync(tll_dev);
399 
400 	spin_lock(&tll_lock);
401 	tll = dev_get_drvdata(tll_dev);
402 
403 	for (i = 0; i < tll->nch; i++) {
404 		if (omap_usb_mode_needs_tll(pdata->port_mode[i])) {
405 			int r;
406 
407 			if (IS_ERR(tll->ch_clk[i]))
408 				continue;
409 
410 			r = clk_enable(tll->ch_clk[i]);
411 			if (r) {
412 				dev_err(tll_dev,
413 				 "Error enabling ch %d clock: %d\n", i, r);
414 			}
415 		}
416 	}
417 
418 	spin_unlock(&tll_lock);
419 
420 	return 0;
421 }
422 EXPORT_SYMBOL_GPL(omap_tll_enable);
423 
omap_tll_disable(struct usbhs_omap_platform_data * pdata)424 int omap_tll_disable(struct usbhs_omap_platform_data *pdata)
425 {
426 	int i;
427 	struct usbtll_omap *tll;
428 
429 	if (!tll_dev)
430 		return -ENODEV;
431 
432 	spin_lock(&tll_lock);
433 	tll = dev_get_drvdata(tll_dev);
434 
435 	for (i = 0; i < tll->nch; i++) {
436 		if (omap_usb_mode_needs_tll(pdata->port_mode[i])) {
437 			if (!IS_ERR(tll->ch_clk[i]))
438 				clk_disable(tll->ch_clk[i]);
439 		}
440 	}
441 
442 	spin_unlock(&tll_lock);
443 	pm_runtime_put_sync(tll_dev);
444 
445 	return 0;
446 }
447 EXPORT_SYMBOL_GPL(omap_tll_disable);
448 
449 MODULE_AUTHOR("Keshava Munegowda <keshava_mgowda@ti.com>");
450 MODULE_AUTHOR("Roger Quadros <rogerq@ti.com>");
451 MODULE_LICENSE("GPL v2");
452 MODULE_DESCRIPTION("usb tll driver for TI OMAP EHCI and OHCI controllers");
453 
omap_usbtll_drvinit(void)454 static int __init omap_usbtll_drvinit(void)
455 {
456 	return platform_driver_register(&usbtll_omap_driver);
457 }
458 
459 /*
460  * init before usbhs core driver;
461  * The usbtll driver should be initialized before
462  * the usbhs core driver probe function is called.
463  */
464 fs_initcall(omap_usbtll_drvinit);
465 
omap_usbtll_drvexit(void)466 static void __exit omap_usbtll_drvexit(void)
467 {
468 	platform_driver_unregister(&usbtll_omap_driver);
469 }
470 module_exit(omap_usbtll_drvexit);
471