1 /*
2 * Copyright (c) 2018 Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 *
32 */
33
34 #ifndef __MLX5_ACCEL_TLS_H__
35 #define __MLX5_ACCEL_TLS_H__
36
37 #include <linux/mlx5/driver.h>
38 #include <linux/tls.h>
39
40 #ifdef CONFIG_MLX5_TLS
41 int mlx5_ktls_create_key(struct mlx5_core_dev *mdev,
42 struct tls_crypto_info *crypto_info,
43 u32 *p_key_id);
44 void mlx5_ktls_destroy_key(struct mlx5_core_dev *mdev, u32 key_id);
45
mlx5_accel_is_ktls_device(struct mlx5_core_dev * mdev)46 static inline bool mlx5_accel_is_ktls_device(struct mlx5_core_dev *mdev)
47 {
48 if (!MLX5_CAP_GEN(mdev, tls))
49 return false;
50
51 if (!MLX5_CAP_GEN(mdev, log_max_dek))
52 return false;
53
54 return MLX5_CAP_TLS(mdev, tls_1_2_aes_gcm_128);
55 }
56
mlx5e_ktls_type_check(struct mlx5_core_dev * mdev,struct tls_crypto_info * crypto_info)57 static inline bool mlx5e_ktls_type_check(struct mlx5_core_dev *mdev,
58 struct tls_crypto_info *crypto_info)
59 {
60 switch (crypto_info->cipher_type) {
61 case TLS_CIPHER_AES_GCM_128:
62 if (crypto_info->version == TLS_1_2_VERSION)
63 return MLX5_CAP_TLS(mdev, tls_1_2_aes_gcm_128);
64 break;
65 }
66
67 return false;
68 }
69 #else
70 static inline int
mlx5_ktls_create_key(struct mlx5_core_dev * mdev,struct tls_crypto_info * crypto_info,u32 * p_key_id)71 mlx5_ktls_create_key(struct mlx5_core_dev *mdev,
72 struct tls_crypto_info *crypto_info,
73 u32 *p_key_id) { return -ENOTSUPP; }
74 static inline void
mlx5_ktls_destroy_key(struct mlx5_core_dev * mdev,u32 key_id)75 mlx5_ktls_destroy_key(struct mlx5_core_dev *mdev, u32 key_id) {}
76
77 static inline bool
mlx5_accel_is_ktls_device(struct mlx5_core_dev * mdev)78 mlx5_accel_is_ktls_device(struct mlx5_core_dev *mdev) { return false; }
79 static inline bool
mlx5e_ktls_type_check(struct mlx5_core_dev * mdev,struct tls_crypto_info * crypto_info)80 mlx5e_ktls_type_check(struct mlx5_core_dev *mdev,
81 struct tls_crypto_info *crypto_info) { return false; }
82 #endif
83
84 enum {
85 MLX5_ACCEL_TLS_TX = BIT(0),
86 MLX5_ACCEL_TLS_RX = BIT(1),
87 MLX5_ACCEL_TLS_V12 = BIT(2),
88 MLX5_ACCEL_TLS_V13 = BIT(3),
89 MLX5_ACCEL_TLS_LRO = BIT(4),
90 MLX5_ACCEL_TLS_IPV6 = BIT(5),
91 MLX5_ACCEL_TLS_AES_GCM128 = BIT(30),
92 MLX5_ACCEL_TLS_AES_GCM256 = BIT(31),
93 };
94
95 struct mlx5_ifc_tls_flow_bits {
96 u8 src_port[0x10];
97 u8 dst_port[0x10];
98 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
99 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
100 u8 ipv6[0x1];
101 u8 direction_sx[0x1];
102 u8 reserved_at_2[0x1e];
103 };
104
105 #ifdef CONFIG_MLX5_FPGA_TLS
106 int mlx5_accel_tls_add_flow(struct mlx5_core_dev *mdev, void *flow,
107 struct tls_crypto_info *crypto_info,
108 u32 start_offload_tcp_sn, u32 *p_swid,
109 bool direction_sx);
110 void mlx5_accel_tls_del_flow(struct mlx5_core_dev *mdev, u32 swid,
111 bool direction_sx);
112 int mlx5_accel_tls_resync_rx(struct mlx5_core_dev *mdev, u32 handle, u32 seq,
113 u64 rcd_sn);
114 bool mlx5_accel_is_tls_device(struct mlx5_core_dev *mdev);
115 u32 mlx5_accel_tls_device_caps(struct mlx5_core_dev *mdev);
116 int mlx5_accel_tls_init(struct mlx5_core_dev *mdev);
117 void mlx5_accel_tls_cleanup(struct mlx5_core_dev *mdev);
118
119 #else
120
121 static inline int
mlx5_accel_tls_add_flow(struct mlx5_core_dev * mdev,void * flow,struct tls_crypto_info * crypto_info,u32 start_offload_tcp_sn,u32 * p_swid,bool direction_sx)122 mlx5_accel_tls_add_flow(struct mlx5_core_dev *mdev, void *flow,
123 struct tls_crypto_info *crypto_info,
124 u32 start_offload_tcp_sn, u32 *p_swid,
125 bool direction_sx) { return -ENOTSUPP; }
mlx5_accel_tls_del_flow(struct mlx5_core_dev * mdev,u32 swid,bool direction_sx)126 static inline void mlx5_accel_tls_del_flow(struct mlx5_core_dev *mdev, u32 swid,
127 bool direction_sx) { }
mlx5_accel_tls_resync_rx(struct mlx5_core_dev * mdev,u32 handle,u32 seq,u64 rcd_sn)128 static inline int mlx5_accel_tls_resync_rx(struct mlx5_core_dev *mdev, u32 handle,
129 u32 seq, u64 rcd_sn) { return 0; }
mlx5_accel_is_tls_device(struct mlx5_core_dev * mdev)130 static inline bool mlx5_accel_is_tls_device(struct mlx5_core_dev *mdev)
131 {
132 return mlx5_accel_is_ktls_device(mdev);
133 }
mlx5_accel_tls_device_caps(struct mlx5_core_dev * mdev)134 static inline u32 mlx5_accel_tls_device_caps(struct mlx5_core_dev *mdev) { return 0; }
mlx5_accel_tls_init(struct mlx5_core_dev * mdev)135 static inline int mlx5_accel_tls_init(struct mlx5_core_dev *mdev) { return 0; }
mlx5_accel_tls_cleanup(struct mlx5_core_dev * mdev)136 static inline void mlx5_accel_tls_cleanup(struct mlx5_core_dev *mdev) { }
137 #endif
138
139 #endif /* __MLX5_ACCEL_TLS_H__ */
140