1 /*
2 * This is the Fusion MPT base driver providing common API layer interface
3 * for access to MPT (Message Passing Technology) firmware.
4 *
5 * This code is based on drivers/scsi/mpt3sas/mpt3sas_base.h
6 * Copyright (C) 2012-2014 LSI Corporation
7 * Copyright (C) 2013-2014 Avago Technologies
8 * (mailto: MPT-FusionLinux.pdl@avagotech.com)
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version 2
13 * of the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * NO WARRANTY
21 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
22 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
23 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
24 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
25 * solely responsible for determining the appropriateness of using and
26 * distributing the Program and assumes all risks associated with its
27 * exercise of rights under this Agreement, including but not limited to
28 * the risks and costs of program errors, damage to or loss of data,
29 * programs or equipment, and unavailability or interruption of operations.
30
31 * DISCLAIMER OF LIABILITY
32 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
33 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
35 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
36 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
37 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
38 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
39
40 * You should have received a copy of the GNU General Public License
41 * along with this program; if not, write to the Free Software
42 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
43 * USA.
44 */
45
46 #ifndef MPT3SAS_BASE_H_INCLUDED
47 #define MPT3SAS_BASE_H_INCLUDED
48
49 #include "mpi/mpi2_type.h"
50 #include "mpi/mpi2.h"
51 #include "mpi/mpi2_ioc.h"
52 #include "mpi/mpi2_cnfg.h"
53 #include "mpi/mpi2_init.h"
54 #include "mpi/mpi2_raid.h"
55 #include "mpi/mpi2_tool.h"
56 #include "mpi/mpi2_sas.h"
57 #include "mpi/mpi2_pci.h"
58 #include "mpi/mpi2_image.h"
59
60 #include <scsi/scsi.h>
61 #include <scsi/scsi_cmnd.h>
62 #include <scsi/scsi_device.h>
63 #include <scsi/scsi_host.h>
64 #include <scsi/scsi_tcq.h>
65 #include <scsi/scsi_transport_sas.h>
66 #include <scsi/scsi_dbg.h>
67 #include <scsi/scsi_eh.h>
68 #include <linux/pci.h>
69 #include <linux/poll.h>
70 #include <linux/irq_poll.h>
71
72 #include "mpt3sas_debug.h"
73 #include "mpt3sas_trigger_diag.h"
74
75 /* driver versioning info */
76 #define MPT3SAS_DRIVER_NAME "mpt3sas"
77 #define MPT3SAS_AUTHOR "Avago Technologies <MPT-FusionLinux.pdl@avagotech.com>"
78 #define MPT3SAS_DESCRIPTION "LSI MPT Fusion SAS 3.0 Device Driver"
79 #define MPT3SAS_DRIVER_VERSION "31.100.00.00"
80 #define MPT3SAS_MAJOR_VERSION 31
81 #define MPT3SAS_MINOR_VERSION 100
82 #define MPT3SAS_BUILD_VERSION 0
83 #define MPT3SAS_RELEASE_VERSION 00
84
85 #define MPT2SAS_DRIVER_NAME "mpt2sas"
86 #define MPT2SAS_DESCRIPTION "LSI MPT Fusion SAS 2.0 Device Driver"
87 #define MPT2SAS_DRIVER_VERSION "20.102.00.00"
88 #define MPT2SAS_MAJOR_VERSION 20
89 #define MPT2SAS_MINOR_VERSION 102
90 #define MPT2SAS_BUILD_VERSION 0
91 #define MPT2SAS_RELEASE_VERSION 00
92
93 /*
94 * Set MPT3SAS_SG_DEPTH value based on user input.
95 */
96 #define MPT_MAX_PHYS_SEGMENTS SG_CHUNK_SIZE
97 #define MPT_MIN_PHYS_SEGMENTS 16
98 #define MPT_KDUMP_MIN_PHYS_SEGMENTS 32
99
100 #define MCPU_MAX_CHAINS_PER_IO 3
101
102 #ifdef CONFIG_SCSI_MPT3SAS_MAX_SGE
103 #define MPT3SAS_SG_DEPTH CONFIG_SCSI_MPT3SAS_MAX_SGE
104 #else
105 #define MPT3SAS_SG_DEPTH MPT_MAX_PHYS_SEGMENTS
106 #endif
107
108 #ifdef CONFIG_SCSI_MPT2SAS_MAX_SGE
109 #define MPT2SAS_SG_DEPTH CONFIG_SCSI_MPT2SAS_MAX_SGE
110 #else
111 #define MPT2SAS_SG_DEPTH MPT_MAX_PHYS_SEGMENTS
112 #endif
113
114 /*
115 * Generic Defines
116 */
117 #define MPT3SAS_SATA_QUEUE_DEPTH 32
118 #define MPT3SAS_SAS_QUEUE_DEPTH 254
119 #define MPT3SAS_RAID_QUEUE_DEPTH 128
120 #define MPT3SAS_KDUMP_SCSI_IO_DEPTH 200
121
122 #define MPT3SAS_RAID_MAX_SECTORS 8192
123 #define MPT3SAS_HOST_PAGE_SIZE_4K 12
124 #define MPT3SAS_NVME_QUEUE_DEPTH 128
125 #define MPT_NAME_LENGTH 32 /* generic length of strings */
126 #define MPT_STRING_LENGTH 64
127 #define MPI_FRAME_START_OFFSET 256
128 #define REPLY_FREE_POOL_SIZE 512 /*(32 maxcredix *4)*(4 times)*/
129
130 #define MPT_MAX_CALLBACKS 32
131
132 #define INTERNAL_CMDS_COUNT 10 /* reserved cmds */
133 /* reserved for issuing internally framed scsi io cmds */
134 #define INTERNAL_SCSIIO_CMDS_COUNT 3
135
136 #define MPI3_HIM_MASK 0xFFFFFFFF /* mask every bit*/
137
138 #define MPT3SAS_INVALID_DEVICE_HANDLE 0xFFFF
139
140 #define MAX_CHAIN_ELEMT_SZ 16
141 #define DEFAULT_NUM_FWCHAIN_ELEMTS 8
142
143 #define FW_IMG_HDR_READ_TIMEOUT 15
144
145 #define IOC_OPERATIONAL_WAIT_COUNT 10
146
147 /*
148 * NVMe defines
149 */
150 #define NVME_PRP_SIZE 8 /* PRP size */
151 #define NVME_ERROR_RESPONSE_SIZE 16 /* Max NVME Error Response */
152 #define NVME_TASK_ABORT_MIN_TIMEOUT 6
153 #define NVME_TASK_ABORT_MAX_TIMEOUT 60
154 #define NVME_TASK_MNGT_CUSTOM_MASK (0x0010)
155 #define NVME_PRP_PAGE_SIZE 4096 /* Page size */
156
157 struct mpt3sas_nvme_cmd {
158 u8 rsvd[24];
159 __le64 prp1;
160 __le64 prp2;
161 };
162
163 /*
164 * logging format
165 */
166 #define ioc_err(ioc, fmt, ...) \
167 pr_err("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
168 #define ioc_notice(ioc, fmt, ...) \
169 pr_notice("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
170 #define ioc_warn(ioc, fmt, ...) \
171 pr_warn("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
172 #define ioc_info(ioc, fmt, ...) \
173 pr_info("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
174
175 /*
176 * WarpDrive Specific Log codes
177 */
178
179 #define MPT2_WARPDRIVE_LOGENTRY (0x8002)
180 #define MPT2_WARPDRIVE_LC_SSDT (0x41)
181 #define MPT2_WARPDRIVE_LC_SSDLW (0x43)
182 #define MPT2_WARPDRIVE_LC_SSDLF (0x44)
183 #define MPT2_WARPDRIVE_LC_BRMF (0x4D)
184
185 /*
186 * per target private data
187 */
188 #define MPT_TARGET_FLAGS_RAID_COMPONENT 0x01
189 #define MPT_TARGET_FLAGS_VOLUME 0x02
190 #define MPT_TARGET_FLAGS_DELETED 0x04
191 #define MPT_TARGET_FASTPATH_IO 0x08
192 #define MPT_TARGET_FLAGS_PCIE_DEVICE 0x10
193
194 #define SAS2_PCI_DEVICE_B0_REVISION (0x01)
195 #define SAS3_PCI_DEVICE_C0_REVISION (0x02)
196
197 /* Atlas PCIe Switch Management Port */
198 #define MPI26_ATLAS_PCIe_SWITCH_DEVID (0x00B2)
199
200 /*
201 * Intel HBA branding
202 */
203 #define MPT2SAS_INTEL_RMS25JB080_BRANDING \
204 "Intel(R) Integrated RAID Module RMS25JB080"
205 #define MPT2SAS_INTEL_RMS25JB040_BRANDING \
206 "Intel(R) Integrated RAID Module RMS25JB040"
207 #define MPT2SAS_INTEL_RMS25KB080_BRANDING \
208 "Intel(R) Integrated RAID Module RMS25KB080"
209 #define MPT2SAS_INTEL_RMS25KB040_BRANDING \
210 "Intel(R) Integrated RAID Module RMS25KB040"
211 #define MPT2SAS_INTEL_RMS25LB040_BRANDING \
212 "Intel(R) Integrated RAID Module RMS25LB040"
213 #define MPT2SAS_INTEL_RMS25LB080_BRANDING \
214 "Intel(R) Integrated RAID Module RMS25LB080"
215 #define MPT2SAS_INTEL_RMS2LL080_BRANDING \
216 "Intel Integrated RAID Module RMS2LL080"
217 #define MPT2SAS_INTEL_RMS2LL040_BRANDING \
218 "Intel Integrated RAID Module RMS2LL040"
219 #define MPT2SAS_INTEL_RS25GB008_BRANDING \
220 "Intel(R) RAID Controller RS25GB008"
221 #define MPT2SAS_INTEL_SSD910_BRANDING \
222 "Intel(R) SSD 910 Series"
223
224 #define MPT3SAS_INTEL_RMS3JC080_BRANDING \
225 "Intel(R) Integrated RAID Module RMS3JC080"
226 #define MPT3SAS_INTEL_RS3GC008_BRANDING \
227 "Intel(R) RAID Controller RS3GC008"
228 #define MPT3SAS_INTEL_RS3FC044_BRANDING \
229 "Intel(R) RAID Controller RS3FC044"
230 #define MPT3SAS_INTEL_RS3UC080_BRANDING \
231 "Intel(R) RAID Controller RS3UC080"
232
233 /*
234 * Intel HBA SSDIDs
235 */
236 #define MPT2SAS_INTEL_RMS25JB080_SSDID 0x3516
237 #define MPT2SAS_INTEL_RMS25JB040_SSDID 0x3517
238 #define MPT2SAS_INTEL_RMS25KB080_SSDID 0x3518
239 #define MPT2SAS_INTEL_RMS25KB040_SSDID 0x3519
240 #define MPT2SAS_INTEL_RMS25LB040_SSDID 0x351A
241 #define MPT2SAS_INTEL_RMS25LB080_SSDID 0x351B
242 #define MPT2SAS_INTEL_RMS2LL080_SSDID 0x350E
243 #define MPT2SAS_INTEL_RMS2LL040_SSDID 0x350F
244 #define MPT2SAS_INTEL_RS25GB008_SSDID 0x3000
245 #define MPT2SAS_INTEL_SSD910_SSDID 0x3700
246
247 #define MPT3SAS_INTEL_RMS3JC080_SSDID 0x3521
248 #define MPT3SAS_INTEL_RS3GC008_SSDID 0x3522
249 #define MPT3SAS_INTEL_RS3FC044_SSDID 0x3523
250 #define MPT3SAS_INTEL_RS3UC080_SSDID 0x3524
251
252 /*
253 * Dell HBA branding
254 */
255 #define MPT2SAS_DELL_BRANDING_SIZE 32
256
257 #define MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING "Dell 6Gbps SAS HBA"
258 #define MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING "Dell PERC H200 Adapter"
259 #define MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING "Dell PERC H200 Integrated"
260 #define MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING "Dell PERC H200 Modular"
261 #define MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING "Dell PERC H200 Embedded"
262 #define MPT2SAS_DELL_PERC_H200_BRANDING "Dell PERC H200"
263 #define MPT2SAS_DELL_6GBPS_SAS_BRANDING "Dell 6Gbps SAS"
264
265 #define MPT3SAS_DELL_12G_HBA_BRANDING \
266 "Dell 12Gbps HBA"
267
268 /*
269 * Dell HBA SSDIDs
270 */
271 #define MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID 0x1F1C
272 #define MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID 0x1F1D
273 #define MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID 0x1F1E
274 #define MPT2SAS_DELL_PERC_H200_MODULAR_SSDID 0x1F1F
275 #define MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID 0x1F20
276 #define MPT2SAS_DELL_PERC_H200_SSDID 0x1F21
277 #define MPT2SAS_DELL_6GBPS_SAS_SSDID 0x1F22
278
279 #define MPT3SAS_DELL_12G_HBA_SSDID 0x1F46
280
281 /*
282 * Cisco HBA branding
283 */
284 #define MPT3SAS_CISCO_12G_8E_HBA_BRANDING \
285 "Cisco 9300-8E 12G SAS HBA"
286 #define MPT3SAS_CISCO_12G_8I_HBA_BRANDING \
287 "Cisco 9300-8i 12G SAS HBA"
288 #define MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING \
289 "Cisco 12G Modular SAS Pass through Controller"
290 #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_BRANDING \
291 "UCS C3X60 12G SAS Pass through Controller"
292 /*
293 * Cisco HBA SSSDIDs
294 */
295 #define MPT3SAS_CISCO_12G_8E_HBA_SSDID 0x14C
296 #define MPT3SAS_CISCO_12G_8I_HBA_SSDID 0x154
297 #define MPT3SAS_CISCO_12G_AVILA_HBA_SSDID 0x155
298 #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_SSDID 0x156
299
300 /*
301 * status bits for ioc->diag_buffer_status
302 */
303 #define MPT3_DIAG_BUFFER_IS_REGISTERED (0x01)
304 #define MPT3_DIAG_BUFFER_IS_RELEASED (0x02)
305 #define MPT3_DIAG_BUFFER_IS_DIAG_RESET (0x04)
306
307 /*
308 * HP HBA branding
309 */
310 #define MPT2SAS_HP_3PAR_SSVID 0x1590
311
312 #define MPT2SAS_HP_2_4_INTERNAL_BRANDING \
313 "HP H220 Host Bus Adapter"
314 #define MPT2SAS_HP_2_4_EXTERNAL_BRANDING \
315 "HP H221 Host Bus Adapter"
316 #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING \
317 "HP H222 Host Bus Adapter"
318 #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING \
319 "HP H220i Host Bus Adapter"
320 #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING \
321 "HP H210i Host Bus Adapter"
322
323 /*
324 * HO HBA SSDIDs
325 */
326 #define MPT2SAS_HP_2_4_INTERNAL_SSDID 0x0041
327 #define MPT2SAS_HP_2_4_EXTERNAL_SSDID 0x0042
328 #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID 0x0043
329 #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID 0x0044
330 #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID 0x0046
331
332 /*
333 * Combined Reply Queue constants,
334 * There are twelve Supplemental Reply Post Host Index Registers
335 * and each register is at offset 0x10 bytes from the previous one.
336 */
337 #define MAX_COMBINED_MSIX_VECTORS(gen35) ((gen35 == 1) ? 16 : 8)
338 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G3 12
339 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G35 16
340 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET (0x10)
341
342 /* OEM Identifiers */
343 #define MFG10_OEM_ID_INVALID (0x00000000)
344 #define MFG10_OEM_ID_DELL (0x00000001)
345 #define MFG10_OEM_ID_FSC (0x00000002)
346 #define MFG10_OEM_ID_SUN (0x00000003)
347 #define MFG10_OEM_ID_IBM (0x00000004)
348
349 /* GENERIC Flags 0*/
350 #define MFG10_GF0_OCE_DISABLED (0x00000001)
351 #define MFG10_GF0_R1E_DRIVE_COUNT (0x00000002)
352 #define MFG10_GF0_R10_DISPLAY (0x00000004)
353 #define MFG10_GF0_SSD_DATA_SCRUB_DISABLE (0x00000008)
354 #define MFG10_GF0_SINGLE_DRIVE_R0 (0x00000010)
355
356 #define VIRTUAL_IO_FAILED_RETRY (0x32010081)
357
358 /* High IOPs definitions */
359 #define MPT3SAS_DEVICE_HIGH_IOPS_DEPTH 8
360 #define MPT3SAS_HIGH_IOPS_REPLY_QUEUES 8
361 #define MPT3SAS_HIGH_IOPS_BATCH_COUNT 16
362 #define MPT3SAS_GEN35_MAX_MSIX_QUEUES 128
363
364 /* OEM Specific Flags will come from OEM specific header files */
365 struct Mpi2ManufacturingPage10_t {
366 MPI2_CONFIG_PAGE_HEADER Header; /* 00h */
367 U8 OEMIdentifier; /* 04h */
368 U8 Reserved1; /* 05h */
369 U16 Reserved2; /* 08h */
370 U32 Reserved3; /* 0Ch */
371 U32 GenericFlags0; /* 10h */
372 U32 GenericFlags1; /* 14h */
373 U32 Reserved4; /* 18h */
374 U32 OEMSpecificFlags0; /* 1Ch */
375 U32 OEMSpecificFlags1; /* 20h */
376 U32 Reserved5[18]; /* 24h - 60h*/
377 };
378
379
380 /* Miscellaneous options */
381 struct Mpi2ManufacturingPage11_t {
382 MPI2_CONFIG_PAGE_HEADER Header; /* 00h */
383 __le32 Reserved1; /* 04h */
384 u8 Reserved2; /* 08h */
385 u8 EEDPTagMode; /* 09h */
386 u8 Reserved3; /* 0Ah */
387 u8 Reserved4; /* 0Bh */
388 __le32 Reserved5[8]; /* 0Ch-2Ch */
389 u16 AddlFlags2; /* 2Ch */
390 u8 AddlFlags3; /* 2Eh */
391 u8 Reserved6; /* 2Fh */
392 __le32 Reserved7[7]; /* 30h - 4Bh */
393 u8 NVMeAbortTO; /* 4Ch */
394 u8 Reserved8; /* 4Dh */
395 u16 Reserved9; /* 4Eh */
396 __le32 Reserved10[4]; /* 50h - 60h */
397 };
398
399 /**
400 * struct MPT3SAS_TARGET - starget private hostdata
401 * @starget: starget object
402 * @sas_address: target sas address
403 * @raid_device: raid_device pointer to access volume data
404 * @handle: device handle
405 * @num_luns: number luns
406 * @flags: MPT_TARGET_FLAGS_XXX flags
407 * @deleted: target flaged for deletion
408 * @tm_busy: target is busy with TM request.
409 * @sas_dev: The sas_device associated with this target
410 * @pcie_dev: The pcie device associated with this target
411 */
412 struct MPT3SAS_TARGET {
413 struct scsi_target *starget;
414 u64 sas_address;
415 struct _raid_device *raid_device;
416 u16 handle;
417 int num_luns;
418 u32 flags;
419 u8 deleted;
420 u8 tm_busy;
421 struct _sas_device *sas_dev;
422 struct _pcie_device *pcie_dev;
423 };
424
425
426 /*
427 * per device private data
428 */
429 #define MPT_DEVICE_FLAGS_INIT 0x01
430
431 #define MFG_PAGE10_HIDE_SSDS_MASK (0x00000003)
432 #define MFG_PAGE10_HIDE_ALL_DISKS (0x00)
433 #define MFG_PAGE10_EXPOSE_ALL_DISKS (0x01)
434 #define MFG_PAGE10_HIDE_IF_VOL_PRESENT (0x02)
435
436 /**
437 * struct MPT3SAS_DEVICE - sdev private hostdata
438 * @sas_target: starget private hostdata
439 * @lun: lun number
440 * @flags: MPT_DEVICE_XXX flags
441 * @configured_lun: lun is configured
442 * @block: device is in SDEV_BLOCK state
443 * @tlr_snoop_check: flag used in determining whether to disable TLR
444 * @eedp_enable: eedp support enable bit
445 * @eedp_type: 0(type_1), 1(type_2), 2(type_3)
446 * @eedp_block_length: block size
447 * @ata_command_pending: SATL passthrough outstanding for device
448 */
449 struct MPT3SAS_DEVICE {
450 struct MPT3SAS_TARGET *sas_target;
451 unsigned int lun;
452 u32 flags;
453 u8 configured_lun;
454 u8 block;
455 u8 tlr_snoop_check;
456 u8 ignore_delay_remove;
457 /* Iopriority Command Handling */
458 u8 ncq_prio_enable;
459 /*
460 * Bug workaround for SATL handling: the mpt2/3sas firmware
461 * doesn't return BUSY or TASK_SET_FULL for subsequent
462 * commands while a SATL pass through is in operation as the
463 * spec requires, it simply does nothing with them until the
464 * pass through completes, causing them possibly to timeout if
465 * the passthrough is a long executing command (like format or
466 * secure erase). This variable allows us to do the right
467 * thing while a SATL command is pending.
468 */
469 unsigned long ata_command_pending;
470
471 };
472
473 #define MPT3_CMD_NOT_USED 0x8000 /* free */
474 #define MPT3_CMD_COMPLETE 0x0001 /* completed */
475 #define MPT3_CMD_PENDING 0x0002 /* pending */
476 #define MPT3_CMD_REPLY_VALID 0x0004 /* reply is valid */
477 #define MPT3_CMD_RESET 0x0008 /* host reset dropped the command */
478
479 /**
480 * struct _internal_cmd - internal commands struct
481 * @mutex: mutex
482 * @done: completion
483 * @reply: reply message pointer
484 * @sense: sense data
485 * @status: MPT3_CMD_XXX status
486 * @smid: system message id
487 */
488 struct _internal_cmd {
489 struct mutex mutex;
490 struct completion done;
491 void *reply;
492 void *sense;
493 u16 status;
494 u16 smid;
495 };
496
497
498
499 /**
500 * struct _sas_device - attached device information
501 * @list: sas device list
502 * @starget: starget object
503 * @sas_address: device sas address
504 * @device_name: retrieved from the SAS IDENTIFY frame.
505 * @handle: device handle
506 * @sas_address_parent: sas address of parent expander or sas host
507 * @enclosure_handle: enclosure handle
508 * @enclosure_logical_id: enclosure logical identifier
509 * @volume_handle: volume handle (valid when hidden raid member)
510 * @volume_wwid: volume unique identifier
511 * @device_info: bitfield provides detailed info about the device
512 * @id: target id
513 * @channel: target channel
514 * @slot: number number
515 * @phy: phy identifier provided in sas device page 0
516 * @responding: used in _scsih_sas_device_mark_responding
517 * @fast_path: fast path feature enable bit
518 * @pfa_led_on: flag for PFA LED status
519 * @pend_sas_rphy_add: flag to check if device is in sas_rphy_add()
520 * addition routine.
521 * @chassis_slot: chassis slot
522 * @is_chassis_slot_valid: chassis slot valid or not
523 */
524 struct _sas_device {
525 struct list_head list;
526 struct scsi_target *starget;
527 u64 sas_address;
528 u64 device_name;
529 u16 handle;
530 u64 sas_address_parent;
531 u16 enclosure_handle;
532 u64 enclosure_logical_id;
533 u16 volume_handle;
534 u64 volume_wwid;
535 u32 device_info;
536 int id;
537 int channel;
538 u16 slot;
539 u8 phy;
540 u8 responding;
541 u8 fast_path;
542 u8 pfa_led_on;
543 u8 pend_sas_rphy_add;
544 u8 enclosure_level;
545 u8 chassis_slot;
546 u8 is_chassis_slot_valid;
547 u8 connector_name[5];
548 struct kref refcount;
549 };
550
sas_device_get(struct _sas_device * s)551 static inline void sas_device_get(struct _sas_device *s)
552 {
553 kref_get(&s->refcount);
554 }
555
sas_device_free(struct kref * r)556 static inline void sas_device_free(struct kref *r)
557 {
558 kfree(container_of(r, struct _sas_device, refcount));
559 }
560
sas_device_put(struct _sas_device * s)561 static inline void sas_device_put(struct _sas_device *s)
562 {
563 kref_put(&s->refcount, sas_device_free);
564 }
565
566 /*
567 * struct _pcie_device - attached PCIe device information
568 * @list: pcie device list
569 * @starget: starget object
570 * @wwid: device WWID
571 * @handle: device handle
572 * @device_info: bitfield provides detailed info about the device
573 * @id: target id
574 * @channel: target channel
575 * @slot: slot number
576 * @port_num: port number
577 * @responding: used in _scsih_pcie_device_mark_responding
578 * @fast_path: fast path feature enable bit
579 * @nvme_mdts: MaximumDataTransferSize from PCIe Device Page 2 for
580 * NVMe device only
581 * @enclosure_handle: enclosure handle
582 * @enclosure_logical_id: enclosure logical identifier
583 * @enclosure_level: The level of device's enclosure from the controller
584 * @connector_name: ASCII value of the Connector's name
585 * @serial_number: pointer of serial number string allocated runtime
586 * @access_status: Device's Access Status
587 * @refcount: reference count for deletion
588 */
589 struct _pcie_device {
590 struct list_head list;
591 struct scsi_target *starget;
592 u64 wwid;
593 u16 handle;
594 u32 device_info;
595 int id;
596 int channel;
597 u16 slot;
598 u8 port_num;
599 u8 responding;
600 u8 fast_path;
601 u32 nvme_mdts;
602 u16 enclosure_handle;
603 u64 enclosure_logical_id;
604 u8 enclosure_level;
605 u8 connector_name[4];
606 u8 *serial_number;
607 u8 reset_timeout;
608 u8 access_status;
609 struct kref refcount;
610 };
611 /**
612 * pcie_device_get - Increment the pcie device reference count
613 *
614 * @p: pcie_device object
615 *
616 * When ever this function called it will increment the
617 * reference count of the pcie device for which this function called.
618 *
619 */
pcie_device_get(struct _pcie_device * p)620 static inline void pcie_device_get(struct _pcie_device *p)
621 {
622 kref_get(&p->refcount);
623 }
624
625 /**
626 * pcie_device_free - Release the pcie device object
627 * @r - kref object
628 *
629 * Free's the pcie device object. It will be called when reference count
630 * reaches to zero.
631 */
pcie_device_free(struct kref * r)632 static inline void pcie_device_free(struct kref *r)
633 {
634 kfree(container_of(r, struct _pcie_device, refcount));
635 }
636
637 /**
638 * pcie_device_put - Decrement the pcie device reference count
639 *
640 * @p: pcie_device object
641 *
642 * When ever this function called it will decrement the
643 * reference count of the pcie device for which this function called.
644 *
645 * When refernce count reaches to Zero, this will call pcie_device_free to the
646 * pcie_device object.
647 */
pcie_device_put(struct _pcie_device * p)648 static inline void pcie_device_put(struct _pcie_device *p)
649 {
650 kref_put(&p->refcount, pcie_device_free);
651 }
652 /**
653 * struct _raid_device - raid volume link list
654 * @list: sas device list
655 * @starget: starget object
656 * @sdev: scsi device struct (volumes are single lun)
657 * @wwid: unique identifier for the volume
658 * @handle: device handle
659 * @block_size: Block size of the volume
660 * @id: target id
661 * @channel: target channel
662 * @volume_type: the raid level
663 * @device_info: bitfield provides detailed info about the hidden components
664 * @num_pds: number of hidden raid components
665 * @responding: used in _scsih_raid_device_mark_responding
666 * @percent_complete: resync percent complete
667 * @direct_io_enabled: Whether direct io to PDs are allowed or not
668 * @stripe_exponent: X where 2powX is the stripe sz in blocks
669 * @block_exponent: X where 2powX is the block sz in bytes
670 * @max_lba: Maximum number of LBA in the volume
671 * @stripe_sz: Stripe Size of the volume
672 * @device_info: Device info of the volume member disk
673 * @pd_handle: Array of handles of the physical drives for direct I/O in le16
674 */
675 #define MPT_MAX_WARPDRIVE_PDS 8
676 struct _raid_device {
677 struct list_head list;
678 struct scsi_target *starget;
679 struct scsi_device *sdev;
680 u64 wwid;
681 u16 handle;
682 u16 block_sz;
683 int id;
684 int channel;
685 u8 volume_type;
686 u8 num_pds;
687 u8 responding;
688 u8 percent_complete;
689 u8 direct_io_enabled;
690 u8 stripe_exponent;
691 u8 block_exponent;
692 u64 max_lba;
693 u32 stripe_sz;
694 u32 device_info;
695 u16 pd_handle[MPT_MAX_WARPDRIVE_PDS];
696 };
697
698 /**
699 * struct _boot_device - boot device info
700 *
701 * @channel: sas, raid, or pcie channel
702 * @device: holds pointer for struct _sas_device, struct _raid_device or
703 * struct _pcie_device
704 */
705 struct _boot_device {
706 int channel;
707 void *device;
708 };
709
710 /**
711 * struct _sas_port - wide/narrow sas port information
712 * @port_list: list of ports belonging to expander
713 * @num_phys: number of phys belonging to this port
714 * @remote_identify: attached device identification
715 * @rphy: sas transport rphy object
716 * @port: sas transport wide/narrow port object
717 * @phy_list: _sas_phy list objects belonging to this port
718 */
719 struct _sas_port {
720 struct list_head port_list;
721 u8 num_phys;
722 struct sas_identify remote_identify;
723 struct sas_rphy *rphy;
724 struct sas_port *port;
725 struct list_head phy_list;
726 };
727
728 /**
729 * struct _sas_phy - phy information
730 * @port_siblings: list of phys belonging to a port
731 * @identify: phy identification
732 * @remote_identify: attached device identification
733 * @phy: sas transport phy object
734 * @phy_id: unique phy id
735 * @handle: device handle for this phy
736 * @attached_handle: device handle for attached device
737 * @phy_belongs_to_port: port has been created for this phy
738 */
739 struct _sas_phy {
740 struct list_head port_siblings;
741 struct sas_identify identify;
742 struct sas_identify remote_identify;
743 struct sas_phy *phy;
744 u8 phy_id;
745 u16 handle;
746 u16 attached_handle;
747 u8 phy_belongs_to_port;
748 };
749
750 /**
751 * struct _sas_node - sas_host/expander information
752 * @list: list of expanders
753 * @parent_dev: parent device class
754 * @num_phys: number phys belonging to this sas_host/expander
755 * @sas_address: sas address of this sas_host/expander
756 * @handle: handle for this sas_host/expander
757 * @sas_address_parent: sas address of parent expander or sas host
758 * @enclosure_handle: handle for this a member of an enclosure
759 * @device_info: bitwise defining capabilities of this sas_host/expander
760 * @responding: used in _scsih_expander_device_mark_responding
761 * @phy: a list of phys that make up this sas_host/expander
762 * @sas_port_list: list of ports attached to this sas_host/expander
763 */
764 struct _sas_node {
765 struct list_head list;
766 struct device *parent_dev;
767 u8 num_phys;
768 u64 sas_address;
769 u16 handle;
770 u64 sas_address_parent;
771 u16 enclosure_handle;
772 u64 enclosure_logical_id;
773 u8 responding;
774 struct _sas_phy *phy;
775 struct list_head sas_port_list;
776 };
777
778
779 /**
780 * struct _enclosure_node - enclosure information
781 * @list: list of enclosures
782 * @pg0: enclosure pg0;
783 */
784 struct _enclosure_node {
785 struct list_head list;
786 Mpi2SasEnclosurePage0_t pg0;
787 };
788
789 /**
790 * enum reset_type - reset state
791 * @FORCE_BIG_HAMMER: issue diagnostic reset
792 * @SOFT_RESET: issue message_unit_reset, if fails to to big hammer
793 */
794 enum reset_type {
795 FORCE_BIG_HAMMER,
796 SOFT_RESET,
797 };
798
799 /**
800 * struct pcie_sg_list - PCIe SGL buffer (contiguous per I/O)
801 * @pcie_sgl: PCIe native SGL for NVMe devices
802 * @pcie_sgl_dma: physical address
803 */
804 struct pcie_sg_list {
805 void *pcie_sgl;
806 dma_addr_t pcie_sgl_dma;
807 };
808
809 /**
810 * struct chain_tracker - firmware chain tracker
811 * @chain_buffer: chain buffer
812 * @chain_buffer_dma: physical address
813 * @tracker_list: list of free request (ioc->free_chain_list)
814 */
815 struct chain_tracker {
816 void *chain_buffer;
817 dma_addr_t chain_buffer_dma;
818 };
819
820 struct chain_lookup {
821 struct chain_tracker *chains_per_smid;
822 atomic_t chain_offset;
823 };
824
825 /**
826 * struct scsiio_tracker - scsi mf request tracker
827 * @smid: system message id
828 * @cb_idx: callback index
829 * @direct_io: To indicate whether I/O is direct (WARPDRIVE)
830 * @chain_list: list of associated firmware chain tracker
831 * @msix_io: IO's msix
832 */
833 struct scsiio_tracker {
834 u16 smid;
835 struct scsi_cmnd *scmd;
836 u8 cb_idx;
837 u8 direct_io;
838 struct pcie_sg_list pcie_sg_list;
839 struct list_head chain_list;
840 u16 msix_io;
841 };
842
843 /**
844 * struct request_tracker - firmware request tracker
845 * @smid: system message id
846 * @cb_idx: callback index
847 * @tracker_list: list of free request (ioc->free_list)
848 */
849 struct request_tracker {
850 u16 smid;
851 u8 cb_idx;
852 struct list_head tracker_list;
853 };
854
855 /**
856 * struct _tr_list - target reset list
857 * @handle: device handle
858 * @state: state machine
859 */
860 struct _tr_list {
861 struct list_head list;
862 u16 handle;
863 u16 state;
864 };
865
866 /**
867 * struct _sc_list - delayed SAS_IO_UNIT_CONTROL message list
868 * @handle: device handle
869 */
870 struct _sc_list {
871 struct list_head list;
872 u16 handle;
873 };
874
875 /**
876 * struct _event_ack_list - delayed event acknowledgment list
877 * @Event: Event ID
878 * @EventContext: used to track the event uniquely
879 */
880 struct _event_ack_list {
881 struct list_head list;
882 U16 Event;
883 U32 EventContext;
884 };
885
886 /**
887 * struct adapter_reply_queue - the reply queue struct
888 * @ioc: per adapter object
889 * @msix_index: msix index into vector table
890 * @vector: irq vector
891 * @reply_post_host_index: head index in the pool where FW completes IO
892 * @reply_post_free: reply post base virt address
893 * @name: the name registered to request_irq()
894 * @busy: isr is actively processing replies on another cpu
895 * @os_irq: irq number
896 * @irqpoll: irq_poll object
897 * @irq_poll_scheduled: Tells whether irq poll is scheduled or not
898 * @list: this list
899 */
900 struct adapter_reply_queue {
901 struct MPT3SAS_ADAPTER *ioc;
902 u8 msix_index;
903 u32 reply_post_host_index;
904 Mpi2ReplyDescriptorsUnion_t *reply_post_free;
905 char name[MPT_NAME_LENGTH];
906 atomic_t busy;
907 u32 os_irq;
908 struct irq_poll irqpoll;
909 bool irq_poll_scheduled;
910 bool irq_line_enable;
911 struct list_head list;
912 };
913
914 typedef void (*MPT_ADD_SGE)(void *paddr, u32 flags_length, dma_addr_t dma_addr);
915
916 /* SAS3.0 support */
917 typedef int (*MPT_BUILD_SG_SCMD)(struct MPT3SAS_ADAPTER *ioc,
918 struct scsi_cmnd *scmd, u16 smid, struct _pcie_device *pcie_device);
919 typedef void (*MPT_BUILD_SG)(struct MPT3SAS_ADAPTER *ioc, void *psge,
920 dma_addr_t data_out_dma, size_t data_out_sz,
921 dma_addr_t data_in_dma, size_t data_in_sz);
922 typedef void (*MPT_BUILD_ZERO_LEN_SGE)(struct MPT3SAS_ADAPTER *ioc,
923 void *paddr);
924
925 /* SAS3.5 support */
926 typedef void (*NVME_BUILD_PRP)(struct MPT3SAS_ADAPTER *ioc, u16 smid,
927 Mpi26NVMeEncapsulatedRequest_t *nvme_encap_request,
928 dma_addr_t data_out_dma, size_t data_out_sz, dma_addr_t data_in_dma,
929 size_t data_in_sz);
930
931 /* To support atomic and non atomic descriptors*/
932 typedef void (*PUT_SMID_IO_FP_HIP) (struct MPT3SAS_ADAPTER *ioc, u16 smid,
933 u16 funcdep);
934 typedef void (*PUT_SMID_DEFAULT) (struct MPT3SAS_ADAPTER *ioc, u16 smid);
935 typedef u32 (*BASE_READ_REG) (const volatile void __iomem *addr);
936 /*
937 * To get high iops reply queue's msix index when high iops mode is enabled
938 * else get the msix index of general reply queues.
939 */
940 typedef u8 (*GET_MSIX_INDEX) (struct MPT3SAS_ADAPTER *ioc,
941 struct scsi_cmnd *scmd);
942
943 /* IOC Facts and Port Facts converted from little endian to cpu */
944 union mpi3_version_union {
945 MPI2_VERSION_STRUCT Struct;
946 u32 Word;
947 };
948
949 struct mpt3sas_facts {
950 u16 MsgVersion;
951 u16 HeaderVersion;
952 u8 IOCNumber;
953 u8 VP_ID;
954 u8 VF_ID;
955 u16 IOCExceptions;
956 u16 IOCStatus;
957 u32 IOCLogInfo;
958 u8 MaxChainDepth;
959 u8 WhoInit;
960 u8 NumberOfPorts;
961 u8 MaxMSIxVectors;
962 u16 RequestCredit;
963 u16 ProductID;
964 u32 IOCCapabilities;
965 union mpi3_version_union FWVersion;
966 u16 IOCRequestFrameSize;
967 u16 IOCMaxChainSegmentSize;
968 u16 MaxInitiators;
969 u16 MaxTargets;
970 u16 MaxSasExpanders;
971 u16 MaxEnclosures;
972 u16 ProtocolFlags;
973 u16 HighPriorityCredit;
974 u16 MaxReplyDescriptorPostQueueDepth;
975 u8 ReplyFrameSize;
976 u8 MaxVolumes;
977 u16 MaxDevHandle;
978 u16 MaxPersistentEntries;
979 u16 MinDevHandle;
980 u8 CurrentHostPageSize;
981 };
982
983 struct mpt3sas_port_facts {
984 u8 PortNumber;
985 u8 VP_ID;
986 u8 VF_ID;
987 u8 PortType;
988 u16 MaxPostedCmdBuffers;
989 };
990
991 struct reply_post_struct {
992 Mpi2ReplyDescriptorsUnion_t *reply_post_free;
993 dma_addr_t reply_post_free_dma;
994 };
995
996 typedef void (*MPT3SAS_FLUSH_RUNNING_CMDS)(struct MPT3SAS_ADAPTER *ioc);
997 /**
998 * struct MPT3SAS_ADAPTER - per adapter struct
999 * @list: ioc_list
1000 * @shost: shost object
1001 * @id: unique adapter id
1002 * @cpu_count: number online cpus
1003 * @name: generic ioc string
1004 * @tmp_string: tmp string used for logging
1005 * @pdev: pci pdev object
1006 * @pio_chip: physical io register space
1007 * @chip: memory mapped register space
1008 * @chip_phys: physical addrss prior to mapping
1009 * @logging_level: see mpt3sas_debug.h
1010 * @fwfault_debug: debuging FW timeouts
1011 * @ir_firmware: IR firmware present
1012 * @bars: bitmask of BAR's that must be configured
1013 * @mask_interrupts: ignore interrupt
1014 * @dma_mask: used to set the consistent dma mask
1015 * @pci_access_mutex: Mutex to synchronize ioctl, sysfs show path and
1016 * pci resource handling
1017 * @fault_reset_work_q_name: fw fault work queue
1018 * @fault_reset_work_q: ""
1019 * @fault_reset_work: ""
1020 * @firmware_event_name: fw event work queue
1021 * @firmware_event_thread: ""
1022 * @fw_event_lock:
1023 * @fw_event_list: list of fw events
1024 * @aen_event_read_flag: event log was read
1025 * @broadcast_aen_busy: broadcast aen waiting to be serviced
1026 * @shost_recovery: host reset in progress
1027 * @ioc_reset_in_progress_lock:
1028 * @ioc_link_reset_in_progress: phy/hard reset in progress
1029 * @ignore_loginfos: ignore loginfos during task management
1030 * @remove_host: flag for when driver unloads, to avoid sending dev resets
1031 * @pci_error_recovery: flag to prevent ioc access until slot reset completes
1032 * @wait_for_discovery_to_complete: flag set at driver load time when
1033 * waiting on reporting devices
1034 * @is_driver_loading: flag set at driver load time
1035 * @port_enable_failed: flag set when port enable has failed
1036 * @start_scan: flag set from scan_start callback, cleared from _mpt3sas_fw_work
1037 * @start_scan_failed: means port enable failed, return's the ioc_status
1038 * @msix_enable: flag indicating msix is enabled
1039 * @msix_vector_count: number msix vectors
1040 * @cpu_msix_table: table for mapping cpus to msix index
1041 * @cpu_msix_table_sz: table size
1042 * @total_io_cnt: Gives total IO count, used to load balance the interrupts
1043 * @high_iops_outstanding: used to load balance the interrupts
1044 * within high iops reply queues
1045 * @msix_load_balance: Enables load balancing of interrupts across
1046 * the multiple MSIXs
1047 * @schedule_dead_ioc_flush_running_cmds: callback to flush pending commands
1048 * @thresh_hold: Max number of reply descriptors processed
1049 * before updating Host Index
1050 * @drv_support_bitmap: driver's supported feature bit map
1051 * @scsi_io_cb_idx: shost generated commands
1052 * @tm_cb_idx: task management commands
1053 * @scsih_cb_idx: scsih internal commands
1054 * @transport_cb_idx: transport internal commands
1055 * @ctl_cb_idx: clt internal commands
1056 * @base_cb_idx: base internal commands
1057 * @config_cb_idx: base internal commands
1058 * @tm_tr_cb_idx : device removal target reset handshake
1059 * @tm_tr_volume_cb_idx : volume removal target reset
1060 * @base_cmds:
1061 * @transport_cmds:
1062 * @scsih_cmds:
1063 * @tm_cmds:
1064 * @ctl_cmds:
1065 * @config_cmds:
1066 * @base_add_sg_single: handler for either 32/64 bit sgl's
1067 * @event_type: bits indicating which events to log
1068 * @event_context: unique id for each logged event
1069 * @event_log: event log pointer
1070 * @event_masks: events that are masked
1071 * @facts: static facts data
1072 * @prev_fw_facts: previous fw facts data
1073 * @pfacts: static port facts data
1074 * @manu_pg0: static manufacturing page 0
1075 * @manu_pg10: static manufacturing page 10
1076 * @manu_pg11: static manufacturing page 11
1077 * @bios_pg2: static bios page 2
1078 * @bios_pg3: static bios page 3
1079 * @ioc_pg8: static ioc page 8
1080 * @iounit_pg0: static iounit page 0
1081 * @iounit_pg1: static iounit page 1
1082 * @iounit_pg8: static iounit page 8
1083 * @sas_hba: sas host object
1084 * @sas_expander_list: expander object list
1085 * @enclosure_list: enclosure object list
1086 * @sas_node_lock:
1087 * @sas_device_list: sas device object list
1088 * @sas_device_init_list: sas device object list (used only at init time)
1089 * @sas_device_lock:
1090 * @pcie_device_list: pcie device object list
1091 * @pcie_device_init_list: pcie device object list (used only at init time)
1092 * @pcie_device_lock:
1093 * @io_missing_delay: time for IO completed by fw when PDR enabled
1094 * @device_missing_delay: time for device missing by fw when PDR enabled
1095 * @sas_id : used for setting volume target IDs
1096 * @pcie_target_id: used for setting pcie target IDs
1097 * @blocking_handles: bitmask used to identify which devices need blocking
1098 * @pd_handles : bitmask for PD handles
1099 * @pd_handles_sz : size of pd_handle bitmask
1100 * @config_page_sz: config page size
1101 * @config_page: reserve memory for config page payload
1102 * @config_page_dma:
1103 * @hba_queue_depth: hba request queue depth
1104 * @sge_size: sg element size for either 32/64 bit
1105 * @scsiio_depth: SCSI_IO queue depth
1106 * @request_sz: per request frame size
1107 * @request: pool of request frames
1108 * @request_dma:
1109 * @request_dma_sz:
1110 * @scsi_lookup: firmware request tracker list
1111 * @scsi_lookup_lock:
1112 * @free_list: free list of request
1113 * @pending_io_count:
1114 * @reset_wq:
1115 * @chain: pool of chains
1116 * @chain_dma:
1117 * @max_sges_in_main_message: number sg elements in main message
1118 * @max_sges_in_chain_message: number sg elements per chain
1119 * @chains_needed_per_io: max chains per io
1120 * @chain_depth: total chains allocated
1121 * @chain_segment_sz: gives the max number of
1122 * SGEs accommodate on single chain buffer
1123 * @hi_priority_smid:
1124 * @hi_priority:
1125 * @hi_priority_dma:
1126 * @hi_priority_depth:
1127 * @hpr_lookup:
1128 * @hpr_free_list:
1129 * @internal_smid:
1130 * @internal:
1131 * @internal_dma:
1132 * @internal_depth:
1133 * @internal_lookup:
1134 * @internal_free_list:
1135 * @sense: pool of sense
1136 * @sense_dma:
1137 * @sense_dma_pool:
1138 * @reply_depth: hba reply queue depth:
1139 * @reply_sz: per reply frame size:
1140 * @reply: pool of replys:
1141 * @reply_dma:
1142 * @reply_dma_pool:
1143 * @reply_free_queue_depth: reply free depth
1144 * @reply_free: pool for reply free queue (32 bit addr)
1145 * @reply_free_dma:
1146 * @reply_free_dma_pool:
1147 * @reply_free_host_index: tail index in pool to insert free replys
1148 * @reply_post_queue_depth: reply post queue depth
1149 * @reply_post_struct: struct for reply_post_free physical & virt address
1150 * @rdpq_array_capable: FW supports multiple reply queue addresses in ioc_init
1151 * @rdpq_array_enable: rdpq_array support is enabled in the driver
1152 * @rdpq_array_enable_assigned: this ensures that rdpq_array_enable flag
1153 * is assigned only ones
1154 * @reply_queue_count: number of reply queue's
1155 * @reply_queue_list: link list contaning the reply queue info
1156 * @msix96_vector: 96 MSI-X vector support
1157 * @replyPostRegisterIndex: index of next position in Reply Desc Post Queue
1158 * @delayed_tr_list: target reset link list
1159 * @delayed_tr_volume_list: volume target reset link list
1160 * @delayed_sc_list:
1161 * @delayed_event_ack_list:
1162 * @temp_sensors_count: flag to carry the number of temperature sensors
1163 * @pci_access_mutex: Mutex to synchronize ioctl,sysfs show path and
1164 * pci resource handling. PCI resource freeing will lead to free
1165 * vital hardware/memory resource, which might be in use by cli/sysfs
1166 * path functions resulting in Null pointer reference followed by kernel
1167 * crash. To avoid the above race condition we use mutex syncrhonization
1168 * which ensures the syncrhonization between cli/sysfs_show path.
1169 * @atomic_desc_capable: Atomic Request Descriptor support.
1170 * @GET_MSIX_INDEX: Get the msix index of high iops queues.
1171 */
1172 struct MPT3SAS_ADAPTER {
1173 struct list_head list;
1174 struct Scsi_Host *shost;
1175 u8 id;
1176 int cpu_count;
1177 char name[MPT_NAME_LENGTH];
1178 char driver_name[MPT_NAME_LENGTH - 8];
1179 char tmp_string[MPT_STRING_LENGTH];
1180 struct pci_dev *pdev;
1181 Mpi2SystemInterfaceRegs_t __iomem *chip;
1182 phys_addr_t chip_phys;
1183 int logging_level;
1184 int fwfault_debug;
1185 u8 ir_firmware;
1186 int bars;
1187 u8 mask_interrupts;
1188 int dma_mask;
1189
1190 /* fw fault handler */
1191 char fault_reset_work_q_name[20];
1192 struct workqueue_struct *fault_reset_work_q;
1193 struct delayed_work fault_reset_work;
1194
1195 /* fw event handler */
1196 char firmware_event_name[20];
1197 struct workqueue_struct *firmware_event_thread;
1198 spinlock_t fw_event_lock;
1199 struct list_head fw_event_list;
1200
1201 /* misc flags */
1202 int aen_event_read_flag;
1203 u8 broadcast_aen_busy;
1204 u16 broadcast_aen_pending;
1205 u8 shost_recovery;
1206 u8 got_task_abort_from_ioctl;
1207
1208 struct mutex reset_in_progress_mutex;
1209 spinlock_t ioc_reset_in_progress_lock;
1210 u8 ioc_link_reset_in_progress;
1211
1212 u8 ignore_loginfos;
1213 u8 remove_host;
1214 u8 pci_error_recovery;
1215 u8 wait_for_discovery_to_complete;
1216 u8 is_driver_loading;
1217 u8 port_enable_failed;
1218 u8 start_scan;
1219 u16 start_scan_failed;
1220
1221 u8 msix_enable;
1222 u16 msix_vector_count;
1223 u8 *cpu_msix_table;
1224 u16 cpu_msix_table_sz;
1225 resource_size_t __iomem **reply_post_host_index;
1226 u32 ioc_reset_count;
1227 MPT3SAS_FLUSH_RUNNING_CMDS schedule_dead_ioc_flush_running_cmds;
1228 u32 non_operational_loop;
1229 atomic64_t total_io_cnt;
1230 atomic64_t high_iops_outstanding;
1231 bool msix_load_balance;
1232 u16 thresh_hold;
1233 u8 high_iops_queues;
1234 u32 drv_support_bitmap;
1235 bool enable_sdev_max_qd;
1236
1237 /* internal commands, callback index */
1238 u8 scsi_io_cb_idx;
1239 u8 tm_cb_idx;
1240 u8 transport_cb_idx;
1241 u8 scsih_cb_idx;
1242 u8 ctl_cb_idx;
1243 u8 base_cb_idx;
1244 u8 port_enable_cb_idx;
1245 u8 config_cb_idx;
1246 u8 tm_tr_cb_idx;
1247 u8 tm_tr_volume_cb_idx;
1248 u8 tm_sas_control_cb_idx;
1249 struct _internal_cmd base_cmds;
1250 struct _internal_cmd port_enable_cmds;
1251 struct _internal_cmd transport_cmds;
1252 struct _internal_cmd scsih_cmds;
1253 struct _internal_cmd tm_cmds;
1254 struct _internal_cmd ctl_cmds;
1255 struct _internal_cmd config_cmds;
1256
1257 MPT_ADD_SGE base_add_sg_single;
1258
1259 /* function ptr for either IEEE or MPI sg elements */
1260 MPT_BUILD_SG_SCMD build_sg_scmd;
1261 MPT_BUILD_SG build_sg;
1262 MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge;
1263 u16 sge_size_ieee;
1264 u16 hba_mpi_version_belonged;
1265
1266 /* function ptr for MPI sg elements only */
1267 MPT_BUILD_SG build_sg_mpi;
1268 MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge_mpi;
1269
1270 /* function ptr for NVMe PRP elements only */
1271 NVME_BUILD_PRP build_nvme_prp;
1272
1273 /* event log */
1274 u32 event_type[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
1275 u32 event_context;
1276 void *event_log;
1277 u32 event_masks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
1278
1279 u8 tm_custom_handling;
1280 u8 nvme_abort_timeout;
1281
1282
1283 /* static config pages */
1284 struct mpt3sas_facts facts;
1285 struct mpt3sas_facts prev_fw_facts;
1286 struct mpt3sas_port_facts *pfacts;
1287 Mpi2ManufacturingPage0_t manu_pg0;
1288 struct Mpi2ManufacturingPage10_t manu_pg10;
1289 struct Mpi2ManufacturingPage11_t manu_pg11;
1290 Mpi2BiosPage2_t bios_pg2;
1291 Mpi2BiosPage3_t bios_pg3;
1292 Mpi2IOCPage8_t ioc_pg8;
1293 Mpi2IOUnitPage0_t iounit_pg0;
1294 Mpi2IOUnitPage1_t iounit_pg1;
1295 Mpi2IOUnitPage8_t iounit_pg8;
1296 Mpi2IOCPage1_t ioc_pg1_copy;
1297
1298 struct _boot_device req_boot_device;
1299 struct _boot_device req_alt_boot_device;
1300 struct _boot_device current_boot_device;
1301
1302 /* sas hba, expander, and device list */
1303 struct _sas_node sas_hba;
1304 struct list_head sas_expander_list;
1305 struct list_head enclosure_list;
1306 spinlock_t sas_node_lock;
1307 struct list_head sas_device_list;
1308 struct list_head sas_device_init_list;
1309 spinlock_t sas_device_lock;
1310 struct list_head pcie_device_list;
1311 struct list_head pcie_device_init_list;
1312 spinlock_t pcie_device_lock;
1313
1314 struct list_head raid_device_list;
1315 spinlock_t raid_device_lock;
1316 u8 io_missing_delay;
1317 u16 device_missing_delay;
1318 int sas_id;
1319 int pcie_target_id;
1320
1321 void *blocking_handles;
1322 void *pd_handles;
1323 u16 pd_handles_sz;
1324
1325 void *pend_os_device_add;
1326 u16 pend_os_device_add_sz;
1327
1328 /* config page */
1329 u16 config_page_sz;
1330 void *config_page;
1331 dma_addr_t config_page_dma;
1332 void *config_vaddr;
1333
1334 /* scsiio request */
1335 u16 hba_queue_depth;
1336 u16 sge_size;
1337 u16 scsiio_depth;
1338 u16 request_sz;
1339 u8 *request;
1340 dma_addr_t request_dma;
1341 u32 request_dma_sz;
1342 struct pcie_sg_list *pcie_sg_lookup;
1343 spinlock_t scsi_lookup_lock;
1344 int pending_io_count;
1345 wait_queue_head_t reset_wq;
1346
1347 /* PCIe SGL */
1348 struct dma_pool *pcie_sgl_dma_pool;
1349 /* Host Page Size */
1350 u32 page_size;
1351
1352 /* chain */
1353 struct chain_lookup *chain_lookup;
1354 struct list_head free_chain_list;
1355 struct dma_pool *chain_dma_pool;
1356 ulong chain_pages;
1357 u16 max_sges_in_main_message;
1358 u16 max_sges_in_chain_message;
1359 u16 chains_needed_per_io;
1360 u32 chain_depth;
1361 u16 chain_segment_sz;
1362 u16 chains_per_prp_buffer;
1363
1364 /* hi-priority queue */
1365 u16 hi_priority_smid;
1366 u8 *hi_priority;
1367 dma_addr_t hi_priority_dma;
1368 u16 hi_priority_depth;
1369 struct request_tracker *hpr_lookup;
1370 struct list_head hpr_free_list;
1371
1372 /* internal queue */
1373 u16 internal_smid;
1374 u8 *internal;
1375 dma_addr_t internal_dma;
1376 u16 internal_depth;
1377 struct request_tracker *internal_lookup;
1378 struct list_head internal_free_list;
1379
1380 /* sense */
1381 u8 *sense;
1382 dma_addr_t sense_dma;
1383 struct dma_pool *sense_dma_pool;
1384
1385 /* reply */
1386 u16 reply_sz;
1387 u8 *reply;
1388 dma_addr_t reply_dma;
1389 u32 reply_dma_max_address;
1390 u32 reply_dma_min_address;
1391 struct dma_pool *reply_dma_pool;
1392
1393 /* reply free queue */
1394 u16 reply_free_queue_depth;
1395 __le32 *reply_free;
1396 dma_addr_t reply_free_dma;
1397 struct dma_pool *reply_free_dma_pool;
1398 u32 reply_free_host_index;
1399
1400 /* reply post queue */
1401 u16 reply_post_queue_depth;
1402 struct reply_post_struct *reply_post;
1403 u8 rdpq_array_capable;
1404 u8 rdpq_array_enable;
1405 u8 rdpq_array_enable_assigned;
1406 struct dma_pool *reply_post_free_dma_pool;
1407 struct dma_pool *reply_post_free_array_dma_pool;
1408 Mpi2IOCInitRDPQArrayEntry *reply_post_free_array;
1409 dma_addr_t reply_post_free_array_dma;
1410 u8 reply_queue_count;
1411 struct list_head reply_queue_list;
1412
1413 u8 combined_reply_queue;
1414 u8 combined_reply_index_count;
1415 u8 smp_affinity_enable;
1416 /* reply post register index */
1417 resource_size_t **replyPostRegisterIndex;
1418
1419 struct list_head delayed_tr_list;
1420 struct list_head delayed_tr_volume_list;
1421 struct list_head delayed_sc_list;
1422 struct list_head delayed_event_ack_list;
1423 u8 temp_sensors_count;
1424 struct mutex pci_access_mutex;
1425
1426 /* diag buffer support */
1427 u8 *diag_buffer[MPI2_DIAG_BUF_TYPE_COUNT];
1428 u32 diag_buffer_sz[MPI2_DIAG_BUF_TYPE_COUNT];
1429 dma_addr_t diag_buffer_dma[MPI2_DIAG_BUF_TYPE_COUNT];
1430 u8 diag_buffer_status[MPI2_DIAG_BUF_TYPE_COUNT];
1431 u32 unique_id[MPI2_DIAG_BUF_TYPE_COUNT];
1432 u32 product_specific[MPI2_DIAG_BUF_TYPE_COUNT][23];
1433 u32 diagnostic_flags[MPI2_DIAG_BUF_TYPE_COUNT];
1434 u32 ring_buffer_offset;
1435 u32 ring_buffer_sz;
1436 u8 is_warpdrive;
1437 u8 is_mcpu_endpoint;
1438 u8 hide_ir_msg;
1439 u8 mfg_pg10_hide_flag;
1440 u8 hide_drives;
1441 spinlock_t diag_trigger_lock;
1442 u8 diag_trigger_active;
1443 u8 atomic_desc_capable;
1444 BASE_READ_REG base_readl;
1445 struct SL_WH_MASTER_TRIGGER_T diag_trigger_master;
1446 struct SL_WH_EVENT_TRIGGERS_T diag_trigger_event;
1447 struct SL_WH_SCSI_TRIGGERS_T diag_trigger_scsi;
1448 struct SL_WH_MPI_TRIGGERS_T diag_trigger_mpi;
1449 void *device_remove_in_progress;
1450 u16 device_remove_in_progress_sz;
1451 u8 is_gen35_ioc;
1452 u8 is_aero_ioc;
1453 PUT_SMID_IO_FP_HIP put_smid_scsi_io;
1454 PUT_SMID_IO_FP_HIP put_smid_fast_path;
1455 PUT_SMID_IO_FP_HIP put_smid_hi_priority;
1456 PUT_SMID_DEFAULT put_smid_default;
1457 GET_MSIX_INDEX get_msix_index_for_smlio;
1458 };
1459
1460 #define MPT_DRV_SUPPORT_BITMAP_MEMMOVE 0x00000001
1461
1462 typedef u8 (*MPT_CALLBACK)(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1463 u32 reply);
1464
1465
1466 /* base shared API */
1467 extern struct list_head mpt3sas_ioc_list;
1468 extern char driver_name[MPT_NAME_LENGTH];
1469 /* spinlock on list operations over IOCs
1470 * Case: when multiple warpdrive cards(IOCs) are in use
1471 * Each IOC will added to the ioc list structure on initialization.
1472 * Watchdog threads run at regular intervals to check IOC for any
1473 * fault conditions which will trigger the dead_ioc thread to
1474 * deallocate pci resource, resulting deleting the IOC netry from list,
1475 * this deletion need to protected by spinlock to enusre that
1476 * ioc removal is syncrhonized, if not synchronized it might lead to
1477 * list_del corruption as the ioc list is traversed in cli path.
1478 */
1479 extern spinlock_t gioc_lock;
1480
1481 void mpt3sas_base_start_watchdog(struct MPT3SAS_ADAPTER *ioc);
1482 void mpt3sas_base_stop_watchdog(struct MPT3SAS_ADAPTER *ioc);
1483
1484 int mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc);
1485 void mpt3sas_base_detach(struct MPT3SAS_ADAPTER *ioc);
1486 int mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc);
1487 void mpt3sas_base_free_resources(struct MPT3SAS_ADAPTER *ioc);
1488 void mpt3sas_free_enclosure_list(struct MPT3SAS_ADAPTER *ioc);
1489 int mpt3sas_base_hard_reset_handler(struct MPT3SAS_ADAPTER *ioc,
1490 enum reset_type type);
1491
1492 void *mpt3sas_base_get_msg_frame(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1493 void *mpt3sas_base_get_sense_buffer(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1494 __le32 mpt3sas_base_get_sense_buffer_dma(struct MPT3SAS_ADAPTER *ioc,
1495 u16 smid);
1496 void *mpt3sas_base_get_pcie_sgl(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1497 dma_addr_t mpt3sas_base_get_pcie_sgl_dma(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1498 void mpt3sas_base_sync_reply_irqs(struct MPT3SAS_ADAPTER *ioc);
1499
1500 void mpt3sas_base_put_smid_fast_path(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1501 u16 handle);
1502 void mpt3sas_base_put_smid_hi_priority(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1503 u16 msix_task);
1504 void mpt3sas_base_put_smid_nvme_encap(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1505 void mpt3sas_base_put_smid_default(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1506 /* hi-priority queue */
1507 u16 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx);
1508 u16 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx,
1509 struct scsi_cmnd *scmd);
1510 void mpt3sas_base_clear_st(struct MPT3SAS_ADAPTER *ioc,
1511 struct scsiio_tracker *st);
1512
1513 u16 mpt3sas_base_get_smid(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx);
1514 void mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1515 void mpt3sas_base_initialize_callback_handler(void);
1516 u8 mpt3sas_base_register_callback_handler(MPT_CALLBACK cb_func);
1517 void mpt3sas_base_release_callback_handler(u8 cb_idx);
1518
1519 u8 mpt3sas_base_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1520 u32 reply);
1521 u8 mpt3sas_port_enable_done(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1522 u8 msix_index, u32 reply);
1523 void *mpt3sas_base_get_reply_virt_addr(struct MPT3SAS_ADAPTER *ioc,
1524 u32 phys_addr);
1525
1526 u32 mpt3sas_base_get_iocstate(struct MPT3SAS_ADAPTER *ioc, int cooked);
1527
1528 void mpt3sas_base_fault_info(struct MPT3SAS_ADAPTER *ioc , u16 fault_code);
1529 int mpt3sas_base_sas_iounit_control(struct MPT3SAS_ADAPTER *ioc,
1530 Mpi2SasIoUnitControlReply_t *mpi_reply,
1531 Mpi2SasIoUnitControlRequest_t *mpi_request);
1532 int mpt3sas_base_scsi_enclosure_processor(struct MPT3SAS_ADAPTER *ioc,
1533 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request);
1534
1535 void mpt3sas_base_validate_event_type(struct MPT3SAS_ADAPTER *ioc,
1536 u32 *event_type);
1537
1538 void mpt3sas_halt_firmware(struct MPT3SAS_ADAPTER *ioc);
1539
1540 void mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER *ioc,
1541 u16 device_missing_delay, u8 io_missing_delay);
1542
1543 int mpt3sas_port_enable(struct MPT3SAS_ADAPTER *ioc);
1544
1545 void
1546 mpt3sas_wait_for_commands_to_complete(struct MPT3SAS_ADAPTER *ioc);
1547
1548 u8 mpt3sas_base_check_cmd_timeout(struct MPT3SAS_ADAPTER *ioc,
1549 u8 status, void *mpi_request, int sz);
1550 int mpt3sas_wait_for_ioc(struct MPT3SAS_ADAPTER *ioc, int wait_count);
1551
1552 /* scsih shared API */
1553 struct scsi_cmnd *mpt3sas_scsih_scsi_lookup_get(struct MPT3SAS_ADAPTER *ioc,
1554 u16 smid);
1555 u8 mpt3sas_scsih_event_callback(struct MPT3SAS_ADAPTER *ioc, u8 msix_index,
1556 u32 reply);
1557 void mpt3sas_scsih_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1558 void mpt3sas_scsih_after_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1559 void mpt3sas_scsih_reset_done_handler(struct MPT3SAS_ADAPTER *ioc);
1560
1561 int mpt3sas_scsih_issue_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle, u64 lun,
1562 u8 type, u16 smid_task, u16 msix_task, u8 timeout, u8 tr_method);
1563 int mpt3sas_scsih_issue_locked_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle,
1564 u64 lun, u8 type, u16 smid_task, u16 msix_task,
1565 u8 timeout, u8 tr_method);
1566
1567 void mpt3sas_scsih_set_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1568 void mpt3sas_scsih_clear_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1569 void mpt3sas_expander_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1570 void mpt3sas_device_remove_by_sas_address(struct MPT3SAS_ADAPTER *ioc,
1571 u64 sas_address);
1572 u8 mpt3sas_check_for_pending_internal_cmds(struct MPT3SAS_ADAPTER *ioc,
1573 u16 smid);
1574
1575 struct _sas_node *mpt3sas_scsih_expander_find_by_handle(
1576 struct MPT3SAS_ADAPTER *ioc, u16 handle);
1577 struct _sas_node *mpt3sas_scsih_expander_find_by_sas_address(
1578 struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1579 struct _sas_device *mpt3sas_get_sdev_by_addr(
1580 struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1581 struct _sas_device *__mpt3sas_get_sdev_by_addr(
1582 struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1583 struct _sas_device *mpt3sas_get_sdev_by_handle(struct MPT3SAS_ADAPTER *ioc,
1584 u16 handle);
1585 struct _pcie_device *mpt3sas_get_pdev_by_handle(struct MPT3SAS_ADAPTER *ioc,
1586 u16 handle);
1587
1588 void mpt3sas_port_enable_complete(struct MPT3SAS_ADAPTER *ioc);
1589 struct _raid_device *
1590 mpt3sas_raid_device_find_by_handle(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1591 void mpt3sas_scsih_change_queue_depth(struct scsi_device *sdev, int qdepth);
1592
1593 /* config shared API */
1594 u8 mpt3sas_config_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1595 u32 reply);
1596 int mpt3sas_config_get_number_hba_phys(struct MPT3SAS_ADAPTER *ioc,
1597 u8 *num_phys);
1598 int mpt3sas_config_get_manufacturing_pg0(struct MPT3SAS_ADAPTER *ioc,
1599 Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage0_t *config_page);
1600 int mpt3sas_config_get_manufacturing_pg7(struct MPT3SAS_ADAPTER *ioc,
1601 Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage7_t *config_page,
1602 u16 sz);
1603 int mpt3sas_config_get_manufacturing_pg10(struct MPT3SAS_ADAPTER *ioc,
1604 Mpi2ConfigReply_t *mpi_reply,
1605 struct Mpi2ManufacturingPage10_t *config_page);
1606
1607 int mpt3sas_config_get_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
1608 Mpi2ConfigReply_t *mpi_reply,
1609 struct Mpi2ManufacturingPage11_t *config_page);
1610 int mpt3sas_config_set_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
1611 Mpi2ConfigReply_t *mpi_reply,
1612 struct Mpi2ManufacturingPage11_t *config_page);
1613
1614 int mpt3sas_config_get_bios_pg2(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1615 *mpi_reply, Mpi2BiosPage2_t *config_page);
1616 int mpt3sas_config_get_bios_pg3(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1617 *mpi_reply, Mpi2BiosPage3_t *config_page);
1618 int mpt3sas_config_get_iounit_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1619 *mpi_reply, Mpi2IOUnitPage0_t *config_page);
1620 int mpt3sas_config_get_sas_device_pg0(struct MPT3SAS_ADAPTER *ioc,
1621 Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage0_t *config_page,
1622 u32 form, u32 handle);
1623 int mpt3sas_config_get_sas_device_pg1(struct MPT3SAS_ADAPTER *ioc,
1624 Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage1_t *config_page,
1625 u32 form, u32 handle);
1626 int mpt3sas_config_get_pcie_device_pg0(struct MPT3SAS_ADAPTER *ioc,
1627 Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage0_t *config_page,
1628 u32 form, u32 handle);
1629 int mpt3sas_config_get_pcie_device_pg2(struct MPT3SAS_ADAPTER *ioc,
1630 Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage2_t *config_page,
1631 u32 form, u32 handle);
1632 int mpt3sas_config_get_sas_iounit_pg0(struct MPT3SAS_ADAPTER *ioc,
1633 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage0_t *config_page,
1634 u16 sz);
1635 int mpt3sas_config_get_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1636 *mpi_reply, Mpi2IOUnitPage1_t *config_page);
1637 int mpt3sas_config_get_iounit_pg3(struct MPT3SAS_ADAPTER *ioc,
1638 Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage3_t *config_page, u16 sz);
1639 int mpt3sas_config_set_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1640 *mpi_reply, Mpi2IOUnitPage1_t *config_page);
1641 int mpt3sas_config_get_iounit_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1642 *mpi_reply, Mpi2IOUnitPage8_t *config_page);
1643 int mpt3sas_config_get_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
1644 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
1645 u16 sz);
1646 int mpt3sas_config_set_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
1647 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
1648 u16 sz);
1649 int mpt3sas_config_get_ioc_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1650 *mpi_reply, Mpi2IOCPage1_t *config_page);
1651 int mpt3sas_config_set_ioc_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1652 *mpi_reply, Mpi2IOCPage1_t *config_page);
1653 int mpt3sas_config_get_ioc_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1654 *mpi_reply, Mpi2IOCPage8_t *config_page);
1655 int mpt3sas_config_get_expander_pg0(struct MPT3SAS_ADAPTER *ioc,
1656 Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage0_t *config_page,
1657 u32 form, u32 handle);
1658 int mpt3sas_config_get_expander_pg1(struct MPT3SAS_ADAPTER *ioc,
1659 Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage1_t *config_page,
1660 u32 phy_number, u16 handle);
1661 int mpt3sas_config_get_enclosure_pg0(struct MPT3SAS_ADAPTER *ioc,
1662 Mpi2ConfigReply_t *mpi_reply, Mpi2SasEnclosurePage0_t *config_page,
1663 u32 form, u32 handle);
1664 int mpt3sas_config_get_phy_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1665 *mpi_reply, Mpi2SasPhyPage0_t *config_page, u32 phy_number);
1666 int mpt3sas_config_get_phy_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1667 *mpi_reply, Mpi2SasPhyPage1_t *config_page, u32 phy_number);
1668 int mpt3sas_config_get_raid_volume_pg1(struct MPT3SAS_ADAPTER *ioc,
1669 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
1670 u32 handle);
1671 int mpt3sas_config_get_number_pds(struct MPT3SAS_ADAPTER *ioc, u16 handle,
1672 u8 *num_pds);
1673 int mpt3sas_config_get_raid_volume_pg0(struct MPT3SAS_ADAPTER *ioc,
1674 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 form,
1675 u32 handle, u16 sz);
1676 int mpt3sas_config_get_phys_disk_pg0(struct MPT3SAS_ADAPTER *ioc,
1677 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page,
1678 u32 form, u32 form_specific);
1679 int mpt3sas_config_get_volume_handle(struct MPT3SAS_ADAPTER *ioc, u16 pd_handle,
1680 u16 *volume_handle);
1681 int mpt3sas_config_get_volume_wwid(struct MPT3SAS_ADAPTER *ioc,
1682 u16 volume_handle, u64 *wwid);
1683
1684 /* ctl shared API */
1685 extern struct device_attribute *mpt3sas_host_attrs[];
1686 extern struct device_attribute *mpt3sas_dev_attrs[];
1687 void mpt3sas_ctl_init(ushort hbas_to_enumerate);
1688 void mpt3sas_ctl_exit(ushort hbas_to_enumerate);
1689 u8 mpt3sas_ctl_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1690 u32 reply);
1691 void mpt3sas_ctl_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1692 void mpt3sas_ctl_after_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1693 void mpt3sas_ctl_reset_done_handler(struct MPT3SAS_ADAPTER *ioc);
1694 u8 mpt3sas_ctl_event_callback(struct MPT3SAS_ADAPTER *ioc,
1695 u8 msix_index, u32 reply);
1696 void mpt3sas_ctl_add_to_event_log(struct MPT3SAS_ADAPTER *ioc,
1697 Mpi2EventNotificationReply_t *mpi_reply);
1698
1699 void mpt3sas_enable_diag_buffer(struct MPT3SAS_ADAPTER *ioc,
1700 u8 bits_to_register);
1701 int mpt3sas_send_diag_release(struct MPT3SAS_ADAPTER *ioc, u8 buffer_type,
1702 u8 *issue_reset);
1703
1704 /* transport shared API */
1705 extern struct scsi_transport_template *mpt3sas_transport_template;
1706 u8 mpt3sas_transport_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1707 u32 reply);
1708 struct _sas_port *mpt3sas_transport_port_add(struct MPT3SAS_ADAPTER *ioc,
1709 u16 handle, u64 sas_address);
1710 void mpt3sas_transport_port_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address,
1711 u64 sas_address_parent);
1712 int mpt3sas_transport_add_host_phy(struct MPT3SAS_ADAPTER *ioc, struct _sas_phy
1713 *mpt3sas_phy, Mpi2SasPhyPage0_t phy_pg0, struct device *parent_dev);
1714 int mpt3sas_transport_add_expander_phy(struct MPT3SAS_ADAPTER *ioc,
1715 struct _sas_phy *mpt3sas_phy, Mpi2ExpanderPage1_t expander_pg1,
1716 struct device *parent_dev);
1717 void mpt3sas_transport_update_links(struct MPT3SAS_ADAPTER *ioc,
1718 u64 sas_address, u16 handle, u8 phy_number, u8 link_rate);
1719 extern struct sas_function_template mpt3sas_transport_functions;
1720 extern struct scsi_transport_template *mpt3sas_transport_template;
1721 /* trigger data externs */
1722 void mpt3sas_send_trigger_data_event(struct MPT3SAS_ADAPTER *ioc,
1723 struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data);
1724 void mpt3sas_process_trigger_data(struct MPT3SAS_ADAPTER *ioc,
1725 struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data);
1726 void mpt3sas_trigger_master(struct MPT3SAS_ADAPTER *ioc,
1727 u32 tigger_bitmask);
1728 void mpt3sas_trigger_event(struct MPT3SAS_ADAPTER *ioc, u16 event,
1729 u16 log_entry_qualifier);
1730 void mpt3sas_trigger_scsi(struct MPT3SAS_ADAPTER *ioc, u8 sense_key,
1731 u8 asc, u8 ascq);
1732 void mpt3sas_trigger_mpi(struct MPT3SAS_ADAPTER *ioc, u16 ioc_status,
1733 u32 loginfo);
1734
1735 /* warpdrive APIs */
1736 u8 mpt3sas_get_num_volumes(struct MPT3SAS_ADAPTER *ioc);
1737 void mpt3sas_init_warpdrive_properties(struct MPT3SAS_ADAPTER *ioc,
1738 struct _raid_device *raid_device);
1739 void
1740 mpt3sas_setup_direct_io(struct MPT3SAS_ADAPTER *ioc, struct scsi_cmnd *scmd,
1741 struct _raid_device *raid_device, Mpi25SCSIIORequest_t *mpi_request);
1742
1743 /* NCQ Prio Handling Check */
1744 bool scsih_ncq_prio_supp(struct scsi_device *sdev);
1745
1746 /**
1747 * _scsih_is_pcie_scsi_device - determines if device is an pcie scsi device
1748 * @device_info: bitfield providing information about the device.
1749 * Context: none
1750 *
1751 * Returns 1 if scsi device.
1752 */
1753 static inline int
mpt3sas_scsih_is_pcie_scsi_device(u32 device_info)1754 mpt3sas_scsih_is_pcie_scsi_device(u32 device_info)
1755 {
1756 if ((device_info &
1757 MPI26_PCIE_DEVINFO_MASK_DEVICE_TYPE) == MPI26_PCIE_DEVINFO_SCSI)
1758 return 1;
1759 else
1760 return 0;
1761 }
1762 #endif /* MPT3SAS_BASE_H_INCLUDED */
1763