1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * KPC2000 i2c driver
4 *
5 * Adapted i2c-i801.c for use with Kadoka hardware.
6 *
7 * Copyright (C) 1998 - 2002
8 * Frodo Looijaard <frodol@dds.nl>,
9 * Philip Edelbrock <phil@netroedge.com>,
10 * Mark D. Studebaker <mdsxyz123@yahoo.com>
11 * Copyright (C) 2007 - 2012
12 * Jean Delvare <khali@linux-fr.org>
13 * Copyright (C) 2010 Intel Corporation
14 * David Woodhouse <dwmw2@infradead.org>
15 * Copyright (C) 2014-2018 Daktronics
16 * Matt Sickler <matt.sickler@daktronics.com>,
17 * Jordon Hofer <jordon.hofer@daktronics.com>
18 */
19 #include <linux/init.h>
20 #include <linux/module.h>
21 #include <linux/types.h>
22 #include <linux/io.h>
23 #include <linux/io-64-nonatomic-lo-hi.h>
24 #include <linux/export.h>
25 #include <linux/slab.h>
26 #include <linux/platform_device.h>
27 #include <linux/fs.h>
28 #include <linux/delay.h>
29 #include <linux/i2c.h>
30 #include "kpc.h"
31
32 MODULE_LICENSE("GPL");
33 MODULE_AUTHOR("Matt.Sickler@Daktronics.com");
34
35 struct i2c_device {
36 unsigned long smba;
37 struct i2c_adapter adapter;
38 unsigned int features;
39 };
40
41 /*****************************
42 *** Part 1 - i2c Handlers ***
43 *****************************/
44
45 #define REG_SIZE 8
46
47 /* I801 SMBus address offsets */
48 #define SMBHSTSTS(p) ((0 * REG_SIZE) + (p)->smba)
49 #define SMBHSTCNT(p) ((2 * REG_SIZE) + (p)->smba)
50 #define SMBHSTCMD(p) ((3 * REG_SIZE) + (p)->smba)
51 #define SMBHSTADD(p) ((4 * REG_SIZE) + (p)->smba)
52 #define SMBHSTDAT0(p) ((5 * REG_SIZE) + (p)->smba)
53 #define SMBHSTDAT1(p) ((6 * REG_SIZE) + (p)->smba)
54 #define SMBBLKDAT(p) ((7 * REG_SIZE) + (p)->smba)
55 #define SMBPEC(p) ((8 * REG_SIZE) + (p)->smba) /* ICH3 and later */
56 #define SMBAUXSTS(p) ((12 * REG_SIZE) + (p)->smba) /* ICH4 and later */
57 #define SMBAUXCTL(p) ((13 * REG_SIZE) + (p)->smba) /* ICH4 and later */
58
59 /* PCI Address Constants */
60 #define SMBBAR 4
61 #define SMBHSTCFG 0x040
62
63 /* Host configuration bits for SMBHSTCFG */
64 #define SMBHSTCFG_HST_EN 1
65 #define SMBHSTCFG_SMB_SMI_EN 2
66 #define SMBHSTCFG_I2C_EN 4
67
68 /* Auxiliary control register bits, ICH4+ only */
69 #define SMBAUXCTL_CRC 1
70 #define SMBAUXCTL_E32B 2
71
72 /* kill bit for SMBHSTCNT */
73 #define SMBHSTCNT_KILL 2
74
75 /* Other settings */
76 #define MAX_RETRIES 400
77 #define ENABLE_INT9 0 /* set to 0x01 to enable - untested */
78
79 /* I801 command constants */
80 #define I801_QUICK 0x00
81 #define I801_BYTE 0x04
82 #define I801_BYTE_DATA 0x08
83 #define I801_WORD_DATA 0x0C
84 #define I801_PROC_CALL 0x10 /* unimplemented */
85 #define I801_BLOCK_DATA 0x14
86 #define I801_I2C_BLOCK_DATA 0x18 /* ICH5 and later */
87 #define I801_BLOCK_LAST 0x34
88 #define I801_I2C_BLOCK_LAST 0x38 /* ICH5 and later */
89 #define I801_START 0x40
90 #define I801_PEC_EN 0x80 /* ICH3 and later */
91
92 /* I801 Hosts Status register bits */
93 #define SMBHSTSTS_BYTE_DONE 0x80
94 #define SMBHSTSTS_INUSE_STS 0x40
95 #define SMBHSTSTS_SMBALERT_STS 0x20
96 #define SMBHSTSTS_FAILED 0x10
97 #define SMBHSTSTS_BUS_ERR 0x08
98 #define SMBHSTSTS_DEV_ERR 0x04
99 #define SMBHSTSTS_INTR 0x02
100 #define SMBHSTSTS_HOST_BUSY 0x01
101
102 #define STATUS_FLAGS (SMBHSTSTS_BYTE_DONE | SMBHSTSTS_FAILED | SMBHSTSTS_BUS_ERR | SMBHSTSTS_DEV_ERR | SMBHSTSTS_INTR)
103
104 /* Older devices have their ID defined in <linux/pci_ids.h> */
105 #define PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS 0x1c22
106 #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS 0x1d22
107 /* Patsburg also has three 'Integrated Device Function' SMBus controllers */
108 #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0 0x1d70
109 #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1 0x1d71
110 #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2 0x1d72
111 #define PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS 0x1e22
112 #define PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS 0x2330
113 #define PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS 0x3b30
114 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS 0x8c22
115 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_SMBUS 0x9c22
116
117 #define FEATURE_SMBUS_PEC BIT(0)
118 #define FEATURE_BLOCK_BUFFER BIT(1)
119 #define FEATURE_BLOCK_PROC BIT(2)
120 #define FEATURE_I2C_BLOCK_READ BIT(3)
121 /* Not really a feature, but it's convenient to handle it as such */
122 #define FEATURE_IDF BIT(15)
123
124 // FIXME!
125 #undef inb_p
126 #define inb_p(a) readq((void __iomem *)a)
127 #undef outb_p
128 #define outb_p(d, a) writeq(d, (void __iomem *)a)
129
130 /* Make sure the SMBus host is ready to start transmitting.
131 * Return 0 if it is, -EBUSY if it is not.
132 */
i801_check_pre(struct i2c_device * priv)133 static int i801_check_pre(struct i2c_device *priv)
134 {
135 int status;
136
137 status = inb_p(SMBHSTSTS(priv));
138 if (status & SMBHSTSTS_HOST_BUSY) {
139 dev_err(&priv->adapter.dev, "SMBus is busy, can't use it! (status=%x)\n", status);
140 return -EBUSY;
141 }
142
143 status &= STATUS_FLAGS;
144 if (status) {
145 //dev_dbg(&priv->adapter.dev, "Clearing status flags (%02x)\n", status);
146 outb_p(status, SMBHSTSTS(priv));
147 status = inb_p(SMBHSTSTS(priv)) & STATUS_FLAGS;
148 if (status) {
149 dev_err(&priv->adapter.dev, "Failed clearing status flags (%02x)\n", status);
150 return -EBUSY;
151 }
152 }
153 return 0;
154 }
155
156 /* Convert the status register to an error code, and clear it. */
i801_check_post(struct i2c_device * priv,int status,int timeout)157 static int i801_check_post(struct i2c_device *priv, int status, int timeout)
158 {
159 int result = 0;
160
161 /* If the SMBus is still busy, we give up */
162 if (timeout) {
163 dev_err(&priv->adapter.dev, "Transaction timeout\n");
164 /* try to stop the current command */
165 dev_dbg(&priv->adapter.dev, "Terminating the current operation\n");
166 outb_p(inb_p(SMBHSTCNT(priv)) | SMBHSTCNT_KILL, SMBHSTCNT(priv));
167 usleep_range(1000, 2000);
168 outb_p(inb_p(SMBHSTCNT(priv)) & (~SMBHSTCNT_KILL), SMBHSTCNT(priv));
169
170 /* Check if it worked */
171 status = inb_p(SMBHSTSTS(priv));
172 if ((status & SMBHSTSTS_HOST_BUSY) || !(status & SMBHSTSTS_FAILED))
173 dev_err(&priv->adapter.dev, "Failed terminating the transaction\n");
174 outb_p(STATUS_FLAGS, SMBHSTSTS(priv));
175 return -ETIMEDOUT;
176 }
177
178 if (status & SMBHSTSTS_FAILED) {
179 result = -EIO;
180 dev_err(&priv->adapter.dev, "Transaction failed\n");
181 }
182 if (status & SMBHSTSTS_DEV_ERR) {
183 result = -ENXIO;
184 dev_dbg(&priv->adapter.dev, "No response\n");
185 }
186 if (status & SMBHSTSTS_BUS_ERR) {
187 result = -EAGAIN;
188 dev_dbg(&priv->adapter.dev, "Lost arbitration\n");
189 }
190
191 if (result) {
192 /* Clear error flags */
193 outb_p(status & STATUS_FLAGS, SMBHSTSTS(priv));
194 status = inb_p(SMBHSTSTS(priv)) & STATUS_FLAGS;
195 if (status)
196 dev_warn(&priv->adapter.dev, "Failed clearing status flags at end of transaction (%02x)\n", status);
197 }
198
199 return result;
200 }
201
i801_transaction(struct i2c_device * priv,int xact)202 static int i801_transaction(struct i2c_device *priv, int xact)
203 {
204 int status;
205 int result;
206 int timeout = 0;
207
208 result = i801_check_pre(priv);
209 if (result < 0)
210 return result;
211 /* the current contents of SMBHSTCNT can be overwritten, since PEC,
212 * INTREN, SMBSCMD are passed in xact
213 */
214 outb_p(xact | I801_START, SMBHSTCNT(priv));
215
216 /* We will always wait for a fraction of a second! */
217 do {
218 usleep_range(250, 500);
219 status = inb_p(SMBHSTSTS(priv));
220 } while ((status & SMBHSTSTS_HOST_BUSY) && (timeout++ < MAX_RETRIES));
221
222 result = i801_check_post(priv, status, timeout > MAX_RETRIES);
223 if (result < 0)
224 return result;
225
226 outb_p(SMBHSTSTS_INTR, SMBHSTSTS(priv));
227 return 0;
228 }
229
230 /* wait for INTR bit as advised by Intel */
i801_wait_hwpec(struct i2c_device * priv)231 static void i801_wait_hwpec(struct i2c_device *priv)
232 {
233 int timeout = 0;
234 int status;
235
236 do {
237 usleep_range(250, 500);
238 status = inb_p(SMBHSTSTS(priv));
239 } while ((!(status & SMBHSTSTS_INTR)) && (timeout++ < MAX_RETRIES));
240
241 if (timeout > MAX_RETRIES)
242 dev_dbg(&priv->adapter.dev, "PEC Timeout!\n");
243
244 outb_p(status, SMBHSTSTS(priv));
245 }
246
i801_block_transaction_by_block(struct i2c_device * priv,union i2c_smbus_data * data,char read_write,int hwpec)247 static int i801_block_transaction_by_block(struct i2c_device *priv, union i2c_smbus_data *data, char read_write, int hwpec)
248 {
249 int i, len;
250 int status;
251
252 inb_p(SMBHSTCNT(priv)); /* reset the data buffer index */
253
254 /* Use 32-byte buffer to process this transaction */
255 if (read_write == I2C_SMBUS_WRITE) {
256 len = data->block[0];
257 outb_p(len, SMBHSTDAT0(priv));
258 for (i = 0; i < len; i++)
259 outb_p(data->block[i + 1], SMBBLKDAT(priv));
260 }
261
262 status = i801_transaction(priv, I801_BLOCK_DATA | ENABLE_INT9 | I801_PEC_EN * hwpec);
263 if (status)
264 return status;
265
266 if (read_write == I2C_SMBUS_READ) {
267 len = inb_p(SMBHSTDAT0(priv));
268 if (len < 1 || len > I2C_SMBUS_BLOCK_MAX)
269 return -EPROTO;
270
271 data->block[0] = len;
272 for (i = 0; i < len; i++)
273 data->block[i + 1] = inb_p(SMBBLKDAT(priv));
274 }
275 return 0;
276 }
277
i801_block_transaction_byte_by_byte(struct i2c_device * priv,union i2c_smbus_data * data,char read_write,int command,int hwpec)278 static int i801_block_transaction_byte_by_byte(struct i2c_device *priv, union i2c_smbus_data *data, char read_write, int command, int hwpec)
279 {
280 int i, len;
281 int smbcmd;
282 int status;
283 int result;
284 int timeout;
285
286 result = i801_check_pre(priv);
287 if (result < 0)
288 return result;
289
290 len = data->block[0];
291
292 if (read_write == I2C_SMBUS_WRITE) {
293 outb_p(len, SMBHSTDAT0(priv));
294 outb_p(data->block[1], SMBBLKDAT(priv));
295 }
296
297 for (i = 1; i <= len; i++) {
298 if (i == len && read_write == I2C_SMBUS_READ) {
299 if (command == I2C_SMBUS_I2C_BLOCK_DATA)
300 smbcmd = I801_I2C_BLOCK_LAST;
301 else
302 smbcmd = I801_BLOCK_LAST;
303 } else {
304 if (command == I2C_SMBUS_I2C_BLOCK_DATA && read_write == I2C_SMBUS_READ)
305 smbcmd = I801_I2C_BLOCK_DATA;
306 else
307 smbcmd = I801_BLOCK_DATA;
308 }
309 outb_p(smbcmd | ENABLE_INT9, SMBHSTCNT(priv));
310
311 if (i == 1)
312 outb_p(inb(SMBHSTCNT(priv)) | I801_START, SMBHSTCNT(priv));
313 /* We will always wait for a fraction of a second! */
314 timeout = 0;
315 do {
316 usleep_range(250, 500);
317 status = inb_p(SMBHSTSTS(priv));
318 } while ((!(status & SMBHSTSTS_BYTE_DONE)) && (timeout++ < MAX_RETRIES));
319
320 result = i801_check_post(priv, status, timeout > MAX_RETRIES);
321 if (result < 0)
322 return result;
323 if (i == 1 && read_write == I2C_SMBUS_READ && command != I2C_SMBUS_I2C_BLOCK_DATA) {
324 len = inb_p(SMBHSTDAT0(priv));
325 if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) {
326 dev_err(&priv->adapter.dev, "Illegal SMBus block read size %d\n", len);
327 /* Recover */
328 while (inb_p(SMBHSTSTS(priv)) & SMBHSTSTS_HOST_BUSY)
329 outb_p(SMBHSTSTS_BYTE_DONE, SMBHSTSTS(priv));
330 outb_p(SMBHSTSTS_INTR, SMBHSTSTS(priv));
331 return -EPROTO;
332 }
333 data->block[0] = len;
334 }
335
336 /* Retrieve/store value in SMBBLKDAT */
337 if (read_write == I2C_SMBUS_READ)
338 data->block[i] = inb_p(SMBBLKDAT(priv));
339 if (read_write == I2C_SMBUS_WRITE && i + 1 <= len)
340 outb_p(data->block[i + 1], SMBBLKDAT(priv));
341 /* signals SMBBLKDAT ready */
342 outb_p(SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INTR, SMBHSTSTS(priv));
343 }
344
345 return 0;
346 }
347
i801_set_block_buffer_mode(struct i2c_device * priv)348 static int i801_set_block_buffer_mode(struct i2c_device *priv)
349 {
350 outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_E32B, SMBAUXCTL(priv));
351 if ((inb_p(SMBAUXCTL(priv)) & SMBAUXCTL_E32B) == 0)
352 return -EIO;
353 return 0;
354 }
355
356 /* Block transaction function */
i801_block_transaction(struct i2c_device * priv,union i2c_smbus_data * data,char read_write,int command,int hwpec)357 static int i801_block_transaction(struct i2c_device *priv, union i2c_smbus_data *data, char read_write, int command, int hwpec)
358 {
359 int result = 0;
360 //unsigned char hostc;
361
362 if (command == I2C_SMBUS_I2C_BLOCK_DATA) {
363 if (read_write == I2C_SMBUS_WRITE) {
364 /* set I2C_EN bit in configuration register */
365 //TODO: Figure out the right thing to do here...
366 //pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &hostc);
367 //pci_write_config_byte(priv->pci_dev, SMBHSTCFG, hostc | SMBHSTCFG_I2C_EN);
368 } else if (!(priv->features & FEATURE_I2C_BLOCK_READ)) {
369 dev_err(&priv->adapter.dev, "I2C block read is unsupported!\n");
370 return -EOPNOTSUPP;
371 }
372 }
373
374 if (read_write == I2C_SMBUS_WRITE || command == I2C_SMBUS_I2C_BLOCK_DATA) {
375 if (data->block[0] < 1)
376 data->block[0] = 1;
377 if (data->block[0] > I2C_SMBUS_BLOCK_MAX)
378 data->block[0] = I2C_SMBUS_BLOCK_MAX;
379 } else {
380 data->block[0] = 32; /* max for SMBus block reads */
381 }
382
383 /* Experience has shown that the block buffer can only be used for
384 * SMBus (not I2C) block transactions, even though the datasheet
385 * doesn't mention this limitation.
386 */
387 if ((priv->features & FEATURE_BLOCK_BUFFER) && command != I2C_SMBUS_I2C_BLOCK_DATA && i801_set_block_buffer_mode(priv) == 0)
388 result = i801_block_transaction_by_block(priv, data, read_write, hwpec);
389 else
390 result = i801_block_transaction_byte_by_byte(priv, data, read_write, command, hwpec);
391 if (result == 0 && hwpec)
392 i801_wait_hwpec(priv);
393 if (command == I2C_SMBUS_I2C_BLOCK_DATA && read_write == I2C_SMBUS_WRITE) {
394 /* restore saved configuration register value */
395 //TODO: Figure out the right thing to do here...
396 //pci_write_config_byte(priv->pci_dev, SMBHSTCFG, hostc);
397 }
398 return result;
399 }
400
401 /* Return negative errno on error. */
i801_access(struct i2c_adapter * adap,u16 addr,unsigned short flags,char read_write,u8 command,int size,union i2c_smbus_data * data)402 static s32 i801_access(struct i2c_adapter *adap, u16 addr, unsigned short flags, char read_write, u8 command, int size, union i2c_smbus_data *data)
403 {
404 int hwpec;
405 int block = 0;
406 int ret, xact = 0;
407 struct i2c_device *priv = i2c_get_adapdata(adap);
408
409 hwpec = (priv->features & FEATURE_SMBUS_PEC) && (flags & I2C_CLIENT_PEC) && size != I2C_SMBUS_QUICK && size != I2C_SMBUS_I2C_BLOCK_DATA;
410
411 switch (size) {
412 case I2C_SMBUS_QUICK:
413 dev_dbg(&priv->adapter.dev, " [acc] SMBUS_QUICK\n");
414 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), SMBHSTADD(priv));
415 xact = I801_QUICK;
416 break;
417 case I2C_SMBUS_BYTE:
418 dev_dbg(&priv->adapter.dev, " [acc] SMBUS_BYTE\n");
419
420 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), SMBHSTADD(priv));
421 if (read_write == I2C_SMBUS_WRITE)
422 outb_p(command, SMBHSTCMD(priv));
423 xact = I801_BYTE;
424 break;
425 case I2C_SMBUS_BYTE_DATA:
426 dev_dbg(&priv->adapter.dev, " [acc] SMBUS_BYTE_DATA\n");
427 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), SMBHSTADD(priv));
428 outb_p(command, SMBHSTCMD(priv));
429 if (read_write == I2C_SMBUS_WRITE)
430 outb_p(data->byte, SMBHSTDAT0(priv));
431 xact = I801_BYTE_DATA;
432 break;
433 case I2C_SMBUS_WORD_DATA:
434 dev_dbg(&priv->adapter.dev, " [acc] SMBUS_WORD_DATA\n");
435 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), SMBHSTADD(priv));
436 outb_p(command, SMBHSTCMD(priv));
437 if (read_write == I2C_SMBUS_WRITE) {
438 outb_p(data->word & 0xff, SMBHSTDAT0(priv));
439 outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv));
440 }
441 xact = I801_WORD_DATA;
442 break;
443 case I2C_SMBUS_BLOCK_DATA:
444 dev_dbg(&priv->adapter.dev, " [acc] SMBUS_BLOCK_DATA\n");
445 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), SMBHSTADD(priv));
446 outb_p(command, SMBHSTCMD(priv));
447 block = 1;
448 break;
449 case I2C_SMBUS_I2C_BLOCK_DATA:
450 dev_dbg(&priv->adapter.dev, " [acc] SMBUS_I2C_BLOCK_DATA\n");
451 /* NB: page 240 of ICH5 datasheet shows that the R/#W
452 * bit should be cleared here, even when reading
453 */
454 outb_p((addr & 0x7f) << 1, SMBHSTADD(priv));
455 if (read_write == I2C_SMBUS_READ) {
456 /* NB: page 240 of ICH5 datasheet also shows
457 * that DATA1 is the cmd field when reading
458 */
459 outb_p(command, SMBHSTDAT1(priv));
460 } else {
461 outb_p(command, SMBHSTCMD(priv));
462 }
463 block = 1;
464 break;
465 default:
466 dev_dbg(&priv->adapter.dev, " [acc] Unsupported transaction %d\n", size);
467 return -EOPNOTSUPP;
468 }
469
470 if (hwpec) { /* enable/disable hardware PEC */
471 dev_dbg(&priv->adapter.dev, " [acc] hwpec: yes\n");
472 outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_CRC, SMBAUXCTL(priv));
473 } else {
474 dev_dbg(&priv->adapter.dev, " [acc] hwpec: no\n");
475 outb_p(inb_p(SMBAUXCTL(priv)) & (~SMBAUXCTL_CRC), SMBAUXCTL(priv));
476 }
477
478 if (block) {
479 //ret = 0;
480 dev_dbg(&priv->adapter.dev, " [acc] block: yes\n");
481 ret = i801_block_transaction(priv, data, read_write, size, hwpec);
482 } else {
483 dev_dbg(&priv->adapter.dev, " [acc] block: no\n");
484 ret = i801_transaction(priv, xact | ENABLE_INT9);
485 }
486
487 /* Some BIOSes don't like it when PEC is enabled at reboot or resume
488 * time, so we forcibly disable it after every transaction. Turn off
489 * E32B for the same reason.
490 */
491 if (hwpec || block) {
492 dev_dbg(&priv->adapter.dev, " [acc] hwpec || block\n");
493 outb_p(inb_p(SMBAUXCTL(priv)) & ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv));
494 }
495 if (block) {
496 dev_dbg(&priv->adapter.dev, " [acc] block\n");
497 return ret;
498 }
499 if (ret) {
500 dev_dbg(&priv->adapter.dev, " [acc] ret %d\n", ret);
501 return ret;
502 }
503 if ((read_write == I2C_SMBUS_WRITE) || (xact == I801_QUICK)) {
504 dev_dbg(&priv->adapter.dev, " [acc] I2C_SMBUS_WRITE || I801_QUICK -> ret 0\n");
505 return 0;
506 }
507
508 switch (xact & 0x7f) {
509 case I801_BYTE: /* Result put in SMBHSTDAT0 */
510 case I801_BYTE_DATA:
511 dev_dbg(&priv->adapter.dev, " [acc] I801_BYTE or I801_BYTE_DATA\n");
512 data->byte = inb_p(SMBHSTDAT0(priv));
513 break;
514 case I801_WORD_DATA:
515 dev_dbg(&priv->adapter.dev, " [acc] I801_WORD_DATA\n");
516 data->word = inb_p(SMBHSTDAT0(priv)) + (inb_p(SMBHSTDAT1(priv)) << 8);
517 break;
518 }
519 return 0;
520 }
521
i801_func(struct i2c_adapter * adapter)522 static u32 i801_func(struct i2c_adapter *adapter)
523 {
524 struct i2c_device *priv = i2c_get_adapdata(adapter);
525
526 /* original settings
527 * u32 f = I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
528 * I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
529 * I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK |
530 * ((priv->features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0) |
531 * ((priv->features & FEATURE_I2C_BLOCK_READ) ?
532 * I2C_FUNC_SMBUS_READ_I2C_BLOCK : 0);
533 */
534
535 // http://lxr.free-electrons.com/source/include/uapi/linux/i2c.h#L85
536
537 u32 f =
538 I2C_FUNC_I2C | /* 0x00000001 (I enabled this one) */
539 !I2C_FUNC_10BIT_ADDR | /* 0x00000002 */
540 !I2C_FUNC_PROTOCOL_MANGLING | /* 0x00000004 */
541 ((priv->features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0) | /* 0x00000008 */
542 !I2C_FUNC_SMBUS_BLOCK_PROC_CALL | /* 0x00008000 */
543 I2C_FUNC_SMBUS_QUICK | /* 0x00010000 */
544 !I2C_FUNC_SMBUS_READ_BYTE | /* 0x00020000 */
545 !I2C_FUNC_SMBUS_WRITE_BYTE | /* 0x00040000 */
546 !I2C_FUNC_SMBUS_READ_BYTE_DATA | /* 0x00080000 */
547 !I2C_FUNC_SMBUS_WRITE_BYTE_DATA | /* 0x00100000 */
548 !I2C_FUNC_SMBUS_READ_WORD_DATA | /* 0x00200000 */
549 !I2C_FUNC_SMBUS_WRITE_WORD_DATA | /* 0x00400000 */
550 !I2C_FUNC_SMBUS_PROC_CALL | /* 0x00800000 */
551 !I2C_FUNC_SMBUS_READ_BLOCK_DATA | /* 0x01000000 */
552 !I2C_FUNC_SMBUS_WRITE_BLOCK_DATA | /* 0x02000000 */
553 ((priv->features & FEATURE_I2C_BLOCK_READ) ? I2C_FUNC_SMBUS_READ_I2C_BLOCK : 0) | /* 0x04000000 */
554 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK | /* 0x08000000 */
555
556 I2C_FUNC_SMBUS_BYTE | /* _READ_BYTE _WRITE_BYTE */
557 I2C_FUNC_SMBUS_BYTE_DATA | /* _READ_BYTE_DATA _WRITE_BYTE_DATA */
558 I2C_FUNC_SMBUS_WORD_DATA | /* _READ_WORD_DATA _WRITE_WORD_DATA */
559 I2C_FUNC_SMBUS_BLOCK_DATA | /* _READ_BLOCK_DATA _WRITE_BLOCK_DATA */
560 !I2C_FUNC_SMBUS_I2C_BLOCK | /* _READ_I2C_BLOCK _WRITE_I2C_BLOCK */
561 !I2C_FUNC_SMBUS_EMUL; /* _QUICK _BYTE _BYTE_DATA _WORD_DATA _PROC_CALL _WRITE_BLOCK_DATA _I2C_BLOCK _PEC */
562 return f;
563 }
564
565 static const struct i2c_algorithm smbus_algorithm = {
566 .smbus_xfer = i801_access,
567 .functionality = i801_func,
568 };
569
570 /********************************
571 *** Part 2 - Driver Handlers ***
572 ********************************/
pi2c_probe(struct platform_device * pldev)573 static int pi2c_probe(struct platform_device *pldev)
574 {
575 int err;
576 struct i2c_device *priv;
577 struct resource *res;
578
579 priv = devm_kzalloc(&pldev->dev, sizeof(*priv), GFP_KERNEL);
580 if (!priv)
581 return -ENOMEM;
582
583 i2c_set_adapdata(&priv->adapter, priv);
584 priv->adapter.owner = THIS_MODULE;
585 priv->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
586 priv->adapter.algo = &smbus_algorithm;
587
588 res = platform_get_resource(pldev, IORESOURCE_MEM, 0);
589 if (!res)
590 return -ENXIO;
591
592 priv->smba = (unsigned long)devm_ioremap_nocache(&pldev->dev,
593 res->start,
594 resource_size(res));
595 if (!priv->smba)
596 return -ENOMEM;
597
598 platform_set_drvdata(pldev, priv);
599
600 priv->features |= FEATURE_IDF;
601 priv->features |= FEATURE_I2C_BLOCK_READ;
602 priv->features |= FEATURE_SMBUS_PEC;
603 priv->features |= FEATURE_BLOCK_BUFFER;
604
605 //init_MUTEX(&lddata->sem);
606
607 /* set up the sysfs linkage to our parent device */
608 priv->adapter.dev.parent = &pldev->dev;
609
610 /* Retry up to 3 times on lost arbitration */
611 priv->adapter.retries = 3;
612
613 //snprintf(priv->adapter.name, sizeof(priv->adapter.name), "Fake SMBus I801 adapter at %04lx", priv->smba);
614 snprintf(priv->adapter.name, sizeof(priv->adapter.name), "Fake SMBus I801 adapter");
615
616 err = i2c_add_adapter(&priv->adapter);
617 if (err) {
618 dev_err(&priv->adapter.dev, "Failed to add SMBus adapter\n");
619 return err;
620 }
621
622 return 0;
623 }
624
pi2c_remove(struct platform_device * pldev)625 static int pi2c_remove(struct platform_device *pldev)
626 {
627 struct i2c_device *lddev;
628
629 lddev = (struct i2c_device *)platform_get_drvdata(pldev);
630
631 i2c_del_adapter(&lddev->adapter);
632
633 //TODO: Figure out the right thing to do here...
634 //pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg);
635 //pci_release_region(dev, SMBBAR);
636 //pci_set_drvdata(dev, NULL);
637
638 //cdev_del(&lddev->cdev);
639
640 return 0;
641 }
642
643 static struct platform_driver i2c_plat_driver_i = {
644 .probe = pi2c_probe,
645 .remove = pi2c_remove,
646 .driver = {
647 .name = KP_DRIVER_NAME_I2C,
648 },
649 };
650
651 module_platform_driver(i2c_plat_driver_i);
652