1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2012-2015 Spreadtrum Communications Inc.
4 */
5
6 #if defined(CONFIG_SERIAL_SPRD_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
7 #define SUPPORT_SYSRQ
8 #endif
9
10 #include <linux/clk.h>
11 #include <linux/console.h>
12 #include <linux/delay.h>
13 #include <linux/dmaengine.h>
14 #include <linux/dma-mapping.h>
15 #include <linux/dma/sprd-dma.h>
16 #include <linux/io.h>
17 #include <linux/ioport.h>
18 #include <linux/kernel.h>
19 #include <linux/module.h>
20 #include <linux/of.h>
21 #include <linux/platform_device.h>
22 #include <linux/serial_core.h>
23 #include <linux/serial.h>
24 #include <linux/slab.h>
25 #include <linux/tty.h>
26 #include <linux/tty_flip.h>
27
28 /* device name */
29 #define UART_NR_MAX 8
30 #define SPRD_TTY_NAME "ttyS"
31 #define SPRD_FIFO_SIZE 128
32 #define SPRD_DEF_RATE 26000000
33 #define SPRD_BAUD_IO_LIMIT 3000000
34 #define SPRD_TIMEOUT 256000
35
36 /* the offset of serial registers and BITs for them */
37 /* data registers */
38 #define SPRD_TXD 0x0000
39 #define SPRD_RXD 0x0004
40
41 /* line status register and its BITs */
42 #define SPRD_LSR 0x0008
43 #define SPRD_LSR_OE BIT(4)
44 #define SPRD_LSR_FE BIT(3)
45 #define SPRD_LSR_PE BIT(2)
46 #define SPRD_LSR_BI BIT(7)
47 #define SPRD_LSR_TX_OVER BIT(15)
48
49 /* data number in TX and RX fifo */
50 #define SPRD_STS1 0x000C
51 #define SPRD_RX_FIFO_CNT_MASK GENMASK(7, 0)
52 #define SPRD_TX_FIFO_CNT_MASK GENMASK(15, 8)
53
54 /* interrupt enable register and its BITs */
55 #define SPRD_IEN 0x0010
56 #define SPRD_IEN_RX_FULL BIT(0)
57 #define SPRD_IEN_TX_EMPTY BIT(1)
58 #define SPRD_IEN_BREAK_DETECT BIT(7)
59 #define SPRD_IEN_TIMEOUT BIT(13)
60
61 /* interrupt clear register */
62 #define SPRD_ICLR 0x0014
63 #define SPRD_ICLR_TIMEOUT BIT(13)
64
65 /* line control register */
66 #define SPRD_LCR 0x0018
67 #define SPRD_LCR_STOP_1BIT 0x10
68 #define SPRD_LCR_STOP_2BIT 0x30
69 #define SPRD_LCR_DATA_LEN (BIT(2) | BIT(3))
70 #define SPRD_LCR_DATA_LEN5 0x0
71 #define SPRD_LCR_DATA_LEN6 0x4
72 #define SPRD_LCR_DATA_LEN7 0x8
73 #define SPRD_LCR_DATA_LEN8 0xc
74 #define SPRD_LCR_PARITY (BIT(0) | BIT(1))
75 #define SPRD_LCR_PARITY_EN 0x2
76 #define SPRD_LCR_EVEN_PAR 0x0
77 #define SPRD_LCR_ODD_PAR 0x1
78
79 /* control register 1 */
80 #define SPRD_CTL1 0x001C
81 #define SPRD_DMA_EN BIT(15)
82 #define SPRD_LOOPBACK_EN BIT(14)
83 #define RX_HW_FLOW_CTL_THLD BIT(6)
84 #define RX_HW_FLOW_CTL_EN BIT(7)
85 #define TX_HW_FLOW_CTL_EN BIT(8)
86 #define RX_TOUT_THLD_DEF 0x3E00
87 #define RX_HFC_THLD_DEF 0x40
88
89 /* fifo threshold register */
90 #define SPRD_CTL2 0x0020
91 #define THLD_TX_EMPTY 0x40
92 #define THLD_TX_EMPTY_SHIFT 8
93 #define THLD_RX_FULL 0x40
94 #define THLD_RX_FULL_MASK GENMASK(6, 0)
95
96 /* config baud rate register */
97 #define SPRD_CLKD0 0x0024
98 #define SPRD_CLKD0_MASK GENMASK(15, 0)
99 #define SPRD_CLKD1 0x0028
100 #define SPRD_CLKD1_MASK GENMASK(20, 16)
101 #define SPRD_CLKD1_SHIFT 16
102
103 /* interrupt mask status register */
104 #define SPRD_IMSR 0x002C
105 #define SPRD_IMSR_RX_FIFO_FULL BIT(0)
106 #define SPRD_IMSR_TX_FIFO_EMPTY BIT(1)
107 #define SPRD_IMSR_BREAK_DETECT BIT(7)
108 #define SPRD_IMSR_TIMEOUT BIT(13)
109 #define SPRD_DEFAULT_SOURCE_CLK 26000000
110
111 #define SPRD_RX_DMA_STEP 1
112 #define SPRD_RX_FIFO_FULL 1
113 #define SPRD_TX_FIFO_FULL 0x20
114 #define SPRD_UART_RX_SIZE (UART_XMIT_SIZE / 4)
115
116 struct sprd_uart_dma {
117 struct dma_chan *chn;
118 unsigned char *virt;
119 dma_addr_t phys_addr;
120 dma_cookie_t cookie;
121 u32 trans_len;
122 bool enable;
123 };
124
125 struct sprd_uart_port {
126 struct uart_port port;
127 char name[16];
128 struct clk *clk;
129 struct sprd_uart_dma tx_dma;
130 struct sprd_uart_dma rx_dma;
131 dma_addr_t pos;
132 unsigned char *rx_buf_tail;
133 };
134
135 static struct sprd_uart_port *sprd_port[UART_NR_MAX];
136 static int sprd_ports_num;
137
138 static int sprd_start_dma_rx(struct uart_port *port);
139 static int sprd_tx_dma_config(struct uart_port *port);
140
serial_in(struct uart_port * port,unsigned int offset)141 static inline unsigned int serial_in(struct uart_port *port,
142 unsigned int offset)
143 {
144 return readl_relaxed(port->membase + offset);
145 }
146
serial_out(struct uart_port * port,unsigned int offset,int value)147 static inline void serial_out(struct uart_port *port, unsigned int offset,
148 int value)
149 {
150 writel_relaxed(value, port->membase + offset);
151 }
152
sprd_tx_empty(struct uart_port * port)153 static unsigned int sprd_tx_empty(struct uart_port *port)
154 {
155 if (serial_in(port, SPRD_STS1) & SPRD_TX_FIFO_CNT_MASK)
156 return 0;
157 else
158 return TIOCSER_TEMT;
159 }
160
sprd_get_mctrl(struct uart_port * port)161 static unsigned int sprd_get_mctrl(struct uart_port *port)
162 {
163 return TIOCM_DSR | TIOCM_CTS;
164 }
165
sprd_set_mctrl(struct uart_port * port,unsigned int mctrl)166 static void sprd_set_mctrl(struct uart_port *port, unsigned int mctrl)
167 {
168 u32 val = serial_in(port, SPRD_CTL1);
169
170 if (mctrl & TIOCM_LOOP)
171 val |= SPRD_LOOPBACK_EN;
172 else
173 val &= ~SPRD_LOOPBACK_EN;
174
175 serial_out(port, SPRD_CTL1, val);
176 }
177
sprd_stop_rx(struct uart_port * port)178 static void sprd_stop_rx(struct uart_port *port)
179 {
180 struct sprd_uart_port *sp =
181 container_of(port, struct sprd_uart_port, port);
182 unsigned int ien, iclr;
183
184 if (sp->rx_dma.enable)
185 dmaengine_terminate_all(sp->rx_dma.chn);
186
187 iclr = serial_in(port, SPRD_ICLR);
188 ien = serial_in(port, SPRD_IEN);
189
190 ien &= ~(SPRD_IEN_RX_FULL | SPRD_IEN_BREAK_DETECT);
191 iclr |= SPRD_IEN_RX_FULL | SPRD_IEN_BREAK_DETECT;
192
193 serial_out(port, SPRD_IEN, ien);
194 serial_out(port, SPRD_ICLR, iclr);
195 }
196
sprd_uart_dma_enable(struct uart_port * port,bool enable)197 static void sprd_uart_dma_enable(struct uart_port *port, bool enable)
198 {
199 u32 val = serial_in(port, SPRD_CTL1);
200
201 if (enable)
202 val |= SPRD_DMA_EN;
203 else
204 val &= ~SPRD_DMA_EN;
205
206 serial_out(port, SPRD_CTL1, val);
207 }
208
sprd_stop_tx_dma(struct uart_port * port)209 static void sprd_stop_tx_dma(struct uart_port *port)
210 {
211 struct sprd_uart_port *sp =
212 container_of(port, struct sprd_uart_port, port);
213 struct circ_buf *xmit = &port->state->xmit;
214 struct dma_tx_state state;
215 u32 trans_len;
216
217 dmaengine_pause(sp->tx_dma.chn);
218
219 dmaengine_tx_status(sp->tx_dma.chn, sp->tx_dma.cookie, &state);
220 if (state.residue) {
221 trans_len = state.residue - sp->tx_dma.phys_addr;
222 xmit->tail = (xmit->tail + trans_len) & (UART_XMIT_SIZE - 1);
223 port->icount.tx += trans_len;
224 dma_unmap_single(port->dev, sp->tx_dma.phys_addr,
225 sp->tx_dma.trans_len, DMA_TO_DEVICE);
226 }
227
228 dmaengine_terminate_all(sp->tx_dma.chn);
229 sp->tx_dma.trans_len = 0;
230 }
231
sprd_tx_buf_remap(struct uart_port * port)232 static int sprd_tx_buf_remap(struct uart_port *port)
233 {
234 struct sprd_uart_port *sp =
235 container_of(port, struct sprd_uart_port, port);
236 struct circ_buf *xmit = &port->state->xmit;
237
238 sp->tx_dma.trans_len =
239 CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
240
241 sp->tx_dma.phys_addr = dma_map_single(port->dev,
242 (void *)&(xmit->buf[xmit->tail]),
243 sp->tx_dma.trans_len,
244 DMA_TO_DEVICE);
245 return dma_mapping_error(port->dev, sp->tx_dma.phys_addr);
246 }
247
sprd_complete_tx_dma(void * data)248 static void sprd_complete_tx_dma(void *data)
249 {
250 struct uart_port *port = (struct uart_port *)data;
251 struct sprd_uart_port *sp =
252 container_of(port, struct sprd_uart_port, port);
253 struct circ_buf *xmit = &port->state->xmit;
254 unsigned long flags;
255
256 spin_lock_irqsave(&port->lock, flags);
257 dma_unmap_single(port->dev, sp->tx_dma.phys_addr,
258 sp->tx_dma.trans_len, DMA_TO_DEVICE);
259
260 xmit->tail = (xmit->tail + sp->tx_dma.trans_len) & (UART_XMIT_SIZE - 1);
261 port->icount.tx += sp->tx_dma.trans_len;
262
263 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
264 uart_write_wakeup(port);
265
266 if (uart_circ_empty(xmit) || sprd_tx_buf_remap(port) ||
267 sprd_tx_dma_config(port))
268 sp->tx_dma.trans_len = 0;
269
270 spin_unlock_irqrestore(&port->lock, flags);
271 }
272
sprd_uart_dma_submit(struct uart_port * port,struct sprd_uart_dma * ud,u32 trans_len,enum dma_transfer_direction direction,dma_async_tx_callback callback)273 static int sprd_uart_dma_submit(struct uart_port *port,
274 struct sprd_uart_dma *ud, u32 trans_len,
275 enum dma_transfer_direction direction,
276 dma_async_tx_callback callback)
277 {
278 struct dma_async_tx_descriptor *dma_des;
279 unsigned long flags;
280
281 flags = SPRD_DMA_FLAGS(SPRD_DMA_CHN_MODE_NONE,
282 SPRD_DMA_NO_TRG,
283 SPRD_DMA_FRAG_REQ,
284 SPRD_DMA_TRANS_INT);
285
286 dma_des = dmaengine_prep_slave_single(ud->chn, ud->phys_addr, trans_len,
287 direction, flags);
288 if (!dma_des)
289 return -ENODEV;
290
291 dma_des->callback = callback;
292 dma_des->callback_param = port;
293
294 ud->cookie = dmaengine_submit(dma_des);
295 if (dma_submit_error(ud->cookie))
296 return dma_submit_error(ud->cookie);
297
298 dma_async_issue_pending(ud->chn);
299
300 return 0;
301 }
302
sprd_tx_dma_config(struct uart_port * port)303 static int sprd_tx_dma_config(struct uart_port *port)
304 {
305 struct sprd_uart_port *sp =
306 container_of(port, struct sprd_uart_port, port);
307 u32 burst = sp->tx_dma.trans_len > SPRD_TX_FIFO_FULL ?
308 SPRD_TX_FIFO_FULL : sp->tx_dma.trans_len;
309 int ret;
310 struct dma_slave_config cfg = {
311 .dst_addr = port->mapbase + SPRD_TXD,
312 .src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE,
313 .dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE,
314 .src_maxburst = burst,
315 };
316
317 ret = dmaengine_slave_config(sp->tx_dma.chn, &cfg);
318 if (ret < 0)
319 return ret;
320
321 return sprd_uart_dma_submit(port, &sp->tx_dma, sp->tx_dma.trans_len,
322 DMA_MEM_TO_DEV, sprd_complete_tx_dma);
323 }
324
sprd_start_tx_dma(struct uart_port * port)325 static void sprd_start_tx_dma(struct uart_port *port)
326 {
327 struct sprd_uart_port *sp =
328 container_of(port, struct sprd_uart_port, port);
329 struct circ_buf *xmit = &port->state->xmit;
330
331 if (port->x_char) {
332 serial_out(port, SPRD_TXD, port->x_char);
333 port->icount.tx++;
334 port->x_char = 0;
335 return;
336 }
337
338 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
339 sprd_stop_tx_dma(port);
340 return;
341 }
342
343 if (sp->tx_dma.trans_len)
344 return;
345
346 if (sprd_tx_buf_remap(port) || sprd_tx_dma_config(port))
347 sp->tx_dma.trans_len = 0;
348 }
349
sprd_rx_full_thld(struct uart_port * port,u32 thld)350 static void sprd_rx_full_thld(struct uart_port *port, u32 thld)
351 {
352 u32 val = serial_in(port, SPRD_CTL2);
353
354 val &= ~THLD_RX_FULL_MASK;
355 val |= thld & THLD_RX_FULL_MASK;
356 serial_out(port, SPRD_CTL2, val);
357 }
358
sprd_rx_alloc_buf(struct sprd_uart_port * sp)359 static int sprd_rx_alloc_buf(struct sprd_uart_port *sp)
360 {
361 sp->rx_dma.virt = dma_alloc_coherent(sp->port.dev, SPRD_UART_RX_SIZE,
362 &sp->rx_dma.phys_addr, GFP_KERNEL);
363 if (!sp->rx_dma.virt)
364 return -ENOMEM;
365
366 return 0;
367 }
368
sprd_rx_free_buf(struct sprd_uart_port * sp)369 static void sprd_rx_free_buf(struct sprd_uart_port *sp)
370 {
371 if (sp->rx_dma.virt)
372 dma_free_coherent(sp->port.dev, SPRD_UART_RX_SIZE,
373 sp->rx_dma.virt, sp->rx_dma.phys_addr);
374
375 }
376
sprd_rx_dma_config(struct uart_port * port,u32 burst)377 static int sprd_rx_dma_config(struct uart_port *port, u32 burst)
378 {
379 struct sprd_uart_port *sp =
380 container_of(port, struct sprd_uart_port, port);
381 struct dma_slave_config cfg = {
382 .src_addr = port->mapbase + SPRD_RXD,
383 .src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE,
384 .dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE,
385 .src_maxburst = burst,
386 };
387
388 return dmaengine_slave_config(sp->rx_dma.chn, &cfg);
389 }
390
sprd_uart_dma_rx(struct uart_port * port)391 static void sprd_uart_dma_rx(struct uart_port *port)
392 {
393 struct sprd_uart_port *sp =
394 container_of(port, struct sprd_uart_port, port);
395 struct tty_port *tty = &port->state->port;
396
397 port->icount.rx += sp->rx_dma.trans_len;
398 tty_insert_flip_string(tty, sp->rx_buf_tail, sp->rx_dma.trans_len);
399 tty_flip_buffer_push(tty);
400 }
401
sprd_uart_dma_irq(struct uart_port * port)402 static void sprd_uart_dma_irq(struct uart_port *port)
403 {
404 struct sprd_uart_port *sp =
405 container_of(port, struct sprd_uart_port, port);
406 struct dma_tx_state state;
407 enum dma_status status;
408
409 status = dmaengine_tx_status(sp->rx_dma.chn,
410 sp->rx_dma.cookie, &state);
411 if (status == DMA_ERROR)
412 sprd_stop_rx(port);
413
414 if (!state.residue && sp->pos == sp->rx_dma.phys_addr)
415 return;
416
417 if (!state.residue) {
418 sp->rx_dma.trans_len = SPRD_UART_RX_SIZE +
419 sp->rx_dma.phys_addr - sp->pos;
420 sp->pos = sp->rx_dma.phys_addr;
421 } else {
422 sp->rx_dma.trans_len = state.residue - sp->pos;
423 sp->pos = state.residue;
424 }
425
426 sprd_uart_dma_rx(port);
427 sp->rx_buf_tail += sp->rx_dma.trans_len;
428 }
429
sprd_complete_rx_dma(void * data)430 static void sprd_complete_rx_dma(void *data)
431 {
432 struct uart_port *port = (struct uart_port *)data;
433 struct sprd_uart_port *sp =
434 container_of(port, struct sprd_uart_port, port);
435 struct dma_tx_state state;
436 enum dma_status status;
437 unsigned long flags;
438
439 spin_lock_irqsave(&port->lock, flags);
440
441 status = dmaengine_tx_status(sp->rx_dma.chn,
442 sp->rx_dma.cookie, &state);
443 if (status != DMA_COMPLETE) {
444 sprd_stop_rx(port);
445 spin_unlock_irqrestore(&port->lock, flags);
446 return;
447 }
448
449 if (sp->pos != sp->rx_dma.phys_addr) {
450 sp->rx_dma.trans_len = SPRD_UART_RX_SIZE +
451 sp->rx_dma.phys_addr - sp->pos;
452 sprd_uart_dma_rx(port);
453 sp->rx_buf_tail += sp->rx_dma.trans_len;
454 }
455
456 if (sprd_start_dma_rx(port))
457 sprd_stop_rx(port);
458
459 spin_unlock_irqrestore(&port->lock, flags);
460 }
461
sprd_start_dma_rx(struct uart_port * port)462 static int sprd_start_dma_rx(struct uart_port *port)
463 {
464 struct sprd_uart_port *sp =
465 container_of(port, struct sprd_uart_port, port);
466 int ret;
467
468 if (!sp->rx_dma.enable)
469 return 0;
470
471 sp->pos = sp->rx_dma.phys_addr;
472 sp->rx_buf_tail = sp->rx_dma.virt;
473 sprd_rx_full_thld(port, SPRD_RX_FIFO_FULL);
474 ret = sprd_rx_dma_config(port, SPRD_RX_DMA_STEP);
475 if (ret)
476 return ret;
477
478 return sprd_uart_dma_submit(port, &sp->rx_dma, SPRD_UART_RX_SIZE,
479 DMA_DEV_TO_MEM, sprd_complete_rx_dma);
480 }
481
sprd_release_dma(struct uart_port * port)482 static void sprd_release_dma(struct uart_port *port)
483 {
484 struct sprd_uart_port *sp =
485 container_of(port, struct sprd_uart_port, port);
486
487 sprd_uart_dma_enable(port, false);
488
489 if (sp->rx_dma.enable)
490 dma_release_channel(sp->rx_dma.chn);
491
492 if (sp->tx_dma.enable)
493 dma_release_channel(sp->tx_dma.chn);
494
495 sp->tx_dma.enable = false;
496 sp->rx_dma.enable = false;
497 }
498
sprd_request_dma(struct uart_port * port)499 static void sprd_request_dma(struct uart_port *port)
500 {
501 struct sprd_uart_port *sp =
502 container_of(port, struct sprd_uart_port, port);
503
504 sp->tx_dma.enable = true;
505 sp->rx_dma.enable = true;
506
507 sp->tx_dma.chn = dma_request_chan(port->dev, "tx");
508 if (IS_ERR(sp->tx_dma.chn)) {
509 dev_err(port->dev, "request TX DMA channel failed, ret = %ld\n",
510 PTR_ERR(sp->tx_dma.chn));
511 sp->tx_dma.enable = false;
512 }
513
514 sp->rx_dma.chn = dma_request_chan(port->dev, "rx");
515 if (IS_ERR(sp->rx_dma.chn)) {
516 dev_err(port->dev, "request RX DMA channel failed, ret = %ld\n",
517 PTR_ERR(sp->rx_dma.chn));
518 sp->rx_dma.enable = false;
519 }
520 }
521
sprd_stop_tx(struct uart_port * port)522 static void sprd_stop_tx(struct uart_port *port)
523 {
524 struct sprd_uart_port *sp = container_of(port, struct sprd_uart_port,
525 port);
526 unsigned int ien, iclr;
527
528 if (sp->tx_dma.enable) {
529 sprd_stop_tx_dma(port);
530 return;
531 }
532
533 iclr = serial_in(port, SPRD_ICLR);
534 ien = serial_in(port, SPRD_IEN);
535
536 iclr |= SPRD_IEN_TX_EMPTY;
537 ien &= ~SPRD_IEN_TX_EMPTY;
538
539 serial_out(port, SPRD_IEN, ien);
540 serial_out(port, SPRD_ICLR, iclr);
541 }
542
sprd_start_tx(struct uart_port * port)543 static void sprd_start_tx(struct uart_port *port)
544 {
545 struct sprd_uart_port *sp = container_of(port, struct sprd_uart_port,
546 port);
547 unsigned int ien;
548
549 if (sp->tx_dma.enable) {
550 sprd_start_tx_dma(port);
551 return;
552 }
553
554 ien = serial_in(port, SPRD_IEN);
555 if (!(ien & SPRD_IEN_TX_EMPTY)) {
556 ien |= SPRD_IEN_TX_EMPTY;
557 serial_out(port, SPRD_IEN, ien);
558 }
559 }
560
561 /* The Sprd serial does not support this function. */
sprd_break_ctl(struct uart_port * port,int break_state)562 static void sprd_break_ctl(struct uart_port *port, int break_state)
563 {
564 /* nothing to do */
565 }
566
handle_lsr_errors(struct uart_port * port,unsigned int * flag,unsigned int * lsr)567 static int handle_lsr_errors(struct uart_port *port,
568 unsigned int *flag,
569 unsigned int *lsr)
570 {
571 int ret = 0;
572
573 /* statistics */
574 if (*lsr & SPRD_LSR_BI) {
575 *lsr &= ~(SPRD_LSR_FE | SPRD_LSR_PE);
576 port->icount.brk++;
577 ret = uart_handle_break(port);
578 if (ret)
579 return ret;
580 } else if (*lsr & SPRD_LSR_PE)
581 port->icount.parity++;
582 else if (*lsr & SPRD_LSR_FE)
583 port->icount.frame++;
584 if (*lsr & SPRD_LSR_OE)
585 port->icount.overrun++;
586
587 /* mask off conditions which should be ignored */
588 *lsr &= port->read_status_mask;
589 if (*lsr & SPRD_LSR_BI)
590 *flag = TTY_BREAK;
591 else if (*lsr & SPRD_LSR_PE)
592 *flag = TTY_PARITY;
593 else if (*lsr & SPRD_LSR_FE)
594 *flag = TTY_FRAME;
595
596 return ret;
597 }
598
sprd_rx(struct uart_port * port)599 static inline void sprd_rx(struct uart_port *port)
600 {
601 struct sprd_uart_port *sp = container_of(port, struct sprd_uart_port,
602 port);
603 struct tty_port *tty = &port->state->port;
604 unsigned int ch, flag, lsr, max_count = SPRD_TIMEOUT;
605
606 if (sp->rx_dma.enable) {
607 sprd_uart_dma_irq(port);
608 return;
609 }
610
611 while ((serial_in(port, SPRD_STS1) & SPRD_RX_FIFO_CNT_MASK) &&
612 max_count--) {
613 lsr = serial_in(port, SPRD_LSR);
614 ch = serial_in(port, SPRD_RXD);
615 flag = TTY_NORMAL;
616 port->icount.rx++;
617
618 if (lsr & (SPRD_LSR_BI | SPRD_LSR_PE |
619 SPRD_LSR_FE | SPRD_LSR_OE))
620 if (handle_lsr_errors(port, &flag, &lsr))
621 continue;
622 if (uart_handle_sysrq_char(port, ch))
623 continue;
624
625 uart_insert_char(port, lsr, SPRD_LSR_OE, ch, flag);
626 }
627
628 tty_flip_buffer_push(tty);
629 }
630
sprd_tx(struct uart_port * port)631 static inline void sprd_tx(struct uart_port *port)
632 {
633 struct circ_buf *xmit = &port->state->xmit;
634 int count;
635
636 if (port->x_char) {
637 serial_out(port, SPRD_TXD, port->x_char);
638 port->icount.tx++;
639 port->x_char = 0;
640 return;
641 }
642
643 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
644 sprd_stop_tx(port);
645 return;
646 }
647
648 count = THLD_TX_EMPTY;
649 do {
650 serial_out(port, SPRD_TXD, xmit->buf[xmit->tail]);
651 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
652 port->icount.tx++;
653 if (uart_circ_empty(xmit))
654 break;
655 } while (--count > 0);
656
657 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
658 uart_write_wakeup(port);
659
660 if (uart_circ_empty(xmit))
661 sprd_stop_tx(port);
662 }
663
664 /* this handles the interrupt from one port */
sprd_handle_irq(int irq,void * dev_id)665 static irqreturn_t sprd_handle_irq(int irq, void *dev_id)
666 {
667 struct uart_port *port = dev_id;
668 unsigned int ims;
669
670 spin_lock(&port->lock);
671
672 ims = serial_in(port, SPRD_IMSR);
673
674 if (!ims) {
675 spin_unlock(&port->lock);
676 return IRQ_NONE;
677 }
678
679 if (ims & SPRD_IMSR_TIMEOUT)
680 serial_out(port, SPRD_ICLR, SPRD_ICLR_TIMEOUT);
681
682 if (ims & SPRD_IMSR_BREAK_DETECT)
683 serial_out(port, SPRD_ICLR, SPRD_IMSR_BREAK_DETECT);
684
685 if (ims & (SPRD_IMSR_RX_FIFO_FULL | SPRD_IMSR_BREAK_DETECT |
686 SPRD_IMSR_TIMEOUT))
687 sprd_rx(port);
688
689 if (ims & SPRD_IMSR_TX_FIFO_EMPTY)
690 sprd_tx(port);
691
692 spin_unlock(&port->lock);
693
694 return IRQ_HANDLED;
695 }
696
sprd_uart_dma_startup(struct uart_port * port,struct sprd_uart_port * sp)697 static void sprd_uart_dma_startup(struct uart_port *port,
698 struct sprd_uart_port *sp)
699 {
700 int ret;
701
702 sprd_request_dma(port);
703 if (!(sp->rx_dma.enable || sp->tx_dma.enable))
704 return;
705
706 ret = sprd_start_dma_rx(port);
707 if (ret) {
708 sp->rx_dma.enable = false;
709 dma_release_channel(sp->rx_dma.chn);
710 dev_warn(port->dev, "fail to start RX dma mode\n");
711 }
712
713 sprd_uart_dma_enable(port, true);
714 }
715
sprd_startup(struct uart_port * port)716 static int sprd_startup(struct uart_port *port)
717 {
718 int ret = 0;
719 unsigned int ien, fc;
720 unsigned int timeout;
721 struct sprd_uart_port *sp;
722 unsigned long flags;
723
724 serial_out(port, SPRD_CTL2,
725 THLD_TX_EMPTY << THLD_TX_EMPTY_SHIFT | THLD_RX_FULL);
726
727 /* clear rx fifo */
728 timeout = SPRD_TIMEOUT;
729 while (timeout-- && serial_in(port, SPRD_STS1) & SPRD_RX_FIFO_CNT_MASK)
730 serial_in(port, SPRD_RXD);
731
732 /* clear tx fifo */
733 timeout = SPRD_TIMEOUT;
734 while (timeout-- && serial_in(port, SPRD_STS1) & SPRD_TX_FIFO_CNT_MASK)
735 cpu_relax();
736
737 /* clear interrupt */
738 serial_out(port, SPRD_IEN, 0);
739 serial_out(port, SPRD_ICLR, ~0);
740
741 /* allocate irq */
742 sp = container_of(port, struct sprd_uart_port, port);
743 snprintf(sp->name, sizeof(sp->name), "sprd_serial%d", port->line);
744
745 sprd_uart_dma_startup(port, sp);
746
747 ret = devm_request_irq(port->dev, port->irq, sprd_handle_irq,
748 IRQF_SHARED, sp->name, port);
749 if (ret) {
750 dev_err(port->dev, "fail to request serial irq %d, ret=%d\n",
751 port->irq, ret);
752 return ret;
753 }
754 fc = serial_in(port, SPRD_CTL1);
755 fc |= RX_TOUT_THLD_DEF | RX_HFC_THLD_DEF;
756 serial_out(port, SPRD_CTL1, fc);
757
758 /* enable interrupt */
759 spin_lock_irqsave(&port->lock, flags);
760 ien = serial_in(port, SPRD_IEN);
761 ien |= SPRD_IEN_BREAK_DETECT | SPRD_IEN_TIMEOUT;
762 if (!sp->rx_dma.enable)
763 ien |= SPRD_IEN_RX_FULL;
764 serial_out(port, SPRD_IEN, ien);
765 spin_unlock_irqrestore(&port->lock, flags);
766
767 return 0;
768 }
769
sprd_shutdown(struct uart_port * port)770 static void sprd_shutdown(struct uart_port *port)
771 {
772 sprd_release_dma(port);
773 serial_out(port, SPRD_IEN, 0);
774 serial_out(port, SPRD_ICLR, ~0);
775 devm_free_irq(port->dev, port->irq, port);
776 }
777
sprd_set_termios(struct uart_port * port,struct ktermios * termios,struct ktermios * old)778 static void sprd_set_termios(struct uart_port *port,
779 struct ktermios *termios,
780 struct ktermios *old)
781 {
782 unsigned int baud, quot;
783 unsigned int lcr = 0, fc;
784 unsigned long flags;
785
786 /* ask the core to calculate the divisor for us */
787 baud = uart_get_baud_rate(port, termios, old, 0, SPRD_BAUD_IO_LIMIT);
788
789 quot = port->uartclk / baud;
790
791 /* set data length */
792 switch (termios->c_cflag & CSIZE) {
793 case CS5:
794 lcr |= SPRD_LCR_DATA_LEN5;
795 break;
796 case CS6:
797 lcr |= SPRD_LCR_DATA_LEN6;
798 break;
799 case CS7:
800 lcr |= SPRD_LCR_DATA_LEN7;
801 break;
802 case CS8:
803 default:
804 lcr |= SPRD_LCR_DATA_LEN8;
805 break;
806 }
807
808 /* calculate stop bits */
809 lcr &= ~(SPRD_LCR_STOP_1BIT | SPRD_LCR_STOP_2BIT);
810 if (termios->c_cflag & CSTOPB)
811 lcr |= SPRD_LCR_STOP_2BIT;
812 else
813 lcr |= SPRD_LCR_STOP_1BIT;
814
815 /* calculate parity */
816 lcr &= ~SPRD_LCR_PARITY;
817 termios->c_cflag &= ~CMSPAR; /* no support mark/space */
818 if (termios->c_cflag & PARENB) {
819 lcr |= SPRD_LCR_PARITY_EN;
820 if (termios->c_cflag & PARODD)
821 lcr |= SPRD_LCR_ODD_PAR;
822 else
823 lcr |= SPRD_LCR_EVEN_PAR;
824 }
825
826 spin_lock_irqsave(&port->lock, flags);
827
828 /* update the per-port timeout */
829 uart_update_timeout(port, termios->c_cflag, baud);
830
831 port->read_status_mask = SPRD_LSR_OE;
832 if (termios->c_iflag & INPCK)
833 port->read_status_mask |= SPRD_LSR_FE | SPRD_LSR_PE;
834 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
835 port->read_status_mask |= SPRD_LSR_BI;
836
837 /* characters to ignore */
838 port->ignore_status_mask = 0;
839 if (termios->c_iflag & IGNPAR)
840 port->ignore_status_mask |= SPRD_LSR_PE | SPRD_LSR_FE;
841 if (termios->c_iflag & IGNBRK) {
842 port->ignore_status_mask |= SPRD_LSR_BI;
843 /*
844 * If we're ignoring parity and break indicators,
845 * ignore overruns too (for real raw support).
846 */
847 if (termios->c_iflag & IGNPAR)
848 port->ignore_status_mask |= SPRD_LSR_OE;
849 }
850
851 /* flow control */
852 fc = serial_in(port, SPRD_CTL1);
853 fc &= ~(RX_HW_FLOW_CTL_THLD | RX_HW_FLOW_CTL_EN | TX_HW_FLOW_CTL_EN);
854 if (termios->c_cflag & CRTSCTS) {
855 fc |= RX_HW_FLOW_CTL_THLD;
856 fc |= RX_HW_FLOW_CTL_EN;
857 fc |= TX_HW_FLOW_CTL_EN;
858 }
859
860 /* clock divider bit0~bit15 */
861 serial_out(port, SPRD_CLKD0, quot & SPRD_CLKD0_MASK);
862
863 /* clock divider bit16~bit20 */
864 serial_out(port, SPRD_CLKD1,
865 (quot & SPRD_CLKD1_MASK) >> SPRD_CLKD1_SHIFT);
866 serial_out(port, SPRD_LCR, lcr);
867 fc |= RX_TOUT_THLD_DEF | RX_HFC_THLD_DEF;
868 serial_out(port, SPRD_CTL1, fc);
869
870 spin_unlock_irqrestore(&port->lock, flags);
871
872 /* Don't rewrite B0 */
873 if (tty_termios_baud_rate(termios))
874 tty_termios_encode_baud_rate(termios, baud, baud);
875 }
876
sprd_type(struct uart_port * port)877 static const char *sprd_type(struct uart_port *port)
878 {
879 return "SPX";
880 }
881
sprd_release_port(struct uart_port * port)882 static void sprd_release_port(struct uart_port *port)
883 {
884 /* nothing to do */
885 }
886
sprd_request_port(struct uart_port * port)887 static int sprd_request_port(struct uart_port *port)
888 {
889 return 0;
890 }
891
sprd_config_port(struct uart_port * port,int flags)892 static void sprd_config_port(struct uart_port *port, int flags)
893 {
894 if (flags & UART_CONFIG_TYPE)
895 port->type = PORT_SPRD;
896 }
897
sprd_verify_port(struct uart_port * port,struct serial_struct * ser)898 static int sprd_verify_port(struct uart_port *port, struct serial_struct *ser)
899 {
900 if (ser->type != PORT_SPRD)
901 return -EINVAL;
902 if (port->irq != ser->irq)
903 return -EINVAL;
904 if (port->iotype != ser->io_type)
905 return -EINVAL;
906 return 0;
907 }
908
sprd_pm(struct uart_port * port,unsigned int state,unsigned int oldstate)909 static void sprd_pm(struct uart_port *port, unsigned int state,
910 unsigned int oldstate)
911 {
912 struct sprd_uart_port *sup =
913 container_of(port, struct sprd_uart_port, port);
914
915 switch (state) {
916 case UART_PM_STATE_ON:
917 clk_prepare_enable(sup->clk);
918 break;
919 case UART_PM_STATE_OFF:
920 clk_disable_unprepare(sup->clk);
921 break;
922 }
923 }
924
925 static const struct uart_ops serial_sprd_ops = {
926 .tx_empty = sprd_tx_empty,
927 .get_mctrl = sprd_get_mctrl,
928 .set_mctrl = sprd_set_mctrl,
929 .stop_tx = sprd_stop_tx,
930 .start_tx = sprd_start_tx,
931 .stop_rx = sprd_stop_rx,
932 .break_ctl = sprd_break_ctl,
933 .startup = sprd_startup,
934 .shutdown = sprd_shutdown,
935 .set_termios = sprd_set_termios,
936 .type = sprd_type,
937 .release_port = sprd_release_port,
938 .request_port = sprd_request_port,
939 .config_port = sprd_config_port,
940 .verify_port = sprd_verify_port,
941 .pm = sprd_pm,
942 };
943
944 #ifdef CONFIG_SERIAL_SPRD_CONSOLE
wait_for_xmitr(struct uart_port * port)945 static void wait_for_xmitr(struct uart_port *port)
946 {
947 unsigned int status, tmout = 10000;
948
949 /* wait up to 10ms for the character(s) to be sent */
950 do {
951 status = serial_in(port, SPRD_STS1);
952 if (--tmout == 0)
953 break;
954 udelay(1);
955 } while (status & SPRD_TX_FIFO_CNT_MASK);
956 }
957
sprd_console_putchar(struct uart_port * port,int ch)958 static void sprd_console_putchar(struct uart_port *port, int ch)
959 {
960 wait_for_xmitr(port);
961 serial_out(port, SPRD_TXD, ch);
962 }
963
sprd_console_write(struct console * co,const char * s,unsigned int count)964 static void sprd_console_write(struct console *co, const char *s,
965 unsigned int count)
966 {
967 struct uart_port *port = &sprd_port[co->index]->port;
968 int locked = 1;
969 unsigned long flags;
970
971 if (port->sysrq)
972 locked = 0;
973 else if (oops_in_progress)
974 locked = spin_trylock_irqsave(&port->lock, flags);
975 else
976 spin_lock_irqsave(&port->lock, flags);
977
978 uart_console_write(port, s, count, sprd_console_putchar);
979
980 /* wait for transmitter to become empty */
981 wait_for_xmitr(port);
982
983 if (locked)
984 spin_unlock_irqrestore(&port->lock, flags);
985 }
986
sprd_console_setup(struct console * co,char * options)987 static int __init sprd_console_setup(struct console *co, char *options)
988 {
989 struct sprd_uart_port *sprd_uart_port;
990 int baud = 115200;
991 int bits = 8;
992 int parity = 'n';
993 int flow = 'n';
994
995 if (co->index >= UART_NR_MAX || co->index < 0)
996 co->index = 0;
997
998 sprd_uart_port = sprd_port[co->index];
999 if (!sprd_uart_port || !sprd_uart_port->port.membase) {
1000 pr_info("serial port %d not yet initialized\n", co->index);
1001 return -ENODEV;
1002 }
1003
1004 if (options)
1005 uart_parse_options(options, &baud, &parity, &bits, &flow);
1006
1007 return uart_set_options(&sprd_uart_port->port, co, baud,
1008 parity, bits, flow);
1009 }
1010
1011 static struct uart_driver sprd_uart_driver;
1012 static struct console sprd_console = {
1013 .name = SPRD_TTY_NAME,
1014 .write = sprd_console_write,
1015 .device = uart_console_device,
1016 .setup = sprd_console_setup,
1017 .flags = CON_PRINTBUFFER,
1018 .index = -1,
1019 .data = &sprd_uart_driver,
1020 };
1021
sprd_serial_console_init(void)1022 static int __init sprd_serial_console_init(void)
1023 {
1024 register_console(&sprd_console);
1025 return 0;
1026 }
1027 console_initcall(sprd_serial_console_init);
1028
1029 #define SPRD_CONSOLE (&sprd_console)
1030
1031 /* Support for earlycon */
sprd_putc(struct uart_port * port,int c)1032 static void sprd_putc(struct uart_port *port, int c)
1033 {
1034 unsigned int timeout = SPRD_TIMEOUT;
1035
1036 while (timeout-- &&
1037 !(readl(port->membase + SPRD_LSR) & SPRD_LSR_TX_OVER))
1038 cpu_relax();
1039
1040 writeb(c, port->membase + SPRD_TXD);
1041 }
1042
sprd_early_write(struct console * con,const char * s,unsigned int n)1043 static void sprd_early_write(struct console *con, const char *s, unsigned int n)
1044 {
1045 struct earlycon_device *dev = con->data;
1046
1047 uart_console_write(&dev->port, s, n, sprd_putc);
1048 }
1049
sprd_early_console_setup(struct earlycon_device * device,const char * opt)1050 static int __init sprd_early_console_setup(struct earlycon_device *device,
1051 const char *opt)
1052 {
1053 if (!device->port.membase)
1054 return -ENODEV;
1055
1056 device->con->write = sprd_early_write;
1057 return 0;
1058 }
1059 OF_EARLYCON_DECLARE(sprd_serial, "sprd,sc9836-uart",
1060 sprd_early_console_setup);
1061
1062 #else /* !CONFIG_SERIAL_SPRD_CONSOLE */
1063 #define SPRD_CONSOLE NULL
1064 #endif
1065
1066 static struct uart_driver sprd_uart_driver = {
1067 .owner = THIS_MODULE,
1068 .driver_name = "sprd_serial",
1069 .dev_name = SPRD_TTY_NAME,
1070 .major = 0,
1071 .minor = 0,
1072 .nr = UART_NR_MAX,
1073 .cons = SPRD_CONSOLE,
1074 };
1075
sprd_probe_dt_alias(int index,struct device * dev)1076 static int sprd_probe_dt_alias(int index, struct device *dev)
1077 {
1078 struct device_node *np;
1079 int ret = index;
1080
1081 if (!IS_ENABLED(CONFIG_OF))
1082 return ret;
1083
1084 np = dev->of_node;
1085 if (!np)
1086 return ret;
1087
1088 ret = of_alias_get_id(np, "serial");
1089 if (ret < 0)
1090 ret = index;
1091 else if (ret >= ARRAY_SIZE(sprd_port) || sprd_port[ret] != NULL) {
1092 dev_warn(dev, "requested serial port %d not available.\n", ret);
1093 ret = index;
1094 }
1095
1096 return ret;
1097 }
1098
sprd_remove(struct platform_device * dev)1099 static int sprd_remove(struct platform_device *dev)
1100 {
1101 struct sprd_uart_port *sup = platform_get_drvdata(dev);
1102
1103 if (sup) {
1104 uart_remove_one_port(&sprd_uart_driver, &sup->port);
1105 sprd_port[sup->port.line] = NULL;
1106 sprd_ports_num--;
1107 }
1108
1109 if (!sprd_ports_num)
1110 uart_unregister_driver(&sprd_uart_driver);
1111
1112 sprd_rx_free_buf(sup);
1113
1114 return 0;
1115 }
1116
sprd_uart_is_console(struct uart_port * uport)1117 static bool sprd_uart_is_console(struct uart_port *uport)
1118 {
1119 struct console *cons = sprd_uart_driver.cons;
1120
1121 if (cons && cons->index >= 0 && cons->index == uport->line)
1122 return true;
1123
1124 return false;
1125 }
1126
sprd_clk_init(struct uart_port * uport)1127 static int sprd_clk_init(struct uart_port *uport)
1128 {
1129 struct clk *clk_uart, *clk_parent;
1130 struct sprd_uart_port *u = sprd_port[uport->line];
1131
1132 clk_uart = devm_clk_get(uport->dev, "uart");
1133 if (IS_ERR(clk_uart)) {
1134 dev_warn(uport->dev, "uart%d can't get uart clock\n",
1135 uport->line);
1136 clk_uart = NULL;
1137 }
1138
1139 clk_parent = devm_clk_get(uport->dev, "source");
1140 if (IS_ERR(clk_parent)) {
1141 dev_warn(uport->dev, "uart%d can't get source clock\n",
1142 uport->line);
1143 clk_parent = NULL;
1144 }
1145
1146 if (!clk_uart || clk_set_parent(clk_uart, clk_parent))
1147 uport->uartclk = SPRD_DEFAULT_SOURCE_CLK;
1148 else
1149 uport->uartclk = clk_get_rate(clk_uart);
1150
1151 u->clk = devm_clk_get(uport->dev, "enable");
1152 if (IS_ERR(u->clk)) {
1153 if (PTR_ERR(u->clk) == -EPROBE_DEFER)
1154 return -EPROBE_DEFER;
1155
1156 dev_warn(uport->dev, "uart%d can't get enable clock\n",
1157 uport->line);
1158
1159 /* To keep console alive even if the error occurred */
1160 if (!sprd_uart_is_console(uport))
1161 return PTR_ERR(u->clk);
1162
1163 u->clk = NULL;
1164 }
1165
1166 return 0;
1167 }
1168
sprd_probe(struct platform_device * pdev)1169 static int sprd_probe(struct platform_device *pdev)
1170 {
1171 struct resource *res;
1172 struct uart_port *up;
1173 int irq;
1174 int index;
1175 int ret;
1176
1177 for (index = 0; index < ARRAY_SIZE(sprd_port); index++)
1178 if (sprd_port[index] == NULL)
1179 break;
1180
1181 if (index == ARRAY_SIZE(sprd_port))
1182 return -EBUSY;
1183
1184 index = sprd_probe_dt_alias(index, &pdev->dev);
1185
1186 sprd_port[index] = devm_kzalloc(&pdev->dev, sizeof(*sprd_port[index]),
1187 GFP_KERNEL);
1188 if (!sprd_port[index])
1189 return -ENOMEM;
1190
1191 up = &sprd_port[index]->port;
1192 up->dev = &pdev->dev;
1193 up->line = index;
1194 up->type = PORT_SPRD;
1195 up->iotype = UPIO_MEM;
1196 up->uartclk = SPRD_DEF_RATE;
1197 up->fifosize = SPRD_FIFO_SIZE;
1198 up->ops = &serial_sprd_ops;
1199 up->flags = UPF_BOOT_AUTOCONF;
1200
1201 ret = sprd_clk_init(up);
1202 if (ret)
1203 return ret;
1204
1205 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1206 up->membase = devm_ioremap_resource(&pdev->dev, res);
1207 if (IS_ERR(up->membase))
1208 return PTR_ERR(up->membase);
1209
1210 up->mapbase = res->start;
1211
1212 irq = platform_get_irq(pdev, 0);
1213 if (irq < 0)
1214 return irq;
1215 up->irq = irq;
1216
1217 /*
1218 * Allocate one dma buffer to prepare for receive transfer, in case
1219 * memory allocation failure at runtime.
1220 */
1221 ret = sprd_rx_alloc_buf(sprd_port[index]);
1222 if (ret)
1223 return ret;
1224
1225 if (!sprd_ports_num) {
1226 ret = uart_register_driver(&sprd_uart_driver);
1227 if (ret < 0) {
1228 pr_err("Failed to register SPRD-UART driver\n");
1229 return ret;
1230 }
1231 }
1232 sprd_ports_num++;
1233
1234 ret = uart_add_one_port(&sprd_uart_driver, up);
1235 if (ret) {
1236 sprd_port[index] = NULL;
1237 sprd_remove(pdev);
1238 }
1239
1240 platform_set_drvdata(pdev, up);
1241
1242 return ret;
1243 }
1244
1245 #ifdef CONFIG_PM_SLEEP
sprd_suspend(struct device * dev)1246 static int sprd_suspend(struct device *dev)
1247 {
1248 struct sprd_uart_port *sup = dev_get_drvdata(dev);
1249
1250 uart_suspend_port(&sprd_uart_driver, &sup->port);
1251
1252 return 0;
1253 }
1254
sprd_resume(struct device * dev)1255 static int sprd_resume(struct device *dev)
1256 {
1257 struct sprd_uart_port *sup = dev_get_drvdata(dev);
1258
1259 uart_resume_port(&sprd_uart_driver, &sup->port);
1260
1261 return 0;
1262 }
1263 #endif
1264
1265 static SIMPLE_DEV_PM_OPS(sprd_pm_ops, sprd_suspend, sprd_resume);
1266
1267 static const struct of_device_id serial_ids[] = {
1268 {.compatible = "sprd,sc9836-uart",},
1269 {}
1270 };
1271 MODULE_DEVICE_TABLE(of, serial_ids);
1272
1273 static struct platform_driver sprd_platform_driver = {
1274 .probe = sprd_probe,
1275 .remove = sprd_remove,
1276 .driver = {
1277 .name = "sprd_serial",
1278 .of_match_table = of_match_ptr(serial_ids),
1279 .pm = &sprd_pm_ops,
1280 },
1281 };
1282
1283 module_platform_driver(sprd_platform_driver);
1284
1285 MODULE_LICENSE("GPL v2");
1286 MODULE_DESCRIPTION("Spreadtrum SoC serial driver series");
1287