1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * sunxi Watchdog Driver
4 *
5 * Copyright (c) 2013 Carlo Caione
6 * 2012 Henrik Nordstrom
7 *
8 * Based on xen_wdt.c
9 * (c) Copyright 2010 Novell, Inc.
10 */
11
12 #include <linux/clk.h>
13 #include <linux/delay.h>
14 #include <linux/err.h>
15 #include <linux/init.h>
16 #include <linux/io.h>
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/moduleparam.h>
20 #include <linux/of.h>
21 #include <linux/of_device.h>
22 #include <linux/platform_device.h>
23 #include <linux/types.h>
24 #include <linux/watchdog.h>
25
26 #define WDT_MAX_TIMEOUT 16
27 #define WDT_MIN_TIMEOUT 1
28 #define WDT_TIMEOUT_MASK 0x0F
29
30 #define WDT_CTRL_RELOAD ((1 << 0) | (0x0a57 << 1))
31
32 #define WDT_MODE_EN (1 << 0)
33
34 #define DRV_NAME "sunxi-wdt"
35 #define DRV_VERSION "1.0"
36
37 static bool nowayout = WATCHDOG_NOWAYOUT;
38 static unsigned int timeout;
39
40 /*
41 * This structure stores the register offsets for different variants
42 * of Allwinner's watchdog hardware.
43 */
44 struct sunxi_wdt_reg {
45 u8 wdt_ctrl;
46 u8 wdt_cfg;
47 u8 wdt_mode;
48 u8 wdt_timeout_shift;
49 u8 wdt_reset_mask;
50 u8 wdt_reset_val;
51 };
52
53 struct sunxi_wdt_dev {
54 struct watchdog_device wdt_dev;
55 void __iomem *wdt_base;
56 const struct sunxi_wdt_reg *wdt_regs;
57 };
58
59 /*
60 * wdt_timeout_map maps the watchdog timer interval value in seconds to
61 * the value of the register WDT_MODE at bits .wdt_timeout_shift ~ +3
62 *
63 * [timeout seconds] = register value
64 *
65 */
66
67 static const int wdt_timeout_map[] = {
68 [1] = 0x1, /* 1s */
69 [2] = 0x2, /* 2s */
70 [3] = 0x3, /* 3s */
71 [4] = 0x4, /* 4s */
72 [5] = 0x5, /* 5s */
73 [6] = 0x6, /* 6s */
74 [8] = 0x7, /* 8s */
75 [10] = 0x8, /* 10s */
76 [12] = 0x9, /* 12s */
77 [14] = 0xA, /* 14s */
78 [16] = 0xB, /* 16s */
79 };
80
81
sunxi_wdt_restart(struct watchdog_device * wdt_dev,unsigned long action,void * data)82 static int sunxi_wdt_restart(struct watchdog_device *wdt_dev,
83 unsigned long action, void *data)
84 {
85 struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
86 void __iomem *wdt_base = sunxi_wdt->wdt_base;
87 const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
88 u32 val;
89
90 /* Set system reset function */
91 val = readl(wdt_base + regs->wdt_cfg);
92 val &= ~(regs->wdt_reset_mask);
93 val |= regs->wdt_reset_val;
94 writel(val, wdt_base + regs->wdt_cfg);
95
96 /* Set lowest timeout and enable watchdog */
97 val = readl(wdt_base + regs->wdt_mode);
98 val &= ~(WDT_TIMEOUT_MASK << regs->wdt_timeout_shift);
99 val |= WDT_MODE_EN;
100 writel(val, wdt_base + regs->wdt_mode);
101
102 /*
103 * Restart the watchdog. The default (and lowest) interval
104 * value for the watchdog is 0.5s.
105 */
106 writel(WDT_CTRL_RELOAD, wdt_base + regs->wdt_ctrl);
107
108 while (1) {
109 mdelay(5);
110 val = readl(wdt_base + regs->wdt_mode);
111 val |= WDT_MODE_EN;
112 writel(val, wdt_base + regs->wdt_mode);
113 }
114 return 0;
115 }
116
sunxi_wdt_ping(struct watchdog_device * wdt_dev)117 static int sunxi_wdt_ping(struct watchdog_device *wdt_dev)
118 {
119 struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
120 void __iomem *wdt_base = sunxi_wdt->wdt_base;
121 const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
122
123 writel(WDT_CTRL_RELOAD, wdt_base + regs->wdt_ctrl);
124
125 return 0;
126 }
127
sunxi_wdt_set_timeout(struct watchdog_device * wdt_dev,unsigned int timeout)128 static int sunxi_wdt_set_timeout(struct watchdog_device *wdt_dev,
129 unsigned int timeout)
130 {
131 struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
132 void __iomem *wdt_base = sunxi_wdt->wdt_base;
133 const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
134 u32 reg;
135
136 if (wdt_timeout_map[timeout] == 0)
137 timeout++;
138
139 sunxi_wdt->wdt_dev.timeout = timeout;
140
141 reg = readl(wdt_base + regs->wdt_mode);
142 reg &= ~(WDT_TIMEOUT_MASK << regs->wdt_timeout_shift);
143 reg |= wdt_timeout_map[timeout] << regs->wdt_timeout_shift;
144 writel(reg, wdt_base + regs->wdt_mode);
145
146 sunxi_wdt_ping(wdt_dev);
147
148 return 0;
149 }
150
sunxi_wdt_stop(struct watchdog_device * wdt_dev)151 static int sunxi_wdt_stop(struct watchdog_device *wdt_dev)
152 {
153 struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
154 void __iomem *wdt_base = sunxi_wdt->wdt_base;
155 const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
156
157 writel(0, wdt_base + regs->wdt_mode);
158
159 return 0;
160 }
161
sunxi_wdt_start(struct watchdog_device * wdt_dev)162 static int sunxi_wdt_start(struct watchdog_device *wdt_dev)
163 {
164 u32 reg;
165 struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
166 void __iomem *wdt_base = sunxi_wdt->wdt_base;
167 const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
168 int ret;
169
170 ret = sunxi_wdt_set_timeout(&sunxi_wdt->wdt_dev,
171 sunxi_wdt->wdt_dev.timeout);
172 if (ret < 0)
173 return ret;
174
175 /* Set system reset function */
176 reg = readl(wdt_base + regs->wdt_cfg);
177 reg &= ~(regs->wdt_reset_mask);
178 reg |= regs->wdt_reset_val;
179 writel(reg, wdt_base + regs->wdt_cfg);
180
181 /* Enable watchdog */
182 reg = readl(wdt_base + regs->wdt_mode);
183 reg |= WDT_MODE_EN;
184 writel(reg, wdt_base + regs->wdt_mode);
185
186 return 0;
187 }
188
189 static const struct watchdog_info sunxi_wdt_info = {
190 .identity = DRV_NAME,
191 .options = WDIOF_SETTIMEOUT |
192 WDIOF_KEEPALIVEPING |
193 WDIOF_MAGICCLOSE,
194 };
195
196 static const struct watchdog_ops sunxi_wdt_ops = {
197 .owner = THIS_MODULE,
198 .start = sunxi_wdt_start,
199 .stop = sunxi_wdt_stop,
200 .ping = sunxi_wdt_ping,
201 .set_timeout = sunxi_wdt_set_timeout,
202 .restart = sunxi_wdt_restart,
203 };
204
205 static const struct sunxi_wdt_reg sun4i_wdt_reg = {
206 .wdt_ctrl = 0x00,
207 .wdt_cfg = 0x04,
208 .wdt_mode = 0x04,
209 .wdt_timeout_shift = 3,
210 .wdt_reset_mask = 0x02,
211 .wdt_reset_val = 0x02,
212 };
213
214 static const struct sunxi_wdt_reg sun6i_wdt_reg = {
215 .wdt_ctrl = 0x10,
216 .wdt_cfg = 0x14,
217 .wdt_mode = 0x18,
218 .wdt_timeout_shift = 4,
219 .wdt_reset_mask = 0x03,
220 .wdt_reset_val = 0x01,
221 };
222
223 static const struct of_device_id sunxi_wdt_dt_ids[] = {
224 { .compatible = "allwinner,sun4i-a10-wdt", .data = &sun4i_wdt_reg },
225 { .compatible = "allwinner,sun6i-a31-wdt", .data = &sun6i_wdt_reg },
226 { /* sentinel */ }
227 };
228 MODULE_DEVICE_TABLE(of, sunxi_wdt_dt_ids);
229
sunxi_wdt_probe(struct platform_device * pdev)230 static int sunxi_wdt_probe(struct platform_device *pdev)
231 {
232 struct device *dev = &pdev->dev;
233 struct sunxi_wdt_dev *sunxi_wdt;
234 int err;
235
236 sunxi_wdt = devm_kzalloc(dev, sizeof(*sunxi_wdt), GFP_KERNEL);
237 if (!sunxi_wdt)
238 return -EINVAL;
239
240 sunxi_wdt->wdt_regs = of_device_get_match_data(dev);
241 if (!sunxi_wdt->wdt_regs)
242 return -ENODEV;
243
244 sunxi_wdt->wdt_base = devm_platform_ioremap_resource(pdev, 0);
245 if (IS_ERR(sunxi_wdt->wdt_base))
246 return PTR_ERR(sunxi_wdt->wdt_base);
247
248 sunxi_wdt->wdt_dev.info = &sunxi_wdt_info;
249 sunxi_wdt->wdt_dev.ops = &sunxi_wdt_ops;
250 sunxi_wdt->wdt_dev.timeout = WDT_MAX_TIMEOUT;
251 sunxi_wdt->wdt_dev.max_timeout = WDT_MAX_TIMEOUT;
252 sunxi_wdt->wdt_dev.min_timeout = WDT_MIN_TIMEOUT;
253 sunxi_wdt->wdt_dev.parent = dev;
254
255 watchdog_init_timeout(&sunxi_wdt->wdt_dev, timeout, dev);
256 watchdog_set_nowayout(&sunxi_wdt->wdt_dev, nowayout);
257 watchdog_set_restart_priority(&sunxi_wdt->wdt_dev, 128);
258
259 watchdog_set_drvdata(&sunxi_wdt->wdt_dev, sunxi_wdt);
260
261 sunxi_wdt_stop(&sunxi_wdt->wdt_dev);
262
263 watchdog_stop_on_reboot(&sunxi_wdt->wdt_dev);
264 err = devm_watchdog_register_device(dev, &sunxi_wdt->wdt_dev);
265 if (unlikely(err))
266 return err;
267
268 dev_info(dev, "Watchdog enabled (timeout=%d sec, nowayout=%d)",
269 sunxi_wdt->wdt_dev.timeout, nowayout);
270
271 return 0;
272 }
273
274 static struct platform_driver sunxi_wdt_driver = {
275 .probe = sunxi_wdt_probe,
276 .driver = {
277 .name = DRV_NAME,
278 .of_match_table = sunxi_wdt_dt_ids,
279 },
280 };
281
282 module_platform_driver(sunxi_wdt_driver);
283
284 module_param(timeout, uint, 0);
285 MODULE_PARM_DESC(timeout, "Watchdog heartbeat in seconds");
286
287 module_param(nowayout, bool, 0);
288 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
289 "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
290
291 MODULE_LICENSE("GPL");
292 MODULE_AUTHOR("Carlo Caione <carlo.caione@gmail.com>");
293 MODULE_AUTHOR("Henrik Nordstrom <henrik@henriknordstrom.net>");
294 MODULE_DESCRIPTION("sunxi WatchDog Timer Driver");
295 MODULE_VERSION(DRV_VERSION);
296