1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * rt5640.c -- RT5640/RT5639 ALSA SoC audio codec driver
4 *
5 * Copyright 2011 Realtek Semiconductor Corp.
6 * Author: Johnny Hsu <johnnyhsu@realtek.com>
7 * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
8 */
9
10 #include <linux/module.h>
11 #include <linux/moduleparam.h>
12 #include <linux/init.h>
13 #include <linux/delay.h>
14 #include <linux/pm.h>
15 #include <linux/gpio.h>
16 #include <linux/i2c.h>
17 #include <linux/regmap.h>
18 #include <linux/of.h>
19 #include <linux/of_gpio.h>
20 #include <linux/platform_device.h>
21 #include <linux/spi/spi.h>
22 #include <linux/acpi.h>
23 #include <sound/core.h>
24 #include <sound/jack.h>
25 #include <sound/pcm.h>
26 #include <sound/pcm_params.h>
27 #include <sound/soc.h>
28 #include <sound/soc-dapm.h>
29 #include <sound/initval.h>
30 #include <sound/tlv.h>
31
32 #include "rl6231.h"
33 #include "rt5640.h"
34
35 #define RT5640_DEVICE_ID 0x6231
36
37 #define RT5640_PR_RANGE_BASE (0xff + 1)
38 #define RT5640_PR_SPACING 0x100
39
40 #define RT5640_PR_BASE (RT5640_PR_RANGE_BASE + (0 * RT5640_PR_SPACING))
41
42 static const struct regmap_range_cfg rt5640_ranges[] = {
43 { .name = "PR", .range_min = RT5640_PR_BASE,
44 .range_max = RT5640_PR_BASE + 0xb4,
45 .selector_reg = RT5640_PRIV_INDEX,
46 .selector_mask = 0xff,
47 .selector_shift = 0x0,
48 .window_start = RT5640_PRIV_DATA,
49 .window_len = 0x1, },
50 };
51
52 static const struct reg_sequence init_list[] = {
53 {RT5640_PR_BASE + 0x3d, 0x3600},
54 {RT5640_PR_BASE + 0x12, 0x0aa8},
55 {RT5640_PR_BASE + 0x14, 0x0aaa},
56 {RT5640_PR_BASE + 0x20, 0x6110},
57 {RT5640_PR_BASE + 0x21, 0xe0e0},
58 {RT5640_PR_BASE + 0x23, 0x1804},
59 };
60
61 static const struct reg_default rt5640_reg[] = {
62 { 0x00, 0x000e },
63 { 0x01, 0xc8c8 },
64 { 0x02, 0xc8c8 },
65 { 0x03, 0xc8c8 },
66 { 0x04, 0x8000 },
67 { 0x0d, 0x0000 },
68 { 0x0e, 0x0000 },
69 { 0x0f, 0x0808 },
70 { 0x19, 0xafaf },
71 { 0x1a, 0xafaf },
72 { 0x1b, 0x0000 },
73 { 0x1c, 0x2f2f },
74 { 0x1d, 0x2f2f },
75 { 0x1e, 0x0000 },
76 { 0x27, 0x7060 },
77 { 0x28, 0x7070 },
78 { 0x29, 0x8080 },
79 { 0x2a, 0x5454 },
80 { 0x2b, 0x5454 },
81 { 0x2c, 0xaa00 },
82 { 0x2d, 0x0000 },
83 { 0x2e, 0xa000 },
84 { 0x2f, 0x0000 },
85 { 0x3b, 0x0000 },
86 { 0x3c, 0x007f },
87 { 0x3d, 0x0000 },
88 { 0x3e, 0x007f },
89 { 0x45, 0xe000 },
90 { 0x46, 0x003e },
91 { 0x47, 0x003e },
92 { 0x48, 0xf800 },
93 { 0x49, 0x3800 },
94 { 0x4a, 0x0004 },
95 { 0x4c, 0xfc00 },
96 { 0x4d, 0x0000 },
97 { 0x4f, 0x01ff },
98 { 0x50, 0x0000 },
99 { 0x51, 0x0000 },
100 { 0x52, 0x01ff },
101 { 0x53, 0xf000 },
102 { 0x61, 0x0000 },
103 { 0x62, 0x0000 },
104 { 0x63, 0x00c0 },
105 { 0x64, 0x0000 },
106 { 0x65, 0x0000 },
107 { 0x66, 0x0000 },
108 { 0x6a, 0x0000 },
109 { 0x6c, 0x0000 },
110 { 0x70, 0x8000 },
111 { 0x71, 0x8000 },
112 { 0x72, 0x8000 },
113 { 0x73, 0x1114 },
114 { 0x74, 0x0c00 },
115 { 0x75, 0x1d00 },
116 { 0x80, 0x0000 },
117 { 0x81, 0x0000 },
118 { 0x82, 0x0000 },
119 { 0x83, 0x0000 },
120 { 0x84, 0x0000 },
121 { 0x85, 0x0008 },
122 { 0x89, 0x0000 },
123 { 0x8a, 0x0000 },
124 { 0x8b, 0x0600 },
125 { 0x8c, 0x0228 },
126 { 0x8d, 0xa000 },
127 { 0x8e, 0x0004 },
128 { 0x8f, 0x1100 },
129 { 0x90, 0x0646 },
130 { 0x91, 0x0c00 },
131 { 0x92, 0x0000 },
132 { 0x93, 0x3000 },
133 { 0xb0, 0x2080 },
134 { 0xb1, 0x0000 },
135 { 0xb4, 0x2206 },
136 { 0xb5, 0x1f00 },
137 { 0xb6, 0x0000 },
138 { 0xb8, 0x034b },
139 { 0xb9, 0x0066 },
140 { 0xba, 0x000b },
141 { 0xbb, 0x0000 },
142 { 0xbc, 0x0000 },
143 { 0xbd, 0x0000 },
144 { 0xbe, 0x0000 },
145 { 0xbf, 0x0000 },
146 { 0xc0, 0x0400 },
147 { 0xc2, 0x0000 },
148 { 0xc4, 0x0000 },
149 { 0xc5, 0x0000 },
150 { 0xc6, 0x2000 },
151 { 0xc8, 0x0000 },
152 { 0xc9, 0x0000 },
153 { 0xca, 0x0000 },
154 { 0xcb, 0x0000 },
155 { 0xcc, 0x0000 },
156 { 0xcf, 0x0013 },
157 { 0xd0, 0x0680 },
158 { 0xd1, 0x1c17 },
159 { 0xd2, 0x8c00 },
160 { 0xd3, 0xaa20 },
161 { 0xd6, 0x0400 },
162 { 0xd9, 0x0809 },
163 { 0xfe, 0x10ec },
164 { 0xff, 0x6231 },
165 };
166
rt5640_reset(struct snd_soc_component * component)167 static int rt5640_reset(struct snd_soc_component *component)
168 {
169 return snd_soc_component_write(component, RT5640_RESET, 0);
170 }
171
rt5640_volatile_register(struct device * dev,unsigned int reg)172 static bool rt5640_volatile_register(struct device *dev, unsigned int reg)
173 {
174 int i;
175
176 for (i = 0; i < ARRAY_SIZE(rt5640_ranges); i++)
177 if ((reg >= rt5640_ranges[i].window_start &&
178 reg <= rt5640_ranges[i].window_start +
179 rt5640_ranges[i].window_len) ||
180 (reg >= rt5640_ranges[i].range_min &&
181 reg <= rt5640_ranges[i].range_max))
182 return true;
183
184 switch (reg) {
185 case RT5640_RESET:
186 case RT5640_ASRC_5:
187 case RT5640_EQ_CTRL1:
188 case RT5640_DRC_AGC_1:
189 case RT5640_ANC_CTRL1:
190 case RT5640_IRQ_CTRL2:
191 case RT5640_INT_IRQ_ST:
192 case RT5640_DSP_CTRL2:
193 case RT5640_DSP_CTRL3:
194 case RT5640_PRIV_INDEX:
195 case RT5640_PRIV_DATA:
196 case RT5640_PGM_REG_ARR1:
197 case RT5640_PGM_REG_ARR3:
198 case RT5640_VENDOR_ID:
199 case RT5640_VENDOR_ID1:
200 case RT5640_VENDOR_ID2:
201 return true;
202 default:
203 return false;
204 }
205 }
206
rt5640_readable_register(struct device * dev,unsigned int reg)207 static bool rt5640_readable_register(struct device *dev, unsigned int reg)
208 {
209 int i;
210
211 for (i = 0; i < ARRAY_SIZE(rt5640_ranges); i++)
212 if ((reg >= rt5640_ranges[i].window_start &&
213 reg <= rt5640_ranges[i].window_start +
214 rt5640_ranges[i].window_len) ||
215 (reg >= rt5640_ranges[i].range_min &&
216 reg <= rt5640_ranges[i].range_max))
217 return true;
218
219 switch (reg) {
220 case RT5640_RESET:
221 case RT5640_SPK_VOL:
222 case RT5640_HP_VOL:
223 case RT5640_OUTPUT:
224 case RT5640_MONO_OUT:
225 case RT5640_IN1_IN2:
226 case RT5640_IN3_IN4:
227 case RT5640_INL_INR_VOL:
228 case RT5640_DAC1_DIG_VOL:
229 case RT5640_DAC2_DIG_VOL:
230 case RT5640_DAC2_CTRL:
231 case RT5640_ADC_DIG_VOL:
232 case RT5640_ADC_DATA:
233 case RT5640_ADC_BST_VOL:
234 case RT5640_STO_ADC_MIXER:
235 case RT5640_MONO_ADC_MIXER:
236 case RT5640_AD_DA_MIXER:
237 case RT5640_STO_DAC_MIXER:
238 case RT5640_MONO_DAC_MIXER:
239 case RT5640_DIG_MIXER:
240 case RT5640_DSP_PATH1:
241 case RT5640_DSP_PATH2:
242 case RT5640_DIG_INF_DATA:
243 case RT5640_REC_L1_MIXER:
244 case RT5640_REC_L2_MIXER:
245 case RT5640_REC_R1_MIXER:
246 case RT5640_REC_R2_MIXER:
247 case RT5640_HPO_MIXER:
248 case RT5640_SPK_L_MIXER:
249 case RT5640_SPK_R_MIXER:
250 case RT5640_SPO_L_MIXER:
251 case RT5640_SPO_R_MIXER:
252 case RT5640_SPO_CLSD_RATIO:
253 case RT5640_MONO_MIXER:
254 case RT5640_OUT_L1_MIXER:
255 case RT5640_OUT_L2_MIXER:
256 case RT5640_OUT_L3_MIXER:
257 case RT5640_OUT_R1_MIXER:
258 case RT5640_OUT_R2_MIXER:
259 case RT5640_OUT_R3_MIXER:
260 case RT5640_LOUT_MIXER:
261 case RT5640_PWR_DIG1:
262 case RT5640_PWR_DIG2:
263 case RT5640_PWR_ANLG1:
264 case RT5640_PWR_ANLG2:
265 case RT5640_PWR_MIXER:
266 case RT5640_PWR_VOL:
267 case RT5640_PRIV_INDEX:
268 case RT5640_PRIV_DATA:
269 case RT5640_I2S1_SDP:
270 case RT5640_I2S2_SDP:
271 case RT5640_ADDA_CLK1:
272 case RT5640_ADDA_CLK2:
273 case RT5640_DMIC:
274 case RT5640_GLB_CLK:
275 case RT5640_PLL_CTRL1:
276 case RT5640_PLL_CTRL2:
277 case RT5640_ASRC_1:
278 case RT5640_ASRC_2:
279 case RT5640_ASRC_3:
280 case RT5640_ASRC_4:
281 case RT5640_ASRC_5:
282 case RT5640_HP_OVCD:
283 case RT5640_CLS_D_OVCD:
284 case RT5640_CLS_D_OUT:
285 case RT5640_DEPOP_M1:
286 case RT5640_DEPOP_M2:
287 case RT5640_DEPOP_M3:
288 case RT5640_CHARGE_PUMP:
289 case RT5640_PV_DET_SPK_G:
290 case RT5640_MICBIAS:
291 case RT5640_EQ_CTRL1:
292 case RT5640_EQ_CTRL2:
293 case RT5640_WIND_FILTER:
294 case RT5640_DRC_AGC_1:
295 case RT5640_DRC_AGC_2:
296 case RT5640_DRC_AGC_3:
297 case RT5640_SVOL_ZC:
298 case RT5640_ANC_CTRL1:
299 case RT5640_ANC_CTRL2:
300 case RT5640_ANC_CTRL3:
301 case RT5640_JD_CTRL:
302 case RT5640_ANC_JD:
303 case RT5640_IRQ_CTRL1:
304 case RT5640_IRQ_CTRL2:
305 case RT5640_INT_IRQ_ST:
306 case RT5640_GPIO_CTRL1:
307 case RT5640_GPIO_CTRL2:
308 case RT5640_GPIO_CTRL3:
309 case RT5640_DSP_CTRL1:
310 case RT5640_DSP_CTRL2:
311 case RT5640_DSP_CTRL3:
312 case RT5640_DSP_CTRL4:
313 case RT5640_PGM_REG_ARR1:
314 case RT5640_PGM_REG_ARR2:
315 case RT5640_PGM_REG_ARR3:
316 case RT5640_PGM_REG_ARR4:
317 case RT5640_PGM_REG_ARR5:
318 case RT5640_SCB_FUNC:
319 case RT5640_SCB_CTRL:
320 case RT5640_BASE_BACK:
321 case RT5640_MP3_PLUS1:
322 case RT5640_MP3_PLUS2:
323 case RT5640_3D_HP:
324 case RT5640_ADJ_HPF:
325 case RT5640_HP_CALIB_AMP_DET:
326 case RT5640_HP_CALIB2:
327 case RT5640_SV_ZCD1:
328 case RT5640_SV_ZCD2:
329 case RT5640_DUMMY1:
330 case RT5640_DUMMY2:
331 case RT5640_DUMMY3:
332 case RT5640_VENDOR_ID:
333 case RT5640_VENDOR_ID1:
334 case RT5640_VENDOR_ID2:
335 return true;
336 default:
337 return false;
338 }
339 }
340
341 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
342 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
343 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
344 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
345 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
346
347 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
348 static const DECLARE_TLV_DB_RANGE(bst_tlv,
349 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
350 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
351 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
352 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
353 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
354 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
355 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0)
356 );
357
358 /* Interface data select */
359 static const char * const rt5640_data_select[] = {
360 "Normal", "Swap", "left copy to right", "right copy to left"};
361
362 static SOC_ENUM_SINGLE_DECL(rt5640_if1_dac_enum, RT5640_DIG_INF_DATA,
363 RT5640_IF1_DAC_SEL_SFT, rt5640_data_select);
364
365 static SOC_ENUM_SINGLE_DECL(rt5640_if1_adc_enum, RT5640_DIG_INF_DATA,
366 RT5640_IF1_ADC_SEL_SFT, rt5640_data_select);
367
368 static SOC_ENUM_SINGLE_DECL(rt5640_if2_dac_enum, RT5640_DIG_INF_DATA,
369 RT5640_IF2_DAC_SEL_SFT, rt5640_data_select);
370
371 static SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_enum, RT5640_DIG_INF_DATA,
372 RT5640_IF2_ADC_SEL_SFT, rt5640_data_select);
373
374 /* Class D speaker gain ratio */
375 static const char * const rt5640_clsd_spk_ratio[] = {"1.66x", "1.83x", "1.94x",
376 "2x", "2.11x", "2.22x", "2.33x", "2.44x", "2.55x", "2.66x", "2.77x"};
377
378 static SOC_ENUM_SINGLE_DECL(rt5640_clsd_spk_ratio_enum, RT5640_CLS_D_OUT,
379 RT5640_CLSD_RATIO_SFT, rt5640_clsd_spk_ratio);
380
381 static const struct snd_kcontrol_new rt5640_snd_controls[] = {
382 /* Speaker Output Volume */
383 SOC_DOUBLE("Speaker Channel Switch", RT5640_SPK_VOL,
384 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
385 SOC_DOUBLE_TLV("Speaker Playback Volume", RT5640_SPK_VOL,
386 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
387 /* Headphone Output Volume */
388 SOC_DOUBLE("HP Channel Switch", RT5640_HP_VOL,
389 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
390 SOC_DOUBLE_TLV("HP Playback Volume", RT5640_HP_VOL,
391 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
392 /* OUTPUT Control */
393 SOC_DOUBLE("OUT Playback Switch", RT5640_OUTPUT,
394 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
395 SOC_DOUBLE("OUT Channel Switch", RT5640_OUTPUT,
396 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
397 SOC_DOUBLE_TLV("OUT Playback Volume", RT5640_OUTPUT,
398 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
399
400 /* DAC Digital Volume */
401 SOC_DOUBLE("DAC2 Playback Switch", RT5640_DAC2_CTRL,
402 RT5640_M_DAC_L2_VOL_SFT, RT5640_M_DAC_R2_VOL_SFT, 1, 1),
403 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5640_DAC1_DIG_VOL,
404 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
405 175, 0, dac_vol_tlv),
406 /* IN1/IN2/IN3 Control */
407 SOC_SINGLE_TLV("IN1 Boost", RT5640_IN1_IN2,
408 RT5640_BST_SFT1, 8, 0, bst_tlv),
409 SOC_SINGLE_TLV("IN2 Boost", RT5640_IN3_IN4,
410 RT5640_BST_SFT2, 8, 0, bst_tlv),
411 SOC_SINGLE_TLV("IN3 Boost", RT5640_IN1_IN2,
412 RT5640_BST_SFT2, 8, 0, bst_tlv),
413
414 /* INL/INR Volume Control */
415 SOC_DOUBLE_TLV("IN Capture Volume", RT5640_INL_INR_VOL,
416 RT5640_INL_VOL_SFT, RT5640_INR_VOL_SFT,
417 31, 1, in_vol_tlv),
418 /* ADC Digital Volume Control */
419 SOC_DOUBLE("ADC Capture Switch", RT5640_ADC_DIG_VOL,
420 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
421 SOC_DOUBLE_TLV("ADC Capture Volume", RT5640_ADC_DIG_VOL,
422 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
423 127, 0, adc_vol_tlv),
424 SOC_DOUBLE("Mono ADC Capture Switch", RT5640_DUMMY1,
425 RT5640_M_MONO_ADC_L_SFT, RT5640_M_MONO_ADC_R_SFT, 1, 1),
426 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5640_ADC_DATA,
427 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
428 127, 0, adc_vol_tlv),
429 /* ADC Boost Volume Control */
430 SOC_DOUBLE_TLV("ADC Boost Gain", RT5640_ADC_BST_VOL,
431 RT5640_ADC_L_BST_SFT, RT5640_ADC_R_BST_SFT,
432 3, 0, adc_bst_tlv),
433 /* Class D speaker gain ratio */
434 SOC_ENUM("Class D SPK Ratio Control", rt5640_clsd_spk_ratio_enum),
435
436 SOC_ENUM("ADC IF1 Data Switch", rt5640_if1_adc_enum),
437 SOC_ENUM("DAC IF1 Data Switch", rt5640_if1_dac_enum),
438 SOC_ENUM("ADC IF2 Data Switch", rt5640_if2_adc_enum),
439 SOC_ENUM("DAC IF2 Data Switch", rt5640_if2_dac_enum),
440 };
441
442 static const struct snd_kcontrol_new rt5640_specific_snd_controls[] = {
443 /* MONO Output Control */
444 SOC_SINGLE("Mono Playback Switch", RT5640_MONO_OUT, RT5640_L_MUTE_SFT,
445 1, 1),
446
447 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5640_DAC2_DIG_VOL,
448 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 175, 0, dac_vol_tlv),
449 };
450
451 /**
452 * set_dmic_clk - Set parameter of dmic.
453 *
454 * @w: DAPM widget.
455 * @kcontrol: The kcontrol of this widget.
456 * @event: Event id.
457 *
458 */
set_dmic_clk(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)459 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
460 struct snd_kcontrol *kcontrol, int event)
461 {
462 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
463 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);
464 int idx, rate;
465
466 rate = rt5640->sysclk / rl6231_get_pre_div(rt5640->regmap,
467 RT5640_ADDA_CLK1, RT5640_I2S_PD1_SFT);
468 idx = rl6231_calc_dmic_clk(rate);
469 if (idx < 0)
470 dev_err(component->dev, "Failed to set DMIC clock\n");
471 else
472 snd_soc_component_update_bits(component, RT5640_DMIC, RT5640_DMIC_CLK_MASK,
473 idx << RT5640_DMIC_CLK_SFT);
474 return idx;
475 }
476
is_using_asrc(struct snd_soc_dapm_widget * source,struct snd_soc_dapm_widget * sink)477 static int is_using_asrc(struct snd_soc_dapm_widget *source,
478 struct snd_soc_dapm_widget *sink)
479 {
480 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
481 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);
482
483 if (!rt5640->asrc_en)
484 return 0;
485
486 return 1;
487 }
488
489 /* Digital Mixer */
490 static const struct snd_kcontrol_new rt5640_sto_adc_l_mix[] = {
491 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
492 RT5640_M_ADC_L1_SFT, 1, 1),
493 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
494 RT5640_M_ADC_L2_SFT, 1, 1),
495 };
496
497 static const struct snd_kcontrol_new rt5640_sto_adc_r_mix[] = {
498 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
499 RT5640_M_ADC_R1_SFT, 1, 1),
500 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
501 RT5640_M_ADC_R2_SFT, 1, 1),
502 };
503
504 static const struct snd_kcontrol_new rt5640_mono_adc_l_mix[] = {
505 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
506 RT5640_M_MONO_ADC_L1_SFT, 1, 1),
507 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
508 RT5640_M_MONO_ADC_L2_SFT, 1, 1),
509 };
510
511 static const struct snd_kcontrol_new rt5640_mono_adc_r_mix[] = {
512 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
513 RT5640_M_MONO_ADC_R1_SFT, 1, 1),
514 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
515 RT5640_M_MONO_ADC_R2_SFT, 1, 1),
516 };
517
518 static const struct snd_kcontrol_new rt5640_dac_l_mix[] = {
519 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
520 RT5640_M_ADCMIX_L_SFT, 1, 1),
521 SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
522 RT5640_M_IF1_DAC_L_SFT, 1, 1),
523 };
524
525 static const struct snd_kcontrol_new rt5640_dac_r_mix[] = {
526 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
527 RT5640_M_ADCMIX_R_SFT, 1, 1),
528 SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
529 RT5640_M_IF1_DAC_R_SFT, 1, 1),
530 };
531
532 static const struct snd_kcontrol_new rt5640_sto_dac_l_mix[] = {
533 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_STO_DAC_MIXER,
534 RT5640_M_DAC_L1_SFT, 1, 1),
535 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_STO_DAC_MIXER,
536 RT5640_M_DAC_L2_SFT, 1, 1),
537 SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
538 RT5640_M_ANC_DAC_L_SFT, 1, 1),
539 };
540
541 static const struct snd_kcontrol_new rt5640_sto_dac_r_mix[] = {
542 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_STO_DAC_MIXER,
543 RT5640_M_DAC_R1_SFT, 1, 1),
544 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_STO_DAC_MIXER,
545 RT5640_M_DAC_R2_SFT, 1, 1),
546 SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
547 RT5640_M_ANC_DAC_R_SFT, 1, 1),
548 };
549
550 static const struct snd_kcontrol_new rt5639_sto_dac_l_mix[] = {
551 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_STO_DAC_MIXER,
552 RT5640_M_DAC_L1_SFT, 1, 1),
553 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_STO_DAC_MIXER,
554 RT5640_M_DAC_L2_SFT, 1, 1),
555 };
556
557 static const struct snd_kcontrol_new rt5639_sto_dac_r_mix[] = {
558 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_STO_DAC_MIXER,
559 RT5640_M_DAC_R1_SFT, 1, 1),
560 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_STO_DAC_MIXER,
561 RT5640_M_DAC_R2_SFT, 1, 1),
562 };
563
564 static const struct snd_kcontrol_new rt5640_mono_dac_l_mix[] = {
565 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_MONO_DAC_MIXER,
566 RT5640_M_DAC_L1_MONO_L_SFT, 1, 1),
567 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
568 RT5640_M_DAC_L2_MONO_L_SFT, 1, 1),
569 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
570 RT5640_M_DAC_R2_MONO_L_SFT, 1, 1),
571 };
572
573 static const struct snd_kcontrol_new rt5640_mono_dac_r_mix[] = {
574 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_MONO_DAC_MIXER,
575 RT5640_M_DAC_R1_MONO_R_SFT, 1, 1),
576 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
577 RT5640_M_DAC_R2_MONO_R_SFT, 1, 1),
578 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
579 RT5640_M_DAC_L2_MONO_R_SFT, 1, 1),
580 };
581
582 static const struct snd_kcontrol_new rt5640_dig_l_mix[] = {
583 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_DIG_MIXER,
584 RT5640_M_STO_L_DAC_L_SFT, 1, 1),
585 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_DIG_MIXER,
586 RT5640_M_DAC_L2_DAC_L_SFT, 1, 1),
587 };
588
589 static const struct snd_kcontrol_new rt5640_dig_r_mix[] = {
590 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_DIG_MIXER,
591 RT5640_M_STO_R_DAC_R_SFT, 1, 1),
592 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_DIG_MIXER,
593 RT5640_M_DAC_R2_DAC_R_SFT, 1, 1),
594 };
595
596 /* Analog Input Mixer */
597 static const struct snd_kcontrol_new rt5640_rec_l_mix[] = {
598 SOC_DAPM_SINGLE("HPOL Switch", RT5640_REC_L2_MIXER,
599 RT5640_M_HP_L_RM_L_SFT, 1, 1),
600 SOC_DAPM_SINGLE("INL Switch", RT5640_REC_L2_MIXER,
601 RT5640_M_IN_L_RM_L_SFT, 1, 1),
602 SOC_DAPM_SINGLE("BST3 Switch", RT5640_REC_L2_MIXER,
603 RT5640_M_BST2_RM_L_SFT, 1, 1),
604 SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_L2_MIXER,
605 RT5640_M_BST4_RM_L_SFT, 1, 1),
606 SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_L2_MIXER,
607 RT5640_M_BST1_RM_L_SFT, 1, 1),
608 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_REC_L2_MIXER,
609 RT5640_M_OM_L_RM_L_SFT, 1, 1),
610 };
611
612 static const struct snd_kcontrol_new rt5640_rec_r_mix[] = {
613 SOC_DAPM_SINGLE("HPOR Switch", RT5640_REC_R2_MIXER,
614 RT5640_M_HP_R_RM_R_SFT, 1, 1),
615 SOC_DAPM_SINGLE("INR Switch", RT5640_REC_R2_MIXER,
616 RT5640_M_IN_R_RM_R_SFT, 1, 1),
617 SOC_DAPM_SINGLE("BST3 Switch", RT5640_REC_R2_MIXER,
618 RT5640_M_BST2_RM_R_SFT, 1, 1),
619 SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_R2_MIXER,
620 RT5640_M_BST4_RM_R_SFT, 1, 1),
621 SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_R2_MIXER,
622 RT5640_M_BST1_RM_R_SFT, 1, 1),
623 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_REC_R2_MIXER,
624 RT5640_M_OM_R_RM_R_SFT, 1, 1),
625 };
626
627 /* Analog Output Mixer */
628 static const struct snd_kcontrol_new rt5640_spk_l_mix[] = {
629 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_SPK_L_MIXER,
630 RT5640_M_RM_L_SM_L_SFT, 1, 1),
631 SOC_DAPM_SINGLE("INL Switch", RT5640_SPK_L_MIXER,
632 RT5640_M_IN_L_SM_L_SFT, 1, 1),
633 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPK_L_MIXER,
634 RT5640_M_DAC_L1_SM_L_SFT, 1, 1),
635 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_SPK_L_MIXER,
636 RT5640_M_DAC_L2_SM_L_SFT, 1, 1),
637 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_SPK_L_MIXER,
638 RT5640_M_OM_L_SM_L_SFT, 1, 1),
639 };
640
641 static const struct snd_kcontrol_new rt5640_spk_r_mix[] = {
642 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_SPK_R_MIXER,
643 RT5640_M_RM_R_SM_R_SFT, 1, 1),
644 SOC_DAPM_SINGLE("INR Switch", RT5640_SPK_R_MIXER,
645 RT5640_M_IN_R_SM_R_SFT, 1, 1),
646 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPK_R_MIXER,
647 RT5640_M_DAC_R1_SM_R_SFT, 1, 1),
648 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_SPK_R_MIXER,
649 RT5640_M_DAC_R2_SM_R_SFT, 1, 1),
650 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_SPK_R_MIXER,
651 RT5640_M_OM_R_SM_R_SFT, 1, 1),
652 };
653
654 static const struct snd_kcontrol_new rt5640_out_l_mix[] = {
655 SOC_DAPM_SINGLE("SPK MIXL Switch", RT5640_OUT_L3_MIXER,
656 RT5640_M_SM_L_OM_L_SFT, 1, 1),
657 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_L3_MIXER,
658 RT5640_M_BST1_OM_L_SFT, 1, 1),
659 SOC_DAPM_SINGLE("INL Switch", RT5640_OUT_L3_MIXER,
660 RT5640_M_IN_L_OM_L_SFT, 1, 1),
661 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_OUT_L3_MIXER,
662 RT5640_M_RM_L_OM_L_SFT, 1, 1),
663 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_L3_MIXER,
664 RT5640_M_DAC_R2_OM_L_SFT, 1, 1),
665 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_L3_MIXER,
666 RT5640_M_DAC_L2_OM_L_SFT, 1, 1),
667 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_OUT_L3_MIXER,
668 RT5640_M_DAC_L1_OM_L_SFT, 1, 1),
669 };
670
671 static const struct snd_kcontrol_new rt5640_out_r_mix[] = {
672 SOC_DAPM_SINGLE("SPK MIXR Switch", RT5640_OUT_R3_MIXER,
673 RT5640_M_SM_L_OM_R_SFT, 1, 1),
674 SOC_DAPM_SINGLE("BST2 Switch", RT5640_OUT_R3_MIXER,
675 RT5640_M_BST4_OM_R_SFT, 1, 1),
676 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_R3_MIXER,
677 RT5640_M_BST1_OM_R_SFT, 1, 1),
678 SOC_DAPM_SINGLE("INR Switch", RT5640_OUT_R3_MIXER,
679 RT5640_M_IN_R_OM_R_SFT, 1, 1),
680 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_OUT_R3_MIXER,
681 RT5640_M_RM_R_OM_R_SFT, 1, 1),
682 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_R3_MIXER,
683 RT5640_M_DAC_L2_OM_R_SFT, 1, 1),
684 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_R3_MIXER,
685 RT5640_M_DAC_R2_OM_R_SFT, 1, 1),
686 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_OUT_R3_MIXER,
687 RT5640_M_DAC_R1_OM_R_SFT, 1, 1),
688 };
689
690 static const struct snd_kcontrol_new rt5639_out_l_mix[] = {
691 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_L3_MIXER,
692 RT5640_M_BST1_OM_L_SFT, 1, 1),
693 SOC_DAPM_SINGLE("INL Switch", RT5640_OUT_L3_MIXER,
694 RT5640_M_IN_L_OM_L_SFT, 1, 1),
695 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_OUT_L3_MIXER,
696 RT5640_M_RM_L_OM_L_SFT, 1, 1),
697 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_OUT_L3_MIXER,
698 RT5640_M_DAC_L1_OM_L_SFT, 1, 1),
699 };
700
701 static const struct snd_kcontrol_new rt5639_out_r_mix[] = {
702 SOC_DAPM_SINGLE("BST2 Switch", RT5640_OUT_R3_MIXER,
703 RT5640_M_BST4_OM_R_SFT, 1, 1),
704 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_R3_MIXER,
705 RT5640_M_BST1_OM_R_SFT, 1, 1),
706 SOC_DAPM_SINGLE("INR Switch", RT5640_OUT_R3_MIXER,
707 RT5640_M_IN_R_OM_R_SFT, 1, 1),
708 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_OUT_R3_MIXER,
709 RT5640_M_RM_R_OM_R_SFT, 1, 1),
710 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_OUT_R3_MIXER,
711 RT5640_M_DAC_R1_OM_R_SFT, 1, 1),
712 };
713
714 static const struct snd_kcontrol_new rt5640_spo_l_mix[] = {
715 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_L_MIXER,
716 RT5640_M_DAC_R1_SPM_L_SFT, 1, 1),
717 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPO_L_MIXER,
718 RT5640_M_DAC_L1_SPM_L_SFT, 1, 1),
719 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_L_MIXER,
720 RT5640_M_SV_R_SPM_L_SFT, 1, 1),
721 SOC_DAPM_SINGLE("SPKVOL L Switch", RT5640_SPO_L_MIXER,
722 RT5640_M_SV_L_SPM_L_SFT, 1, 1),
723 SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_L_MIXER,
724 RT5640_M_BST1_SPM_L_SFT, 1, 1),
725 };
726
727 static const struct snd_kcontrol_new rt5640_spo_r_mix[] = {
728 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_R_MIXER,
729 RT5640_M_DAC_R1_SPM_R_SFT, 1, 1),
730 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_R_MIXER,
731 RT5640_M_SV_R_SPM_R_SFT, 1, 1),
732 SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_R_MIXER,
733 RT5640_M_BST1_SPM_R_SFT, 1, 1),
734 };
735
736 static const struct snd_kcontrol_new rt5640_hpo_mix[] = {
737 SOC_DAPM_SINGLE("HPO MIX DAC2 Switch", RT5640_HPO_MIXER,
738 RT5640_M_DAC2_HM_SFT, 1, 1),
739 SOC_DAPM_SINGLE("HPO MIX DAC1 Switch", RT5640_HPO_MIXER,
740 RT5640_M_DAC1_HM_SFT, 1, 1),
741 SOC_DAPM_SINGLE("HPO MIX HPVOL Switch", RT5640_HPO_MIXER,
742 RT5640_M_HPVOL_HM_SFT, 1, 1),
743 };
744
745 static const struct snd_kcontrol_new rt5639_hpo_mix[] = {
746 SOC_DAPM_SINGLE("HPO MIX DAC1 Switch", RT5640_HPO_MIXER,
747 RT5640_M_DAC1_HM_SFT, 1, 1),
748 SOC_DAPM_SINGLE("HPO MIX HPVOL Switch", RT5640_HPO_MIXER,
749 RT5640_M_HPVOL_HM_SFT, 1, 1),
750 };
751
752 static const struct snd_kcontrol_new rt5640_lout_mix[] = {
753 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_LOUT_MIXER,
754 RT5640_M_DAC_L1_LM_SFT, 1, 1),
755 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_LOUT_MIXER,
756 RT5640_M_DAC_R1_LM_SFT, 1, 1),
757 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_LOUT_MIXER,
758 RT5640_M_OV_L_LM_SFT, 1, 1),
759 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_LOUT_MIXER,
760 RT5640_M_OV_R_LM_SFT, 1, 1),
761 };
762
763 static const struct snd_kcontrol_new rt5640_mono_mix[] = {
764 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_MIXER,
765 RT5640_M_DAC_R2_MM_SFT, 1, 1),
766 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_MIXER,
767 RT5640_M_DAC_L2_MM_SFT, 1, 1),
768 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_MONO_MIXER,
769 RT5640_M_OV_R_MM_SFT, 1, 1),
770 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_MONO_MIXER,
771 RT5640_M_OV_L_MM_SFT, 1, 1),
772 SOC_DAPM_SINGLE("BST1 Switch", RT5640_MONO_MIXER,
773 RT5640_M_BST1_MM_SFT, 1, 1),
774 };
775
776 static const struct snd_kcontrol_new spk_l_enable_control =
777 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_SPK_VOL,
778 RT5640_L_MUTE_SFT, 1, 1);
779
780 static const struct snd_kcontrol_new spk_r_enable_control =
781 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_SPK_VOL,
782 RT5640_R_MUTE_SFT, 1, 1);
783
784 static const struct snd_kcontrol_new hp_l_enable_control =
785 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_HP_VOL,
786 RT5640_L_MUTE_SFT, 1, 1);
787
788 static const struct snd_kcontrol_new hp_r_enable_control =
789 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_HP_VOL,
790 RT5640_R_MUTE_SFT, 1, 1);
791
792 /* Stereo ADC source */
793 static const char * const rt5640_stereo_adc1_src[] = {
794 "DIG MIX", "ADC"
795 };
796
797 static SOC_ENUM_SINGLE_DECL(rt5640_stereo_adc1_enum, RT5640_STO_ADC_MIXER,
798 RT5640_ADC_1_SRC_SFT, rt5640_stereo_adc1_src);
799
800 static const struct snd_kcontrol_new rt5640_sto_adc_1_mux =
801 SOC_DAPM_ENUM("Stereo ADC1 Mux", rt5640_stereo_adc1_enum);
802
803 static const char * const rt5640_stereo_adc2_src[] = {
804 "DMIC1", "DMIC2", "DIG MIX"
805 };
806
807 static SOC_ENUM_SINGLE_DECL(rt5640_stereo_adc2_enum, RT5640_STO_ADC_MIXER,
808 RT5640_ADC_2_SRC_SFT, rt5640_stereo_adc2_src);
809
810 static const struct snd_kcontrol_new rt5640_sto_adc_2_mux =
811 SOC_DAPM_ENUM("Stereo ADC2 Mux", rt5640_stereo_adc2_enum);
812
813 /* Mono ADC source */
814 static const char * const rt5640_mono_adc_l1_src[] = {
815 "Mono DAC MIXL", "ADCL"
816 };
817
818 static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_l1_enum, RT5640_MONO_ADC_MIXER,
819 RT5640_MONO_ADC_L1_SRC_SFT, rt5640_mono_adc_l1_src);
820
821 static const struct snd_kcontrol_new rt5640_mono_adc_l1_mux =
822 SOC_DAPM_ENUM("Mono ADC1 left source", rt5640_mono_adc_l1_enum);
823
824 static const char * const rt5640_mono_adc_l2_src[] = {
825 "DMIC L1", "DMIC L2", "Mono DAC MIXL"
826 };
827
828 static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_l2_enum, RT5640_MONO_ADC_MIXER,
829 RT5640_MONO_ADC_L2_SRC_SFT, rt5640_mono_adc_l2_src);
830
831 static const struct snd_kcontrol_new rt5640_mono_adc_l2_mux =
832 SOC_DAPM_ENUM("Mono ADC2 left source", rt5640_mono_adc_l2_enum);
833
834 static const char * const rt5640_mono_adc_r1_src[] = {
835 "Mono DAC MIXR", "ADCR"
836 };
837
838 static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_r1_enum, RT5640_MONO_ADC_MIXER,
839 RT5640_MONO_ADC_R1_SRC_SFT, rt5640_mono_adc_r1_src);
840
841 static const struct snd_kcontrol_new rt5640_mono_adc_r1_mux =
842 SOC_DAPM_ENUM("Mono ADC1 right source", rt5640_mono_adc_r1_enum);
843
844 static const char * const rt5640_mono_adc_r2_src[] = {
845 "DMIC R1", "DMIC R2", "Mono DAC MIXR"
846 };
847
848 static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_r2_enum, RT5640_MONO_ADC_MIXER,
849 RT5640_MONO_ADC_R2_SRC_SFT, rt5640_mono_adc_r2_src);
850
851 static const struct snd_kcontrol_new rt5640_mono_adc_r2_mux =
852 SOC_DAPM_ENUM("Mono ADC2 right source", rt5640_mono_adc_r2_enum);
853
854 /* DAC2 channel source */
855 static const char * const rt5640_dac_l2_src[] = {
856 "IF2", "Base L/R"
857 };
858
859 static int rt5640_dac_l2_values[] = {
860 0,
861 3,
862 };
863
864 static SOC_VALUE_ENUM_SINGLE_DECL(rt5640_dac_l2_enum,
865 RT5640_DSP_PATH2, RT5640_DAC_L2_SEL_SFT,
866 0x3, rt5640_dac_l2_src, rt5640_dac_l2_values);
867
868 static const struct snd_kcontrol_new rt5640_dac_l2_mux =
869 SOC_DAPM_ENUM("DAC2 left channel source", rt5640_dac_l2_enum);
870
871 static const char * const rt5640_dac_r2_src[] = {
872 "IF2",
873 };
874
875 static int rt5640_dac_r2_values[] = {
876 0,
877 };
878
879 static SOC_VALUE_ENUM_SINGLE_DECL(rt5640_dac_r2_enum,
880 RT5640_DSP_PATH2, RT5640_DAC_R2_SEL_SFT,
881 0x3, rt5640_dac_r2_src, rt5640_dac_r2_values);
882
883 static const struct snd_kcontrol_new rt5640_dac_r2_mux =
884 SOC_DAPM_ENUM("DAC2 right channel source", rt5640_dac_r2_enum);
885
886 /* digital interface and iis interface map */
887 static const char * const rt5640_dai_iis_map[] = {
888 "1:1|2:2", "1:2|2:1", "1:1|2:1", "1:2|2:2"
889 };
890
891 static int rt5640_dai_iis_map_values[] = {
892 0,
893 5,
894 6,
895 7,
896 };
897
898 static SOC_VALUE_ENUM_SINGLE_DECL(rt5640_dai_iis_map_enum,
899 RT5640_I2S1_SDP, RT5640_I2S_IF_SFT,
900 0x7, rt5640_dai_iis_map,
901 rt5640_dai_iis_map_values);
902
903 static const struct snd_kcontrol_new rt5640_dai_mux =
904 SOC_DAPM_ENUM("DAI select", rt5640_dai_iis_map_enum);
905
906 /* SDI select */
907 static const char * const rt5640_sdi_sel[] = {
908 "IF1", "IF2"
909 };
910
911 static SOC_ENUM_SINGLE_DECL(rt5640_sdi_sel_enum, RT5640_I2S2_SDP,
912 RT5640_I2S2_SDI_SFT, rt5640_sdi_sel);
913
914 static const struct snd_kcontrol_new rt5640_sdi_mux =
915 SOC_DAPM_ENUM("SDI select", rt5640_sdi_sel_enum);
916
hp_amp_power_on(struct snd_soc_component * component)917 static void hp_amp_power_on(struct snd_soc_component *component)
918 {
919 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);
920
921 /* depop parameters */
922 regmap_update_bits(rt5640->regmap, RT5640_PR_BASE +
923 RT5640_CHPUMP_INT_REG1, 0x0700, 0x0200);
924 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M2,
925 RT5640_DEPOP_MASK, RT5640_DEPOP_MAN);
926 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M1,
927 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK | RT5640_HP_CB_MASK,
928 RT5640_HP_CP_PU | RT5640_HP_SG_DIS | RT5640_HP_CB_PU);
929 regmap_write(rt5640->regmap, RT5640_PR_BASE + RT5640_HP_DCC_INT1,
930 0x9f00);
931 /* headphone amp power on */
932 regmap_update_bits(rt5640->regmap, RT5640_PWR_ANLG1,
933 RT5640_PWR_FV1 | RT5640_PWR_FV2, 0);
934 regmap_update_bits(rt5640->regmap, RT5640_PWR_ANLG1,
935 RT5640_PWR_HA,
936 RT5640_PWR_HA);
937 usleep_range(10000, 15000);
938 regmap_update_bits(rt5640->regmap, RT5640_PWR_ANLG1,
939 RT5640_PWR_FV1 | RT5640_PWR_FV2 ,
940 RT5640_PWR_FV1 | RT5640_PWR_FV2);
941 }
942
rt5640_pmu_depop(struct snd_soc_component * component)943 static void rt5640_pmu_depop(struct snd_soc_component *component)
944 {
945 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);
946
947 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M2,
948 RT5640_DEPOP_MASK | RT5640_DIG_DP_MASK,
949 RT5640_DEPOP_AUTO | RT5640_DIG_DP_EN);
950 regmap_update_bits(rt5640->regmap, RT5640_CHARGE_PUMP,
951 RT5640_PM_HP_MASK, RT5640_PM_HP_HV);
952
953 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M3,
954 RT5640_CP_FQ1_MASK | RT5640_CP_FQ2_MASK | RT5640_CP_FQ3_MASK,
955 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ1_SFT) |
956 (RT5640_CP_FQ_12_KHZ << RT5640_CP_FQ2_SFT) |
957 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ3_SFT));
958
959 regmap_write(rt5640->regmap, RT5640_PR_BASE +
960 RT5640_MAMP_INT_REG2, 0x1c00);
961 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M1,
962 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK,
963 RT5640_HP_CP_PD | RT5640_HP_SG_EN);
964 regmap_update_bits(rt5640->regmap, RT5640_PR_BASE +
965 RT5640_CHPUMP_INT_REG1, 0x0700, 0x0400);
966 }
967
rt5640_hp_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)968 static int rt5640_hp_event(struct snd_soc_dapm_widget *w,
969 struct snd_kcontrol *kcontrol, int event)
970 {
971 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
972 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);
973
974 switch (event) {
975 case SND_SOC_DAPM_POST_PMU:
976 rt5640_pmu_depop(component);
977 rt5640->hp_mute = false;
978 break;
979
980 case SND_SOC_DAPM_PRE_PMD:
981 rt5640->hp_mute = true;
982 msleep(70);
983 break;
984
985 default:
986 return 0;
987 }
988
989 return 0;
990 }
991
rt5640_lout_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)992 static int rt5640_lout_event(struct snd_soc_dapm_widget *w,
993 struct snd_kcontrol *kcontrol, int event)
994 {
995 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
996
997 switch (event) {
998 case SND_SOC_DAPM_POST_PMU:
999 hp_amp_power_on(component);
1000 snd_soc_component_update_bits(component, RT5640_PWR_ANLG1,
1001 RT5640_PWR_LM, RT5640_PWR_LM);
1002 snd_soc_component_update_bits(component, RT5640_OUTPUT,
1003 RT5640_L_MUTE | RT5640_R_MUTE, 0);
1004 break;
1005
1006 case SND_SOC_DAPM_PRE_PMD:
1007 snd_soc_component_update_bits(component, RT5640_OUTPUT,
1008 RT5640_L_MUTE | RT5640_R_MUTE,
1009 RT5640_L_MUTE | RT5640_R_MUTE);
1010 snd_soc_component_update_bits(component, RT5640_PWR_ANLG1,
1011 RT5640_PWR_LM, 0);
1012 break;
1013
1014 default:
1015 return 0;
1016 }
1017
1018 return 0;
1019 }
1020
rt5640_hp_power_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)1021 static int rt5640_hp_power_event(struct snd_soc_dapm_widget *w,
1022 struct snd_kcontrol *kcontrol, int event)
1023 {
1024 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1025
1026 switch (event) {
1027 case SND_SOC_DAPM_POST_PMU:
1028 hp_amp_power_on(component);
1029 break;
1030 default:
1031 return 0;
1032 }
1033
1034 return 0;
1035 }
1036
rt5640_hp_post_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)1037 static int rt5640_hp_post_event(struct snd_soc_dapm_widget *w,
1038 struct snd_kcontrol *kcontrol, int event)
1039 {
1040 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1041 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);
1042
1043 switch (event) {
1044 case SND_SOC_DAPM_POST_PMU:
1045 if (!rt5640->hp_mute)
1046 msleep(80);
1047
1048 break;
1049
1050 default:
1051 return 0;
1052 }
1053
1054 return 0;
1055 }
1056
1057 static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = {
1058 /* ASRC */
1059 SND_SOC_DAPM_SUPPLY_S("Stereo Filter ASRC", 1, RT5640_ASRC_1,
1060 15, 0, NULL, 0),
1061 SND_SOC_DAPM_SUPPLY_S("I2S2 Filter ASRC", 1, RT5640_ASRC_1,
1062 12, 0, NULL, 0),
1063 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5640_ASRC_1,
1064 11, 0, NULL, 0),
1065 SND_SOC_DAPM_SUPPLY_S("DMIC1 ASRC", 1, RT5640_ASRC_1,
1066 9, 0, NULL, 0),
1067 SND_SOC_DAPM_SUPPLY_S("DMIC2 ASRC", 1, RT5640_ASRC_1,
1068 8, 0, NULL, 0),
1069
1070
1071 /* Input Side */
1072 /* micbias */
1073 SND_SOC_DAPM_SUPPLY("LDO2", RT5640_PWR_ANLG1,
1074 RT5640_PWR_LDO2_BIT, 0, NULL, 0),
1075 SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5640_PWR_ANLG2,
1076 RT5640_PWR_MB1_BIT, 0, NULL, 0),
1077 /* Input Lines */
1078 SND_SOC_DAPM_INPUT("DMIC1"),
1079 SND_SOC_DAPM_INPUT("DMIC2"),
1080 SND_SOC_DAPM_INPUT("IN1P"),
1081 SND_SOC_DAPM_INPUT("IN1N"),
1082 SND_SOC_DAPM_INPUT("IN2P"),
1083 SND_SOC_DAPM_INPUT("IN2N"),
1084 SND_SOC_DAPM_INPUT("IN3P"),
1085 SND_SOC_DAPM_INPUT("IN3N"),
1086 SND_SOC_DAPM_PGA("DMIC L1", SND_SOC_NOPM, 0, 0, NULL, 0),
1087 SND_SOC_DAPM_PGA("DMIC R1", SND_SOC_NOPM, 0, 0, NULL, 0),
1088 SND_SOC_DAPM_PGA("DMIC L2", SND_SOC_NOPM, 0, 0, NULL, 0),
1089 SND_SOC_DAPM_PGA("DMIC R2", SND_SOC_NOPM, 0, 0, NULL, 0),
1090
1091 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1092 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1093 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5640_DMIC, RT5640_DMIC_1_EN_SFT, 0,
1094 NULL, 0),
1095 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5640_DMIC, RT5640_DMIC_2_EN_SFT, 0,
1096 NULL, 0),
1097 /* Boost */
1098 SND_SOC_DAPM_PGA("BST1", RT5640_PWR_ANLG2,
1099 RT5640_PWR_BST1_BIT, 0, NULL, 0),
1100 SND_SOC_DAPM_PGA("BST2", RT5640_PWR_ANLG2,
1101 RT5640_PWR_BST4_BIT, 0, NULL, 0),
1102 SND_SOC_DAPM_PGA("BST3", RT5640_PWR_ANLG2,
1103 RT5640_PWR_BST2_BIT, 0, NULL, 0),
1104 /* Input Volume */
1105 SND_SOC_DAPM_PGA("INL VOL", RT5640_PWR_VOL,
1106 RT5640_PWR_IN_L_BIT, 0, NULL, 0),
1107 SND_SOC_DAPM_PGA("INR VOL", RT5640_PWR_VOL,
1108 RT5640_PWR_IN_R_BIT, 0, NULL, 0),
1109 /* REC Mixer */
1110 SND_SOC_DAPM_MIXER("RECMIXL", RT5640_PWR_MIXER, RT5640_PWR_RM_L_BIT, 0,
1111 rt5640_rec_l_mix, ARRAY_SIZE(rt5640_rec_l_mix)),
1112 SND_SOC_DAPM_MIXER("RECMIXR", RT5640_PWR_MIXER, RT5640_PWR_RM_R_BIT, 0,
1113 rt5640_rec_r_mix, ARRAY_SIZE(rt5640_rec_r_mix)),
1114 /* ADCs */
1115 SND_SOC_DAPM_ADC("ADC L", NULL, RT5640_PWR_DIG1,
1116 RT5640_PWR_ADC_L_BIT, 0),
1117 SND_SOC_DAPM_ADC("ADC R", NULL, RT5640_PWR_DIG1,
1118 RT5640_PWR_ADC_R_BIT, 0),
1119 /* ADC Mux */
1120 SND_SOC_DAPM_MUX("Stereo ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1121 &rt5640_sto_adc_2_mux),
1122 SND_SOC_DAPM_MUX("Stereo ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1123 &rt5640_sto_adc_2_mux),
1124 SND_SOC_DAPM_MUX("Stereo ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1125 &rt5640_sto_adc_1_mux),
1126 SND_SOC_DAPM_MUX("Stereo ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1127 &rt5640_sto_adc_1_mux),
1128 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1129 &rt5640_mono_adc_l2_mux),
1130 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1131 &rt5640_mono_adc_l1_mux),
1132 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1133 &rt5640_mono_adc_r1_mux),
1134 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1135 &rt5640_mono_adc_r2_mux),
1136 /* ADC Mixer */
1137 SND_SOC_DAPM_SUPPLY("Stereo Filter", RT5640_PWR_DIG2,
1138 RT5640_PWR_ADC_SF_BIT, 0, NULL, 0),
1139 SND_SOC_DAPM_MIXER("Stereo ADC MIXL", SND_SOC_NOPM, 0, 0,
1140 rt5640_sto_adc_l_mix, ARRAY_SIZE(rt5640_sto_adc_l_mix)),
1141 SND_SOC_DAPM_MIXER("Stereo ADC MIXR", SND_SOC_NOPM, 0, 0,
1142 rt5640_sto_adc_r_mix, ARRAY_SIZE(rt5640_sto_adc_r_mix)),
1143 SND_SOC_DAPM_SUPPLY("Mono Left Filter", RT5640_PWR_DIG2,
1144 RT5640_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1145 SND_SOC_DAPM_MIXER("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1146 rt5640_mono_adc_l_mix, ARRAY_SIZE(rt5640_mono_adc_l_mix)),
1147 SND_SOC_DAPM_SUPPLY("Mono Right Filter", RT5640_PWR_DIG2,
1148 RT5640_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1149 SND_SOC_DAPM_MIXER("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1150 rt5640_mono_adc_r_mix, ARRAY_SIZE(rt5640_mono_adc_r_mix)),
1151
1152 /* Digital Interface */
1153 SND_SOC_DAPM_SUPPLY("I2S1", RT5640_PWR_DIG1,
1154 RT5640_PWR_I2S1_BIT, 0, NULL, 0),
1155 SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1156 SND_SOC_DAPM_PGA("IF1 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1157 SND_SOC_DAPM_PGA("IF1 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1158 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1159 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1160 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1161 SND_SOC_DAPM_SUPPLY("I2S2", RT5640_PWR_DIG1,
1162 RT5640_PWR_I2S2_BIT, 0, NULL, 0),
1163 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1164 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1165 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1166 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1167 SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1168 SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1169 /* Digital Interface Select */
1170 SND_SOC_DAPM_MUX("DAI1 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1171 SND_SOC_DAPM_MUX("DAI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1172 SND_SOC_DAPM_MUX("DAI1 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1173 SND_SOC_DAPM_MUX("DAI1 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1174 SND_SOC_DAPM_MUX("SDI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1175 SND_SOC_DAPM_MUX("DAI2 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1176 SND_SOC_DAPM_MUX("DAI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1177 SND_SOC_DAPM_MUX("DAI2 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1178 SND_SOC_DAPM_MUX("DAI2 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1179 SND_SOC_DAPM_MUX("SDI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1180 /* Audio Interface */
1181 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1182 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1183 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1184 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1185
1186 /* Output Side */
1187 /* DAC mixer before sound effect */
1188 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1189 rt5640_dac_l_mix, ARRAY_SIZE(rt5640_dac_l_mix)),
1190 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1191 rt5640_dac_r_mix, ARRAY_SIZE(rt5640_dac_r_mix)),
1192
1193 /* DAC Mixer */
1194 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1195 rt5640_mono_dac_l_mix, ARRAY_SIZE(rt5640_mono_dac_l_mix)),
1196 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1197 rt5640_mono_dac_r_mix, ARRAY_SIZE(rt5640_mono_dac_r_mix)),
1198 SND_SOC_DAPM_MIXER("DIG MIXL", SND_SOC_NOPM, 0, 0,
1199 rt5640_dig_l_mix, ARRAY_SIZE(rt5640_dig_l_mix)),
1200 SND_SOC_DAPM_MIXER("DIG MIXR", SND_SOC_NOPM, 0, 0,
1201 rt5640_dig_r_mix, ARRAY_SIZE(rt5640_dig_r_mix)),
1202 /* DACs */
1203 SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM,
1204 0, 0),
1205 SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM,
1206 0, 0),
1207 SND_SOC_DAPM_SUPPLY("DAC L1 Power", RT5640_PWR_DIG1,
1208 RT5640_PWR_DAC_L1_BIT, 0, NULL, 0),
1209 SND_SOC_DAPM_SUPPLY("DAC R1 Power", RT5640_PWR_DIG1,
1210 RT5640_PWR_DAC_R1_BIT, 0, NULL, 0),
1211 SND_SOC_DAPM_SUPPLY("DAC L2 Power", RT5640_PWR_DIG1,
1212 RT5640_PWR_DAC_L2_BIT, 0, NULL, 0),
1213 SND_SOC_DAPM_SUPPLY("DAC R2 Power", RT5640_PWR_DIG1,
1214 RT5640_PWR_DAC_R2_BIT, 0, NULL, 0),
1215 /* SPK/OUT Mixer */
1216 SND_SOC_DAPM_MIXER("SPK MIXL", RT5640_PWR_MIXER, RT5640_PWR_SM_L_BIT,
1217 0, rt5640_spk_l_mix, ARRAY_SIZE(rt5640_spk_l_mix)),
1218 SND_SOC_DAPM_MIXER("SPK MIXR", RT5640_PWR_MIXER, RT5640_PWR_SM_R_BIT,
1219 0, rt5640_spk_r_mix, ARRAY_SIZE(rt5640_spk_r_mix)),
1220 /* Ouput Volume */
1221 SND_SOC_DAPM_PGA("SPKVOL L", RT5640_PWR_VOL,
1222 RT5640_PWR_SV_L_BIT, 0, NULL, 0),
1223 SND_SOC_DAPM_PGA("SPKVOL R", RT5640_PWR_VOL,
1224 RT5640_PWR_SV_R_BIT, 0, NULL, 0),
1225 SND_SOC_DAPM_PGA("OUTVOL L", RT5640_PWR_VOL,
1226 RT5640_PWR_OV_L_BIT, 0, NULL, 0),
1227 SND_SOC_DAPM_PGA("OUTVOL R", RT5640_PWR_VOL,
1228 RT5640_PWR_OV_R_BIT, 0, NULL, 0),
1229 SND_SOC_DAPM_PGA("HPOVOL L", RT5640_PWR_VOL,
1230 RT5640_PWR_HV_L_BIT, 0, NULL, 0),
1231 SND_SOC_DAPM_PGA("HPOVOL R", RT5640_PWR_VOL,
1232 RT5640_PWR_HV_R_BIT, 0, NULL, 0),
1233 /* SPO/HPO/LOUT/Mono Mixer */
1234 SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0,
1235 0, rt5640_spo_l_mix, ARRAY_SIZE(rt5640_spo_l_mix)),
1236 SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0,
1237 0, rt5640_spo_r_mix, ARRAY_SIZE(rt5640_spo_r_mix)),
1238 SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0,
1239 rt5640_lout_mix, ARRAY_SIZE(rt5640_lout_mix)),
1240 SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM,
1241 0, 0, rt5640_hp_power_event, SND_SOC_DAPM_POST_PMU),
1242 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0,
1243 rt5640_hp_event,
1244 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1245 SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0,
1246 rt5640_lout_event,
1247 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1248 SND_SOC_DAPM_SUPPLY("HP L Amp", RT5640_PWR_ANLG1,
1249 RT5640_PWR_HP_L_BIT, 0, NULL, 0),
1250 SND_SOC_DAPM_SUPPLY("HP R Amp", RT5640_PWR_ANLG1,
1251 RT5640_PWR_HP_R_BIT, 0, NULL, 0),
1252 SND_SOC_DAPM_SUPPLY("Improve SPK Amp Drv", RT5640_PWR_DIG1,
1253 RT5640_PWR_CLS_D_BIT, 0, NULL, 0),
1254
1255 /* Output Switch */
1256 SND_SOC_DAPM_SWITCH("Speaker L Playback", SND_SOC_NOPM, 0, 0,
1257 &spk_l_enable_control),
1258 SND_SOC_DAPM_SWITCH("Speaker R Playback", SND_SOC_NOPM, 0, 0,
1259 &spk_r_enable_control),
1260 SND_SOC_DAPM_SWITCH("HP L Playback", SND_SOC_NOPM, 0, 0,
1261 &hp_l_enable_control),
1262 SND_SOC_DAPM_SWITCH("HP R Playback", SND_SOC_NOPM, 0, 0,
1263 &hp_r_enable_control),
1264 SND_SOC_DAPM_POST("HP Post", rt5640_hp_post_event),
1265 /* Output Lines */
1266 SND_SOC_DAPM_OUTPUT("SPOLP"),
1267 SND_SOC_DAPM_OUTPUT("SPOLN"),
1268 SND_SOC_DAPM_OUTPUT("SPORP"),
1269 SND_SOC_DAPM_OUTPUT("SPORN"),
1270 SND_SOC_DAPM_OUTPUT("HPOL"),
1271 SND_SOC_DAPM_OUTPUT("HPOR"),
1272 SND_SOC_DAPM_OUTPUT("LOUTL"),
1273 SND_SOC_DAPM_OUTPUT("LOUTR"),
1274 };
1275
1276 static const struct snd_soc_dapm_widget rt5640_specific_dapm_widgets[] = {
1277 /* Audio DSP */
1278 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1279 /* ANC */
1280 SND_SOC_DAPM_PGA("ANC", SND_SOC_NOPM, 0, 0, NULL, 0),
1281
1282 /* DAC2 channel Mux */
1283 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dac_l2_mux),
1284 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dac_r2_mux),
1285
1286 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1287 rt5640_sto_dac_l_mix, ARRAY_SIZE(rt5640_sto_dac_l_mix)),
1288 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1289 rt5640_sto_dac_r_mix, ARRAY_SIZE(rt5640_sto_dac_r_mix)),
1290
1291 SND_SOC_DAPM_DAC("DAC R2", NULL, SND_SOC_NOPM, 0,
1292 0),
1293 SND_SOC_DAPM_DAC("DAC L2", NULL, SND_SOC_NOPM, 0,
1294 0),
1295
1296 SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,
1297 0, rt5640_out_l_mix, ARRAY_SIZE(rt5640_out_l_mix)),
1298 SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,
1299 0, rt5640_out_r_mix, ARRAY_SIZE(rt5640_out_r_mix)),
1300
1301 SND_SOC_DAPM_MIXER("HPO MIX L", SND_SOC_NOPM, 0, 0,
1302 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1303 SND_SOC_DAPM_MIXER("HPO MIX R", SND_SOC_NOPM, 0, 0,
1304 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1305
1306 SND_SOC_DAPM_MIXER("Mono MIX", RT5640_PWR_ANLG1, RT5640_PWR_MM_BIT, 0,
1307 rt5640_mono_mix, ARRAY_SIZE(rt5640_mono_mix)),
1308 SND_SOC_DAPM_SUPPLY("Improve MONO Amp Drv", RT5640_PWR_ANLG1,
1309 RT5640_PWR_MA_BIT, 0, NULL, 0),
1310
1311 SND_SOC_DAPM_OUTPUT("MONOP"),
1312 SND_SOC_DAPM_OUTPUT("MONON"),
1313 };
1314
1315 static const struct snd_soc_dapm_widget rt5639_specific_dapm_widgets[] = {
1316 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1317 rt5639_sto_dac_l_mix, ARRAY_SIZE(rt5639_sto_dac_l_mix)),
1318 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1319 rt5639_sto_dac_r_mix, ARRAY_SIZE(rt5639_sto_dac_r_mix)),
1320
1321 SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,
1322 0, rt5639_out_l_mix, ARRAY_SIZE(rt5639_out_l_mix)),
1323 SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,
1324 0, rt5639_out_r_mix, ARRAY_SIZE(rt5639_out_r_mix)),
1325
1326 SND_SOC_DAPM_MIXER("HPO MIX L", SND_SOC_NOPM, 0, 0,
1327 rt5639_hpo_mix, ARRAY_SIZE(rt5639_hpo_mix)),
1328 SND_SOC_DAPM_MIXER("HPO MIX R", SND_SOC_NOPM, 0, 0,
1329 rt5639_hpo_mix, ARRAY_SIZE(rt5639_hpo_mix)),
1330 };
1331
1332 static const struct snd_soc_dapm_route rt5640_dapm_routes[] = {
1333 { "I2S1", NULL, "Stereo Filter ASRC", is_using_asrc },
1334 { "I2S2", NULL, "I2S2 ASRC", is_using_asrc },
1335 { "I2S2", NULL, "I2S2 Filter ASRC", is_using_asrc },
1336 { "DMIC1", NULL, "DMIC1 ASRC", is_using_asrc },
1337 { "DMIC2", NULL, "DMIC2 ASRC", is_using_asrc },
1338
1339 {"IN1P", NULL, "LDO2"},
1340 {"IN2P", NULL, "LDO2"},
1341 {"IN3P", NULL, "LDO2"},
1342
1343 {"DMIC L1", NULL, "DMIC1"},
1344 {"DMIC R1", NULL, "DMIC1"},
1345 {"DMIC L2", NULL, "DMIC2"},
1346 {"DMIC R2", NULL, "DMIC2"},
1347
1348 {"BST1", NULL, "IN1P"},
1349 {"BST1", NULL, "IN1N"},
1350 {"BST2", NULL, "IN2P"},
1351 {"BST2", NULL, "IN2N"},
1352 {"BST3", NULL, "IN3P"},
1353 {"BST3", NULL, "IN3N"},
1354
1355 {"INL VOL", NULL, "IN2P"},
1356 {"INR VOL", NULL, "IN2N"},
1357
1358 {"RECMIXL", "HPOL Switch", "HPOL"},
1359 {"RECMIXL", "INL Switch", "INL VOL"},
1360 {"RECMIXL", "BST3 Switch", "BST3"},
1361 {"RECMIXL", "BST2 Switch", "BST2"},
1362 {"RECMIXL", "BST1 Switch", "BST1"},
1363 {"RECMIXL", "OUT MIXL Switch", "OUT MIXL"},
1364
1365 {"RECMIXR", "HPOR Switch", "HPOR"},
1366 {"RECMIXR", "INR Switch", "INR VOL"},
1367 {"RECMIXR", "BST3 Switch", "BST3"},
1368 {"RECMIXR", "BST2 Switch", "BST2"},
1369 {"RECMIXR", "BST1 Switch", "BST1"},
1370 {"RECMIXR", "OUT MIXR Switch", "OUT MIXR"},
1371
1372 {"ADC L", NULL, "RECMIXL"},
1373 {"ADC R", NULL, "RECMIXR"},
1374
1375 {"DMIC L1", NULL, "DMIC CLK"},
1376 {"DMIC L1", NULL, "DMIC1 Power"},
1377 {"DMIC R1", NULL, "DMIC CLK"},
1378 {"DMIC R1", NULL, "DMIC1 Power"},
1379 {"DMIC L2", NULL, "DMIC CLK"},
1380 {"DMIC L2", NULL, "DMIC2 Power"},
1381 {"DMIC R2", NULL, "DMIC CLK"},
1382 {"DMIC R2", NULL, "DMIC2 Power"},
1383
1384 {"Stereo ADC L2 Mux", "DMIC1", "DMIC L1"},
1385 {"Stereo ADC L2 Mux", "DMIC2", "DMIC L2"},
1386 {"Stereo ADC L2 Mux", "DIG MIX", "DIG MIXL"},
1387 {"Stereo ADC L1 Mux", "ADC", "ADC L"},
1388 {"Stereo ADC L1 Mux", "DIG MIX", "DIG MIXL"},
1389
1390 {"Stereo ADC R1 Mux", "ADC", "ADC R"},
1391 {"Stereo ADC R1 Mux", "DIG MIX", "DIG MIXR"},
1392 {"Stereo ADC R2 Mux", "DMIC1", "DMIC R1"},
1393 {"Stereo ADC R2 Mux", "DMIC2", "DMIC R2"},
1394 {"Stereo ADC R2 Mux", "DIG MIX", "DIG MIXR"},
1395
1396 {"Mono ADC L2 Mux", "DMIC L1", "DMIC L1"},
1397 {"Mono ADC L2 Mux", "DMIC L2", "DMIC L2"},
1398 {"Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1399 {"Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1400 {"Mono ADC L1 Mux", "ADCL", "ADC L"},
1401
1402 {"Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1403 {"Mono ADC R1 Mux", "ADCR", "ADC R"},
1404 {"Mono ADC R2 Mux", "DMIC R1", "DMIC R1"},
1405 {"Mono ADC R2 Mux", "DMIC R2", "DMIC R2"},
1406 {"Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1407
1408 {"Stereo ADC MIXL", "ADC1 Switch", "Stereo ADC L1 Mux"},
1409 {"Stereo ADC MIXL", "ADC2 Switch", "Stereo ADC L2 Mux"},
1410 {"Stereo ADC MIXL", NULL, "Stereo Filter"},
1411
1412 {"Stereo ADC MIXR", "ADC1 Switch", "Stereo ADC R1 Mux"},
1413 {"Stereo ADC MIXR", "ADC2 Switch", "Stereo ADC R2 Mux"},
1414 {"Stereo ADC MIXR", NULL, "Stereo Filter"},
1415
1416 {"Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux"},
1417 {"Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux"},
1418 {"Mono ADC MIXL", NULL, "Mono Left Filter"},
1419
1420 {"Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux"},
1421 {"Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux"},
1422 {"Mono ADC MIXR", NULL, "Mono Right Filter"},
1423
1424 {"IF2 ADC L", NULL, "Mono ADC MIXL"},
1425 {"IF2 ADC R", NULL, "Mono ADC MIXR"},
1426 {"IF1 ADC L", NULL, "Stereo ADC MIXL"},
1427 {"IF1 ADC R", NULL, "Stereo ADC MIXR"},
1428
1429 {"IF1 ADC", NULL, "I2S1"},
1430 {"IF1 ADC", NULL, "IF1 ADC L"},
1431 {"IF1 ADC", NULL, "IF1 ADC R"},
1432 {"IF2 ADC", NULL, "I2S2"},
1433 {"IF2 ADC", NULL, "IF2 ADC L"},
1434 {"IF2 ADC", NULL, "IF2 ADC R"},
1435
1436 {"DAI1 TX Mux", "1:1|2:2", "IF1 ADC"},
1437 {"DAI1 TX Mux", "1:2|2:1", "IF2 ADC"},
1438 {"DAI1 IF1 Mux", "1:1|2:1", "IF1 ADC"},
1439 {"DAI1 IF2 Mux", "1:1|2:1", "IF2 ADC"},
1440 {"SDI1 TX Mux", "IF1", "DAI1 IF1 Mux"},
1441 {"SDI1 TX Mux", "IF2", "DAI1 IF2 Mux"},
1442
1443 {"DAI2 TX Mux", "1:2|2:1", "IF1 ADC"},
1444 {"DAI2 TX Mux", "1:1|2:2", "IF2 ADC"},
1445 {"DAI2 IF1 Mux", "1:2|2:2", "IF1 ADC"},
1446 {"DAI2 IF2 Mux", "1:2|2:2", "IF2 ADC"},
1447 {"SDI2 TX Mux", "IF1", "DAI2 IF1 Mux"},
1448 {"SDI2 TX Mux", "IF2", "DAI2 IF2 Mux"},
1449
1450 {"AIF1TX", NULL, "DAI1 TX Mux"},
1451 {"AIF1TX", NULL, "SDI1 TX Mux"},
1452 {"AIF2TX", NULL, "DAI2 TX Mux"},
1453 {"AIF2TX", NULL, "SDI2 TX Mux"},
1454
1455 {"DAI1 RX Mux", "1:1|2:2", "AIF1RX"},
1456 {"DAI1 RX Mux", "1:1|2:1", "AIF1RX"},
1457 {"DAI1 RX Mux", "1:2|2:1", "AIF2RX"},
1458 {"DAI1 RX Mux", "1:2|2:2", "AIF2RX"},
1459
1460 {"DAI2 RX Mux", "1:2|2:1", "AIF1RX"},
1461 {"DAI2 RX Mux", "1:1|2:1", "AIF1RX"},
1462 {"DAI2 RX Mux", "1:1|2:2", "AIF2RX"},
1463 {"DAI2 RX Mux", "1:2|2:2", "AIF2RX"},
1464
1465 {"IF1 DAC", NULL, "I2S1"},
1466 {"IF1 DAC", NULL, "DAI1 RX Mux"},
1467 {"IF2 DAC", NULL, "I2S2"},
1468 {"IF2 DAC", NULL, "DAI2 RX Mux"},
1469
1470 {"IF1 DAC L", NULL, "IF1 DAC"},
1471 {"IF1 DAC R", NULL, "IF1 DAC"},
1472 {"IF2 DAC L", NULL, "IF2 DAC"},
1473 {"IF2 DAC R", NULL, "IF2 DAC"},
1474
1475 {"DAC MIXL", "Stereo ADC Switch", "Stereo ADC MIXL"},
1476 {"DAC MIXL", "INF1 Switch", "IF1 DAC L"},
1477 {"DAC MIXL", NULL, "DAC L1 Power"},
1478 {"DAC MIXR", "Stereo ADC Switch", "Stereo ADC MIXR"},
1479 {"DAC MIXR", "INF1 Switch", "IF1 DAC R"},
1480 {"DAC MIXR", NULL, "DAC R1 Power"},
1481
1482 {"Stereo DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
1483 {"Stereo DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
1484
1485 {"Mono DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
1486 {"Mono DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
1487
1488 {"DIG MIXL", "DAC L1 Switch", "DAC MIXL"},
1489 {"DIG MIXR", "DAC R1 Switch", "DAC MIXR"},
1490
1491 {"DAC L1", NULL, "Stereo DAC MIXL"},
1492 {"DAC L1", NULL, "DAC L1 Power"},
1493 {"DAC R1", NULL, "Stereo DAC MIXR"},
1494 {"DAC R1", NULL, "DAC R1 Power"},
1495
1496 {"SPK MIXL", "REC MIXL Switch", "RECMIXL"},
1497 {"SPK MIXL", "INL Switch", "INL VOL"},
1498 {"SPK MIXL", "DAC L1 Switch", "DAC L1"},
1499 {"SPK MIXL", "OUT MIXL Switch", "OUT MIXL"},
1500 {"SPK MIXR", "REC MIXR Switch", "RECMIXR"},
1501 {"SPK MIXR", "INR Switch", "INR VOL"},
1502 {"SPK MIXR", "DAC R1 Switch", "DAC R1"},
1503 {"SPK MIXR", "OUT MIXR Switch", "OUT MIXR"},
1504
1505 {"OUT MIXL", "BST1 Switch", "BST1"},
1506 {"OUT MIXL", "INL Switch", "INL VOL"},
1507 {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
1508 {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
1509
1510 {"OUT MIXR", "BST2 Switch", "BST2"},
1511 {"OUT MIXR", "BST1 Switch", "BST1"},
1512 {"OUT MIXR", "INR Switch", "INR VOL"},
1513 {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
1514 {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
1515
1516 {"SPKVOL L", NULL, "SPK MIXL"},
1517 {"SPKVOL R", NULL, "SPK MIXR"},
1518 {"HPOVOL L", NULL, "OUT MIXL"},
1519 {"HPOVOL R", NULL, "OUT MIXR"},
1520 {"OUTVOL L", NULL, "OUT MIXL"},
1521 {"OUTVOL R", NULL, "OUT MIXR"},
1522
1523 {"SPOL MIX", "DAC R1 Switch", "DAC R1"},
1524 {"SPOL MIX", "DAC L1 Switch", "DAC L1"},
1525 {"SPOL MIX", "SPKVOL R Switch", "SPKVOL R"},
1526 {"SPOL MIX", "SPKVOL L Switch", "SPKVOL L"},
1527 {"SPOL MIX", "BST1 Switch", "BST1"},
1528 {"SPOR MIX", "DAC R1 Switch", "DAC R1"},
1529 {"SPOR MIX", "SPKVOL R Switch", "SPKVOL R"},
1530 {"SPOR MIX", "BST1 Switch", "BST1"},
1531
1532 {"HPO MIX L", "HPO MIX DAC1 Switch", "DAC L1"},
1533 {"HPO MIX L", "HPO MIX HPVOL Switch", "HPOVOL L"},
1534 {"HPO MIX L", NULL, "HP L Amp"},
1535 {"HPO MIX R", "HPO MIX DAC1 Switch", "DAC R1"},
1536 {"HPO MIX R", "HPO MIX HPVOL Switch", "HPOVOL R"},
1537 {"HPO MIX R", NULL, "HP R Amp"},
1538
1539 {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
1540 {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
1541 {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
1542 {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
1543
1544 {"HP Amp", NULL, "HPO MIX L"},
1545 {"HP Amp", NULL, "HPO MIX R"},
1546
1547 {"Speaker L Playback", "Switch", "SPOL MIX"},
1548 {"Speaker R Playback", "Switch", "SPOR MIX"},
1549 {"SPOLP", NULL, "Speaker L Playback"},
1550 {"SPOLN", NULL, "Speaker L Playback"},
1551 {"SPORP", NULL, "Speaker R Playback"},
1552 {"SPORN", NULL, "Speaker R Playback"},
1553
1554 {"SPOLP", NULL, "Improve SPK Amp Drv"},
1555 {"SPOLN", NULL, "Improve SPK Amp Drv"},
1556 {"SPORP", NULL, "Improve SPK Amp Drv"},
1557 {"SPORN", NULL, "Improve SPK Amp Drv"},
1558
1559 {"HPOL", NULL, "Improve HP Amp Drv"},
1560 {"HPOR", NULL, "Improve HP Amp Drv"},
1561
1562 {"HP L Playback", "Switch", "HP Amp"},
1563 {"HP R Playback", "Switch", "HP Amp"},
1564 {"HPOL", NULL, "HP L Playback"},
1565 {"HPOR", NULL, "HP R Playback"},
1566
1567 {"LOUT amp", NULL, "LOUT MIX"},
1568 {"LOUTL", NULL, "LOUT amp"},
1569 {"LOUTR", NULL, "LOUT amp"},
1570 };
1571
1572 static const struct snd_soc_dapm_route rt5640_specific_dapm_routes[] = {
1573 {"ANC", NULL, "Stereo ADC MIXL"},
1574 {"ANC", NULL, "Stereo ADC MIXR"},
1575
1576 {"Audio DSP", NULL, "DAC MIXL"},
1577 {"Audio DSP", NULL, "DAC MIXR"},
1578
1579 {"DAC L2 Mux", "IF2", "IF2 DAC L"},
1580 {"DAC L2 Mux", "Base L/R", "Audio DSP"},
1581 {"DAC L2 Mux", NULL, "DAC L2 Power"},
1582 {"DAC R2 Mux", "IF2", "IF2 DAC R"},
1583 {"DAC R2 Mux", NULL, "DAC R2 Power"},
1584
1585 {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1586 {"Stereo DAC MIXL", "ANC Switch", "ANC"},
1587 {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1588 {"Stereo DAC MIXR", "ANC Switch", "ANC"},
1589
1590 {"Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1591 {"Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux"},
1592
1593 {"Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1594 {"Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux"},
1595
1596 {"DIG MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1597 {"DIG MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1598
1599 {"DAC L2", NULL, "Mono DAC MIXL"},
1600 {"DAC L2", NULL, "DAC L2 Power"},
1601 {"DAC R2", NULL, "Mono DAC MIXR"},
1602 {"DAC R2", NULL, "DAC R2 Power"},
1603
1604 {"SPK MIXL", "DAC L2 Switch", "DAC L2"},
1605 {"SPK MIXR", "DAC R2 Switch", "DAC R2"},
1606
1607 {"OUT MIXL", "SPK MIXL Switch", "SPK MIXL"},
1608 {"OUT MIXR", "SPK MIXR Switch", "SPK MIXR"},
1609
1610 {"OUT MIXL", "DAC R2 Switch", "DAC R2"},
1611 {"OUT MIXL", "DAC L2 Switch", "DAC L2"},
1612
1613 {"OUT MIXR", "DAC L2 Switch", "DAC L2"},
1614 {"OUT MIXR", "DAC R2 Switch", "DAC R2"},
1615
1616 {"HPO MIX L", "HPO MIX DAC2 Switch", "DAC L2"},
1617 {"HPO MIX R", "HPO MIX DAC2 Switch", "DAC R2"},
1618
1619 {"Mono MIX", "DAC R2 Switch", "DAC R2"},
1620 {"Mono MIX", "DAC L2 Switch", "DAC L2"},
1621 {"Mono MIX", "OUTVOL R Switch", "OUTVOL R"},
1622 {"Mono MIX", "OUTVOL L Switch", "OUTVOL L"},
1623 {"Mono MIX", "BST1 Switch", "BST1"},
1624
1625 {"MONOP", NULL, "Mono MIX"},
1626 {"MONON", NULL, "Mono MIX"},
1627 {"MONOP", NULL, "Improve MONO Amp Drv"},
1628 };
1629
1630 static const struct snd_soc_dapm_route rt5639_specific_dapm_routes[] = {
1631 {"Stereo DAC MIXL", "DAC L2 Switch", "IF2 DAC L"},
1632 {"Stereo DAC MIXR", "DAC R2 Switch", "IF2 DAC R"},
1633
1634 {"Mono DAC MIXL", "DAC L2 Switch", "IF2 DAC L"},
1635 {"Mono DAC MIXL", "DAC R2 Switch", "IF2 DAC R"},
1636
1637 {"Mono DAC MIXR", "DAC R2 Switch", "IF2 DAC R"},
1638 {"Mono DAC MIXR", "DAC L2 Switch", "IF2 DAC L"},
1639
1640 {"DIG MIXL", "DAC L2 Switch", "IF2 DAC L"},
1641 {"DIG MIXR", "DAC R2 Switch", "IF2 DAC R"},
1642
1643 {"IF2 DAC L", NULL, "DAC L2 Power"},
1644 {"IF2 DAC R", NULL, "DAC R2 Power"},
1645 };
1646
get_sdp_info(struct snd_soc_component * component,int dai_id)1647 static int get_sdp_info(struct snd_soc_component *component, int dai_id)
1648 {
1649 int ret = 0, val;
1650
1651 if (component == NULL)
1652 return -EINVAL;
1653
1654 val = snd_soc_component_read32(component, RT5640_I2S1_SDP);
1655 val = (val & RT5640_I2S_IF_MASK) >> RT5640_I2S_IF_SFT;
1656 switch (dai_id) {
1657 case RT5640_AIF1:
1658 switch (val) {
1659 case RT5640_IF_123:
1660 case RT5640_IF_132:
1661 ret |= RT5640_U_IF1;
1662 break;
1663 case RT5640_IF_113:
1664 ret |= RT5640_U_IF1;
1665 /* fall through */
1666 case RT5640_IF_312:
1667 case RT5640_IF_213:
1668 ret |= RT5640_U_IF2;
1669 break;
1670 }
1671 break;
1672
1673 case RT5640_AIF2:
1674 switch (val) {
1675 case RT5640_IF_231:
1676 case RT5640_IF_213:
1677 ret |= RT5640_U_IF1;
1678 break;
1679 case RT5640_IF_223:
1680 ret |= RT5640_U_IF1;
1681 /* fall through */
1682 case RT5640_IF_123:
1683 case RT5640_IF_321:
1684 ret |= RT5640_U_IF2;
1685 break;
1686 }
1687 break;
1688
1689 default:
1690 ret = -EINVAL;
1691 break;
1692 }
1693
1694 return ret;
1695 }
1696
rt5640_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)1697 static int rt5640_hw_params(struct snd_pcm_substream *substream,
1698 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1699 {
1700 struct snd_soc_component *component = dai->component;
1701 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);
1702 unsigned int val_len = 0, val_clk, mask_clk;
1703 int dai_sel, pre_div, bclk_ms, frame_size;
1704
1705 rt5640->lrck[dai->id] = params_rate(params);
1706 pre_div = rl6231_get_clk_info(rt5640->sysclk, rt5640->lrck[dai->id]);
1707 if (pre_div < 0) {
1708 dev_err(component->dev, "Unsupported clock setting %d for DAI %d\n",
1709 rt5640->lrck[dai->id], dai->id);
1710 return -EINVAL;
1711 }
1712 frame_size = snd_soc_params_to_frame_size(params);
1713 if (frame_size < 0) {
1714 dev_err(component->dev, "Unsupported frame size: %d\n", frame_size);
1715 return frame_size;
1716 }
1717 if (frame_size > 32)
1718 bclk_ms = 1;
1719 else
1720 bclk_ms = 0;
1721 rt5640->bclk[dai->id] = rt5640->lrck[dai->id] * (32 << bclk_ms);
1722
1723 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
1724 rt5640->bclk[dai->id], rt5640->lrck[dai->id]);
1725 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
1726 bclk_ms, pre_div, dai->id);
1727
1728 switch (params_width(params)) {
1729 case 16:
1730 break;
1731 case 20:
1732 val_len |= RT5640_I2S_DL_20;
1733 break;
1734 case 24:
1735 val_len |= RT5640_I2S_DL_24;
1736 break;
1737 case 8:
1738 val_len |= RT5640_I2S_DL_8;
1739 break;
1740 default:
1741 return -EINVAL;
1742 }
1743
1744 dai_sel = get_sdp_info(component, dai->id);
1745 if (dai_sel < 0) {
1746 dev_err(component->dev, "Failed to get sdp info: %d\n", dai_sel);
1747 return -EINVAL;
1748 }
1749 if (dai_sel & RT5640_U_IF1) {
1750 mask_clk = RT5640_I2S_BCLK_MS1_MASK | RT5640_I2S_PD1_MASK;
1751 val_clk = bclk_ms << RT5640_I2S_BCLK_MS1_SFT |
1752 pre_div << RT5640_I2S_PD1_SFT;
1753 snd_soc_component_update_bits(component, RT5640_I2S1_SDP,
1754 RT5640_I2S_DL_MASK, val_len);
1755 snd_soc_component_update_bits(component, RT5640_ADDA_CLK1, mask_clk, val_clk);
1756 }
1757 if (dai_sel & RT5640_U_IF2) {
1758 mask_clk = RT5640_I2S_BCLK_MS2_MASK | RT5640_I2S_PD2_MASK;
1759 val_clk = bclk_ms << RT5640_I2S_BCLK_MS2_SFT |
1760 pre_div << RT5640_I2S_PD2_SFT;
1761 snd_soc_component_update_bits(component, RT5640_I2S2_SDP,
1762 RT5640_I2S_DL_MASK, val_len);
1763 snd_soc_component_update_bits(component, RT5640_ADDA_CLK1, mask_clk, val_clk);
1764 }
1765
1766 return 0;
1767 }
1768
rt5640_set_dai_fmt(struct snd_soc_dai * dai,unsigned int fmt)1769 static int rt5640_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1770 {
1771 struct snd_soc_component *component = dai->component;
1772 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);
1773 unsigned int reg_val = 0;
1774 int dai_sel;
1775
1776 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1777 case SND_SOC_DAIFMT_CBM_CFM:
1778 rt5640->master[dai->id] = 1;
1779 break;
1780 case SND_SOC_DAIFMT_CBS_CFS:
1781 reg_val |= RT5640_I2S_MS_S;
1782 rt5640->master[dai->id] = 0;
1783 break;
1784 default:
1785 return -EINVAL;
1786 }
1787
1788 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1789 case SND_SOC_DAIFMT_NB_NF:
1790 break;
1791 case SND_SOC_DAIFMT_IB_NF:
1792 reg_val |= RT5640_I2S_BP_INV;
1793 break;
1794 default:
1795 return -EINVAL;
1796 }
1797
1798 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1799 case SND_SOC_DAIFMT_I2S:
1800 break;
1801 case SND_SOC_DAIFMT_LEFT_J:
1802 reg_val |= RT5640_I2S_DF_LEFT;
1803 break;
1804 case SND_SOC_DAIFMT_DSP_A:
1805 reg_val |= RT5640_I2S_DF_PCM_A;
1806 break;
1807 case SND_SOC_DAIFMT_DSP_B:
1808 reg_val |= RT5640_I2S_DF_PCM_B;
1809 break;
1810 default:
1811 return -EINVAL;
1812 }
1813
1814 dai_sel = get_sdp_info(component, dai->id);
1815 if (dai_sel < 0) {
1816 dev_err(component->dev, "Failed to get sdp info: %d\n", dai_sel);
1817 return -EINVAL;
1818 }
1819 if (dai_sel & RT5640_U_IF1) {
1820 snd_soc_component_update_bits(component, RT5640_I2S1_SDP,
1821 RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
1822 RT5640_I2S_DF_MASK, reg_val);
1823 }
1824 if (dai_sel & RT5640_U_IF2) {
1825 snd_soc_component_update_bits(component, RT5640_I2S2_SDP,
1826 RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
1827 RT5640_I2S_DF_MASK, reg_val);
1828 }
1829
1830 return 0;
1831 }
1832
rt5640_set_dai_sysclk(struct snd_soc_dai * dai,int clk_id,unsigned int freq,int dir)1833 static int rt5640_set_dai_sysclk(struct snd_soc_dai *dai,
1834 int clk_id, unsigned int freq, int dir)
1835 {
1836 struct snd_soc_component *component = dai->component;
1837 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);
1838 unsigned int reg_val = 0;
1839 unsigned int pll_bit = 0;
1840
1841 if (freq == rt5640->sysclk && clk_id == rt5640->sysclk_src)
1842 return 0;
1843
1844 switch (clk_id) {
1845 case RT5640_SCLK_S_MCLK:
1846 reg_val |= RT5640_SCLK_SRC_MCLK;
1847 break;
1848 case RT5640_SCLK_S_PLL1:
1849 reg_val |= RT5640_SCLK_SRC_PLL1;
1850 pll_bit |= RT5640_PWR_PLL;
1851 break;
1852 case RT5640_SCLK_S_RCCLK:
1853 reg_val |= RT5640_SCLK_SRC_RCCLK;
1854 break;
1855 default:
1856 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
1857 return -EINVAL;
1858 }
1859 snd_soc_component_update_bits(component, RT5640_PWR_ANLG2,
1860 RT5640_PWR_PLL, pll_bit);
1861 snd_soc_component_update_bits(component, RT5640_GLB_CLK,
1862 RT5640_SCLK_SRC_MASK, reg_val);
1863 rt5640->sysclk = freq;
1864 rt5640->sysclk_src = clk_id;
1865
1866 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
1867 return 0;
1868 }
1869
rt5640_set_dai_pll(struct snd_soc_dai * dai,int pll_id,int source,unsigned int freq_in,unsigned int freq_out)1870 static int rt5640_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
1871 unsigned int freq_in, unsigned int freq_out)
1872 {
1873 struct snd_soc_component *component = dai->component;
1874 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);
1875 struct rl6231_pll_code pll_code;
1876 int ret;
1877
1878 if (source == rt5640->pll_src && freq_in == rt5640->pll_in &&
1879 freq_out == rt5640->pll_out)
1880 return 0;
1881
1882 if (!freq_in || !freq_out) {
1883 dev_dbg(component->dev, "PLL disabled\n");
1884
1885 rt5640->pll_in = 0;
1886 rt5640->pll_out = 0;
1887 snd_soc_component_update_bits(component, RT5640_GLB_CLK,
1888 RT5640_SCLK_SRC_MASK, RT5640_SCLK_SRC_MCLK);
1889 return 0;
1890 }
1891
1892 switch (source) {
1893 case RT5640_PLL1_S_MCLK:
1894 snd_soc_component_update_bits(component, RT5640_GLB_CLK,
1895 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_MCLK);
1896 break;
1897 case RT5640_PLL1_S_BCLK1:
1898 snd_soc_component_update_bits(component, RT5640_GLB_CLK,
1899 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK1);
1900 break;
1901 case RT5640_PLL1_S_BCLK2:
1902 snd_soc_component_update_bits(component, RT5640_GLB_CLK,
1903 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK2);
1904 break;
1905 default:
1906 dev_err(component->dev, "Unknown PLL source %d\n", source);
1907 return -EINVAL;
1908 }
1909
1910 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
1911 if (ret < 0) {
1912 dev_err(component->dev, "Unsupport input clock %d\n", freq_in);
1913 return ret;
1914 }
1915
1916 dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
1917 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
1918 pll_code.n_code, pll_code.k_code);
1919
1920 snd_soc_component_write(component, RT5640_PLL_CTRL1,
1921 pll_code.n_code << RT5640_PLL_N_SFT | pll_code.k_code);
1922 snd_soc_component_write(component, RT5640_PLL_CTRL2,
1923 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5640_PLL_M_SFT |
1924 pll_code.m_bp << RT5640_PLL_M_BP_SFT);
1925
1926 rt5640->pll_in = freq_in;
1927 rt5640->pll_out = freq_out;
1928 rt5640->pll_src = source;
1929
1930 return 0;
1931 }
1932
rt5640_set_bias_level(struct snd_soc_component * component,enum snd_soc_bias_level level)1933 static int rt5640_set_bias_level(struct snd_soc_component *component,
1934 enum snd_soc_bias_level level)
1935 {
1936 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);
1937 int ret;
1938
1939 switch (level) {
1940 case SND_SOC_BIAS_ON:
1941 break;
1942
1943 case SND_SOC_BIAS_PREPARE:
1944 /*
1945 * SND_SOC_BIAS_PREPARE is called while preparing for a
1946 * transition to ON or away from ON. If current bias_level
1947 * is SND_SOC_BIAS_ON, then it is preparing for a transition
1948 * away from ON. Disable the clock in that case, otherwise
1949 * enable it.
1950 */
1951 if (IS_ERR(rt5640->mclk))
1952 break;
1953
1954 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_ON) {
1955 clk_disable_unprepare(rt5640->mclk);
1956 } else {
1957 ret = clk_prepare_enable(rt5640->mclk);
1958 if (ret)
1959 return ret;
1960 }
1961 break;
1962
1963 case SND_SOC_BIAS_STANDBY:
1964 if (SND_SOC_BIAS_OFF == snd_soc_component_get_bias_level(component)) {
1965 snd_soc_component_update_bits(component, RT5640_PWR_ANLG1,
1966 RT5640_PWR_VREF1 | RT5640_PWR_MB |
1967 RT5640_PWR_BG | RT5640_PWR_VREF2,
1968 RT5640_PWR_VREF1 | RT5640_PWR_MB |
1969 RT5640_PWR_BG | RT5640_PWR_VREF2);
1970 usleep_range(10000, 15000);
1971 snd_soc_component_update_bits(component, RT5640_PWR_ANLG1,
1972 RT5640_PWR_FV1 | RT5640_PWR_FV2,
1973 RT5640_PWR_FV1 | RT5640_PWR_FV2);
1974 snd_soc_component_update_bits(component, RT5640_DUMMY1,
1975 0x0301, 0x0301);
1976 snd_soc_component_update_bits(component, RT5640_MICBIAS,
1977 0x0030, 0x0030);
1978 }
1979 break;
1980
1981 case SND_SOC_BIAS_OFF:
1982 snd_soc_component_write(component, RT5640_DEPOP_M1, 0x0004);
1983 snd_soc_component_write(component, RT5640_DEPOP_M2, 0x1100);
1984 snd_soc_component_update_bits(component, RT5640_DUMMY1, 0x1, 0);
1985 snd_soc_component_write(component, RT5640_PWR_DIG1, 0x0000);
1986 snd_soc_component_write(component, RT5640_PWR_DIG2, 0x0000);
1987 snd_soc_component_write(component, RT5640_PWR_VOL, 0x0000);
1988 snd_soc_component_write(component, RT5640_PWR_MIXER, 0x0000);
1989 snd_soc_component_write(component, RT5640_PWR_ANLG1, 0x0000);
1990 snd_soc_component_write(component, RT5640_PWR_ANLG2, 0x0000);
1991 break;
1992
1993 default:
1994 break;
1995 }
1996
1997 return 0;
1998 }
1999
rt5640_dmic_enable(struct snd_soc_component * component,bool dmic1_data_pin,bool dmic2_data_pin)2000 int rt5640_dmic_enable(struct snd_soc_component *component,
2001 bool dmic1_data_pin, bool dmic2_data_pin)
2002 {
2003 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);
2004
2005 regmap_update_bits(rt5640->regmap, RT5640_GPIO_CTRL1,
2006 RT5640_GP2_PIN_MASK, RT5640_GP2_PIN_DMIC1_SCL);
2007
2008 if (dmic1_data_pin) {
2009 regmap_update_bits(rt5640->regmap, RT5640_DMIC,
2010 RT5640_DMIC_1_DP_MASK, RT5640_DMIC_1_DP_GPIO3);
2011 regmap_update_bits(rt5640->regmap, RT5640_GPIO_CTRL1,
2012 RT5640_GP3_PIN_MASK, RT5640_GP3_PIN_DMIC1_SDA);
2013 }
2014
2015 if (dmic2_data_pin) {
2016 regmap_update_bits(rt5640->regmap, RT5640_DMIC,
2017 RT5640_DMIC_2_DP_MASK, RT5640_DMIC_2_DP_GPIO4);
2018 regmap_update_bits(rt5640->regmap, RT5640_GPIO_CTRL1,
2019 RT5640_GP4_PIN_MASK, RT5640_GP4_PIN_DMIC2_SDA);
2020 }
2021
2022 return 0;
2023 }
2024 EXPORT_SYMBOL_GPL(rt5640_dmic_enable);
2025
rt5640_sel_asrc_clk_src(struct snd_soc_component * component,unsigned int filter_mask,unsigned int clk_src)2026 int rt5640_sel_asrc_clk_src(struct snd_soc_component *component,
2027 unsigned int filter_mask, unsigned int clk_src)
2028 {
2029 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);
2030 unsigned int asrc2_mask = 0;
2031 unsigned int asrc2_value = 0;
2032
2033 switch (clk_src) {
2034 case RT5640_CLK_SEL_SYS:
2035 case RT5640_CLK_SEL_ASRC:
2036 break;
2037
2038 default:
2039 return -EINVAL;
2040 }
2041
2042 if (!filter_mask)
2043 return -EINVAL;
2044
2045 if (filter_mask & RT5640_DA_STEREO_FILTER) {
2046 asrc2_mask |= RT5640_STO_DAC_M_MASK;
2047 asrc2_value = (asrc2_value & ~RT5640_STO_DAC_M_MASK)
2048 | (clk_src << RT5640_STO_DAC_M_SFT);
2049 }
2050
2051 if (filter_mask & RT5640_DA_MONO_L_FILTER) {
2052 asrc2_mask |= RT5640_MDA_L_M_MASK;
2053 asrc2_value = (asrc2_value & ~RT5640_MDA_L_M_MASK)
2054 | (clk_src << RT5640_MDA_L_M_SFT);
2055 }
2056
2057 if (filter_mask & RT5640_DA_MONO_R_FILTER) {
2058 asrc2_mask |= RT5640_MDA_R_M_MASK;
2059 asrc2_value = (asrc2_value & ~RT5640_MDA_R_M_MASK)
2060 | (clk_src << RT5640_MDA_R_M_SFT);
2061 }
2062
2063 if (filter_mask & RT5640_AD_STEREO_FILTER) {
2064 asrc2_mask |= RT5640_ADC_M_MASK;
2065 asrc2_value = (asrc2_value & ~RT5640_ADC_M_MASK)
2066 | (clk_src << RT5640_ADC_M_SFT);
2067 }
2068
2069 if (filter_mask & RT5640_AD_MONO_L_FILTER) {
2070 asrc2_mask |= RT5640_MAD_L_M_MASK;
2071 asrc2_value = (asrc2_value & ~RT5640_MAD_L_M_MASK)
2072 | (clk_src << RT5640_MAD_L_M_SFT);
2073 }
2074
2075 if (filter_mask & RT5640_AD_MONO_R_FILTER) {
2076 asrc2_mask |= RT5640_MAD_R_M_MASK;
2077 asrc2_value = (asrc2_value & ~RT5640_MAD_R_M_MASK)
2078 | (clk_src << RT5640_MAD_R_M_SFT);
2079 }
2080
2081 snd_soc_component_update_bits(component, RT5640_ASRC_2,
2082 asrc2_mask, asrc2_value);
2083
2084 if (snd_soc_component_read32(component, RT5640_ASRC_2)) {
2085 rt5640->asrc_en = true;
2086 snd_soc_component_update_bits(component, RT5640_JD_CTRL, 0x3, 0x3);
2087 } else {
2088 rt5640->asrc_en = false;
2089 snd_soc_component_update_bits(component, RT5640_JD_CTRL, 0x3, 0x0);
2090 }
2091
2092 return 0;
2093 }
2094 EXPORT_SYMBOL_GPL(rt5640_sel_asrc_clk_src);
2095
rt5640_enable_micbias1_for_ovcd(struct snd_soc_component * component)2096 static void rt5640_enable_micbias1_for_ovcd(struct snd_soc_component *component)
2097 {
2098 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
2099
2100 snd_soc_dapm_mutex_lock(dapm);
2101 snd_soc_dapm_force_enable_pin_unlocked(dapm, "LDO2");
2102 snd_soc_dapm_force_enable_pin_unlocked(dapm, "MICBIAS1");
2103 /* OVCD is unreliable when used with RCCLK as sysclk-source */
2104 snd_soc_dapm_force_enable_pin_unlocked(dapm, "Platform Clock");
2105 snd_soc_dapm_sync_unlocked(dapm);
2106 snd_soc_dapm_mutex_unlock(dapm);
2107 }
2108
rt5640_disable_micbias1_for_ovcd(struct snd_soc_component * component)2109 static void rt5640_disable_micbias1_for_ovcd(struct snd_soc_component *component)
2110 {
2111 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
2112
2113 snd_soc_dapm_mutex_lock(dapm);
2114 snd_soc_dapm_disable_pin_unlocked(dapm, "Platform Clock");
2115 snd_soc_dapm_disable_pin_unlocked(dapm, "MICBIAS1");
2116 snd_soc_dapm_disable_pin_unlocked(dapm, "LDO2");
2117 snd_soc_dapm_sync_unlocked(dapm);
2118 snd_soc_dapm_mutex_unlock(dapm);
2119 }
2120
rt5640_enable_micbias1_ovcd_irq(struct snd_soc_component * component)2121 static void rt5640_enable_micbias1_ovcd_irq(struct snd_soc_component *component)
2122 {
2123 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);
2124
2125 snd_soc_component_update_bits(component, RT5640_IRQ_CTRL2,
2126 RT5640_IRQ_MB1_OC_MASK, RT5640_IRQ_MB1_OC_NOR);
2127 rt5640->ovcd_irq_enabled = true;
2128 }
2129
rt5640_disable_micbias1_ovcd_irq(struct snd_soc_component * component)2130 static void rt5640_disable_micbias1_ovcd_irq(struct snd_soc_component *component)
2131 {
2132 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);
2133
2134 snd_soc_component_update_bits(component, RT5640_IRQ_CTRL2,
2135 RT5640_IRQ_MB1_OC_MASK, RT5640_IRQ_MB1_OC_BP);
2136 rt5640->ovcd_irq_enabled = false;
2137 }
2138
rt5640_clear_micbias1_ovcd(struct snd_soc_component * component)2139 static void rt5640_clear_micbias1_ovcd(struct snd_soc_component *component)
2140 {
2141 snd_soc_component_update_bits(component, RT5640_IRQ_CTRL2,
2142 RT5640_MB1_OC_STATUS, 0);
2143 }
2144
rt5640_micbias1_ovcd(struct snd_soc_component * component)2145 static bool rt5640_micbias1_ovcd(struct snd_soc_component *component)
2146 {
2147 int val;
2148
2149 val = snd_soc_component_read32(component, RT5640_IRQ_CTRL2);
2150 dev_dbg(component->dev, "irq ctrl2 %#04x\n", val);
2151
2152 return (val & RT5640_MB1_OC_STATUS);
2153 }
2154
rt5640_jack_inserted(struct snd_soc_component * component)2155 static bool rt5640_jack_inserted(struct snd_soc_component *component)
2156 {
2157 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);
2158 int val;
2159
2160 val = snd_soc_component_read32(component, RT5640_INT_IRQ_ST);
2161 dev_dbg(component->dev, "irq status %#04x\n", val);
2162
2163 if (rt5640->jd_inverted)
2164 return !(val & RT5640_JD_STATUS);
2165 else
2166 return (val & RT5640_JD_STATUS);
2167 }
2168
2169 /* Jack detect and button-press timings */
2170 #define JACK_SETTLE_TIME 100 /* milli seconds */
2171 #define JACK_DETECT_COUNT 5
2172 #define JACK_DETECT_MAXCOUNT 20 /* Aprox. 2 seconds worth of tries */
2173 #define JACK_UNPLUG_TIME 80 /* milli seconds */
2174 #define BP_POLL_TIME 10 /* milli seconds */
2175 #define BP_POLL_MAXCOUNT 200 /* assume something is wrong after this */
2176 #define BP_THRESHOLD 3
2177
rt5640_start_button_press_work(struct snd_soc_component * component)2178 static void rt5640_start_button_press_work(struct snd_soc_component *component)
2179 {
2180 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);
2181
2182 rt5640->poll_count = 0;
2183 rt5640->press_count = 0;
2184 rt5640->release_count = 0;
2185 rt5640->pressed = false;
2186 rt5640->press_reported = false;
2187 rt5640_clear_micbias1_ovcd(component);
2188 schedule_delayed_work(&rt5640->bp_work, msecs_to_jiffies(BP_POLL_TIME));
2189 }
2190
rt5640_button_press_work(struct work_struct * work)2191 static void rt5640_button_press_work(struct work_struct *work)
2192 {
2193 struct rt5640_priv *rt5640 =
2194 container_of(work, struct rt5640_priv, bp_work.work);
2195 struct snd_soc_component *component = rt5640->component;
2196
2197 /* Check the jack was not removed underneath us */
2198 if (!rt5640_jack_inserted(component))
2199 return;
2200
2201 if (rt5640_micbias1_ovcd(component)) {
2202 rt5640->release_count = 0;
2203 rt5640->press_count++;
2204 /* Remember till after JACK_UNPLUG_TIME wait */
2205 if (rt5640->press_count >= BP_THRESHOLD)
2206 rt5640->pressed = true;
2207 rt5640_clear_micbias1_ovcd(component);
2208 } else {
2209 rt5640->press_count = 0;
2210 rt5640->release_count++;
2211 }
2212
2213 /*
2214 * The pins get temporarily shorted on jack unplug, so we poll for
2215 * at least JACK_UNPLUG_TIME milli-seconds before reporting a press.
2216 */
2217 rt5640->poll_count++;
2218 if (rt5640->poll_count < (JACK_UNPLUG_TIME / BP_POLL_TIME)) {
2219 schedule_delayed_work(&rt5640->bp_work,
2220 msecs_to_jiffies(BP_POLL_TIME));
2221 return;
2222 }
2223
2224 if (rt5640->pressed && !rt5640->press_reported) {
2225 dev_dbg(component->dev, "headset button press\n");
2226 snd_soc_jack_report(rt5640->jack, SND_JACK_BTN_0,
2227 SND_JACK_BTN_0);
2228 rt5640->press_reported = true;
2229 }
2230
2231 if (rt5640->release_count >= BP_THRESHOLD) {
2232 if (rt5640->press_reported) {
2233 dev_dbg(component->dev, "headset button release\n");
2234 snd_soc_jack_report(rt5640->jack, 0, SND_JACK_BTN_0);
2235 }
2236 /* Re-enable OVCD IRQ to detect next press */
2237 rt5640_enable_micbias1_ovcd_irq(component);
2238 return; /* Stop polling */
2239 }
2240
2241 schedule_delayed_work(&rt5640->bp_work, msecs_to_jiffies(BP_POLL_TIME));
2242 }
2243
rt5640_detect_headset(struct snd_soc_component * component)2244 static int rt5640_detect_headset(struct snd_soc_component *component)
2245 {
2246 int i, headset_count = 0, headphone_count = 0;
2247
2248 /*
2249 * We get the insertion event before the jack is fully inserted at which
2250 * point the second ring on a TRRS connector may short the 2nd ring and
2251 * sleeve contacts, also the overcurrent detection is not entirely
2252 * reliable. So we try several times with a wait in between until we
2253 * detect the same type JACK_DETECT_COUNT times in a row.
2254 */
2255 for (i = 0; i < JACK_DETECT_MAXCOUNT; i++) {
2256 /* Clear any previous over-current status flag */
2257 rt5640_clear_micbias1_ovcd(component);
2258
2259 msleep(JACK_SETTLE_TIME);
2260
2261 /* Check the jack is still connected before checking ovcd */
2262 if (!rt5640_jack_inserted(component))
2263 return 0;
2264
2265 if (rt5640_micbias1_ovcd(component)) {
2266 /*
2267 * Over current detected, there is a short between the
2268 * 2nd ring contact and the ground, so a TRS connector
2269 * without a mic contact and thus plain headphones.
2270 */
2271 dev_dbg(component->dev, "jack mic-gnd shorted\n");
2272 headset_count = 0;
2273 headphone_count++;
2274 if (headphone_count == JACK_DETECT_COUNT)
2275 return SND_JACK_HEADPHONE;
2276 } else {
2277 dev_dbg(component->dev, "jack mic-gnd open\n");
2278 headphone_count = 0;
2279 headset_count++;
2280 if (headset_count == JACK_DETECT_COUNT)
2281 return SND_JACK_HEADSET;
2282 }
2283 }
2284
2285 dev_err(component->dev, "Error detecting headset vs headphones, bad contact?, assuming headphones\n");
2286 return SND_JACK_HEADPHONE;
2287 }
2288
rt5640_jack_work(struct work_struct * work)2289 static void rt5640_jack_work(struct work_struct *work)
2290 {
2291 struct rt5640_priv *rt5640 =
2292 container_of(work, struct rt5640_priv, jack_work);
2293 struct snd_soc_component *component = rt5640->component;
2294 int status;
2295
2296 if (!rt5640_jack_inserted(component)) {
2297 /* Jack removed, or spurious IRQ? */
2298 if (rt5640->jack->status & SND_JACK_HEADPHONE) {
2299 if (rt5640->jack->status & SND_JACK_MICROPHONE) {
2300 cancel_delayed_work_sync(&rt5640->bp_work);
2301 rt5640_disable_micbias1_ovcd_irq(component);
2302 rt5640_disable_micbias1_for_ovcd(component);
2303 }
2304 snd_soc_jack_report(rt5640->jack, 0,
2305 SND_JACK_HEADSET | SND_JACK_BTN_0);
2306 dev_dbg(component->dev, "jack unplugged\n");
2307 }
2308 } else if (!(rt5640->jack->status & SND_JACK_HEADPHONE)) {
2309 /* Jack inserted */
2310 WARN_ON(rt5640->ovcd_irq_enabled);
2311 rt5640_enable_micbias1_for_ovcd(component);
2312 status = rt5640_detect_headset(component);
2313 if (status == SND_JACK_HEADSET) {
2314 /* Enable ovcd IRQ for button press detect. */
2315 rt5640_enable_micbias1_ovcd_irq(component);
2316 } else {
2317 /* No more need for overcurrent detect. */
2318 rt5640_disable_micbias1_for_ovcd(component);
2319 }
2320 dev_dbg(component->dev, "detect status %#02x\n", status);
2321 snd_soc_jack_report(rt5640->jack, status, SND_JACK_HEADSET);
2322 } else if (rt5640->ovcd_irq_enabled && rt5640_micbias1_ovcd(component)) {
2323 dev_dbg(component->dev, "OVCD IRQ\n");
2324
2325 /*
2326 * The ovcd IRQ keeps firing while the button is pressed, so
2327 * we disable it and start polling the button until released.
2328 *
2329 * The disable will make the IRQ pin 0 again and since we get
2330 * IRQs on both edges (so as to detect both jack plugin and
2331 * unplug) this means we will immediately get another IRQ.
2332 * The ovcd_irq_enabled check above makes the 2ND IRQ a NOP.
2333 */
2334 rt5640_disable_micbias1_ovcd_irq(component);
2335 rt5640_start_button_press_work(component);
2336
2337 /*
2338 * If the jack-detect IRQ flag goes high (unplug) after our
2339 * above rt5640_jack_inserted() check and before we have
2340 * disabled the OVCD IRQ, the IRQ pin will stay high and as
2341 * we react to edges, we miss the unplug event -> recheck.
2342 */
2343 queue_work(system_long_wq, &rt5640->jack_work);
2344 }
2345 }
2346
rt5640_irq(int irq,void * data)2347 static irqreturn_t rt5640_irq(int irq, void *data)
2348 {
2349 struct rt5640_priv *rt5640 = data;
2350
2351 if (rt5640->jack)
2352 queue_work(system_long_wq, &rt5640->jack_work);
2353
2354 return IRQ_HANDLED;
2355 }
2356
rt5640_cancel_work(void * data)2357 static void rt5640_cancel_work(void *data)
2358 {
2359 struct rt5640_priv *rt5640 = data;
2360
2361 cancel_work_sync(&rt5640->jack_work);
2362 cancel_delayed_work_sync(&rt5640->bp_work);
2363 }
2364
rt5640_enable_jack_detect(struct snd_soc_component * component,struct snd_soc_jack * jack)2365 static void rt5640_enable_jack_detect(struct snd_soc_component *component,
2366 struct snd_soc_jack *jack)
2367 {
2368 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);
2369
2370 /* Select JD-source */
2371 snd_soc_component_update_bits(component, RT5640_JD_CTRL,
2372 RT5640_JD_MASK, rt5640->jd_src);
2373
2374 /* Selecting GPIO01 as an interrupt */
2375 snd_soc_component_update_bits(component, RT5640_GPIO_CTRL1,
2376 RT5640_GP1_PIN_MASK, RT5640_GP1_PIN_IRQ);
2377
2378 /* Set GPIO1 output */
2379 snd_soc_component_update_bits(component, RT5640_GPIO_CTRL3,
2380 RT5640_GP1_PF_MASK, RT5640_GP1_PF_OUT);
2381
2382 /* Enabling jd2 in general control 1 */
2383 snd_soc_component_write(component, RT5640_DUMMY1, 0x3f41);
2384
2385 /* Enabling jd2 in general control 2 */
2386 snd_soc_component_write(component, RT5640_DUMMY2, 0x4001);
2387
2388 snd_soc_component_write(component, RT5640_PR_BASE + RT5640_BIAS_CUR4,
2389 0xa800 | rt5640->ovcd_sf);
2390
2391 snd_soc_component_update_bits(component, RT5640_MICBIAS,
2392 RT5640_MIC1_OVTH_MASK | RT5640_MIC1_OVCD_MASK,
2393 rt5640->ovcd_th | RT5640_MIC1_OVCD_EN);
2394
2395 /*
2396 * The over-current-detect is only reliable in detecting the absence
2397 * of over-current, when the mic-contact in the jack is short-circuited,
2398 * the hardware periodically retries if it can apply the bias-current
2399 * leading to the ovcd status flip-flopping 1-0-1 with it being 0 about
2400 * 10% of the time, as we poll the ovcd status bit we might hit that
2401 * 10%, so we enable sticky mode and when checking OVCD we clear the
2402 * status, msleep() a bit and then check to get a reliable reading.
2403 */
2404 snd_soc_component_update_bits(component, RT5640_IRQ_CTRL2,
2405 RT5640_MB1_OC_STKY_MASK, RT5640_MB1_OC_STKY_EN);
2406
2407 /*
2408 * All IRQs get or-ed together, so we need the jack IRQ to report 0
2409 * when a jack is inserted so that the OVCD IRQ then toggles the IRQ
2410 * pin 0/1 instead of it being stuck to 1. So we invert the JD polarity
2411 * on systems where the hardware does not already do this.
2412 */
2413 if (rt5640->jd_inverted)
2414 snd_soc_component_write(component, RT5640_IRQ_CTRL1,
2415 RT5640_IRQ_JD_NOR);
2416 else
2417 snd_soc_component_write(component, RT5640_IRQ_CTRL1,
2418 RT5640_IRQ_JD_NOR | RT5640_JD_P_INV);
2419
2420 rt5640->jack = jack;
2421 if (rt5640->jack->status & SND_JACK_MICROPHONE) {
2422 rt5640_enable_micbias1_for_ovcd(component);
2423 rt5640_enable_micbias1_ovcd_irq(component);
2424 }
2425
2426 enable_irq(rt5640->irq);
2427 /* sync initial jack state */
2428 queue_work(system_long_wq, &rt5640->jack_work);
2429 }
2430
rt5640_disable_jack_detect(struct snd_soc_component * component)2431 static void rt5640_disable_jack_detect(struct snd_soc_component *component)
2432 {
2433 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);
2434
2435 disable_irq(rt5640->irq);
2436 rt5640_cancel_work(rt5640);
2437
2438 if (rt5640->jack->status & SND_JACK_MICROPHONE) {
2439 rt5640_disable_micbias1_ovcd_irq(component);
2440 rt5640_disable_micbias1_for_ovcd(component);
2441 snd_soc_jack_report(rt5640->jack, 0, SND_JACK_BTN_0);
2442 }
2443
2444 rt5640->jack = NULL;
2445 }
2446
rt5640_set_jack(struct snd_soc_component * component,struct snd_soc_jack * jack,void * data)2447 static int rt5640_set_jack(struct snd_soc_component *component,
2448 struct snd_soc_jack *jack, void *data)
2449 {
2450 if (jack)
2451 rt5640_enable_jack_detect(component, jack);
2452 else
2453 rt5640_disable_jack_detect(component);
2454
2455 return 0;
2456 }
2457
rt5640_probe(struct snd_soc_component * component)2458 static int rt5640_probe(struct snd_soc_component *component)
2459 {
2460 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
2461 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);
2462 u32 dmic1_data_pin = 0;
2463 u32 dmic2_data_pin = 0;
2464 bool dmic_en = false;
2465 u32 val;
2466
2467 /* Check if MCLK provided */
2468 rt5640->mclk = devm_clk_get(component->dev, "mclk");
2469 if (PTR_ERR(rt5640->mclk) == -EPROBE_DEFER)
2470 return -EPROBE_DEFER;
2471
2472 rt5640->component = component;
2473
2474 snd_soc_component_force_bias_level(component, SND_SOC_BIAS_OFF);
2475
2476 snd_soc_component_update_bits(component, RT5640_DUMMY1, 0x0301, 0x0301);
2477 snd_soc_component_update_bits(component, RT5640_MICBIAS, 0x0030, 0x0030);
2478 snd_soc_component_update_bits(component, RT5640_DSP_PATH2, 0xfc00, 0x0c00);
2479
2480 switch (snd_soc_component_read32(component, RT5640_RESET) & RT5640_ID_MASK) {
2481 case RT5640_ID_5640:
2482 case RT5640_ID_5642:
2483 snd_soc_add_component_controls(component,
2484 rt5640_specific_snd_controls,
2485 ARRAY_SIZE(rt5640_specific_snd_controls));
2486 snd_soc_dapm_new_controls(dapm,
2487 rt5640_specific_dapm_widgets,
2488 ARRAY_SIZE(rt5640_specific_dapm_widgets));
2489 snd_soc_dapm_add_routes(dapm,
2490 rt5640_specific_dapm_routes,
2491 ARRAY_SIZE(rt5640_specific_dapm_routes));
2492 break;
2493 case RT5640_ID_5639:
2494 snd_soc_dapm_new_controls(dapm,
2495 rt5639_specific_dapm_widgets,
2496 ARRAY_SIZE(rt5639_specific_dapm_widgets));
2497 snd_soc_dapm_add_routes(dapm,
2498 rt5639_specific_dapm_routes,
2499 ARRAY_SIZE(rt5639_specific_dapm_routes));
2500 break;
2501 default:
2502 dev_err(component->dev,
2503 "The driver is for RT5639 RT5640 or RT5642 only\n");
2504 return -ENODEV;
2505 }
2506
2507 /*
2508 * Note on some platforms the platform code may need to add device-props
2509 * rather then relying only on properties set by the firmware.
2510 * Therefor the property parsing MUST be done here, rather then from
2511 * rt5640_i2c_probe(), so that the platform-code can attach extra
2512 * properties before calling snd_soc_register_card().
2513 */
2514 if (device_property_read_bool(component->dev, "realtek,in1-differential"))
2515 snd_soc_component_update_bits(component, RT5640_IN1_IN2,
2516 RT5640_IN_DF1, RT5640_IN_DF1);
2517
2518 if (device_property_read_bool(component->dev, "realtek,in2-differential"))
2519 snd_soc_component_update_bits(component, RT5640_IN3_IN4,
2520 RT5640_IN_DF2, RT5640_IN_DF2);
2521
2522 if (device_property_read_bool(component->dev, "realtek,in3-differential"))
2523 snd_soc_component_update_bits(component, RT5640_IN1_IN2,
2524 RT5640_IN_DF2, RT5640_IN_DF2);
2525
2526 if (device_property_read_u32(component->dev, "realtek,dmic1-data-pin",
2527 &val) == 0 && val) {
2528 dmic1_data_pin = val - 1;
2529 dmic_en = true;
2530 }
2531
2532 if (device_property_read_u32(component->dev, "realtek,dmic2-data-pin",
2533 &val) == 0 && val) {
2534 dmic2_data_pin = val - 1;
2535 dmic_en = true;
2536 }
2537
2538 if (dmic_en)
2539 rt5640_dmic_enable(component, dmic1_data_pin, dmic2_data_pin);
2540
2541 if (device_property_read_u32(component->dev,
2542 "realtek,jack-detect-source", &val) == 0) {
2543 if (val <= RT5640_JD_SRC_GPIO4)
2544 rt5640->jd_src = val << RT5640_JD_SFT;
2545 else
2546 dev_warn(component->dev, "Warning: Invalid jack-detect-source value: %d, leaving jack-detect disabled\n",
2547 val);
2548 }
2549
2550 if (!device_property_read_bool(component->dev, "realtek,jack-detect-not-inverted"))
2551 rt5640->jd_inverted = true;
2552
2553 /*
2554 * Testing on various boards has shown that good defaults for the OVCD
2555 * threshold and scale-factor are 2000µA and 0.75. For an effective
2556 * limit of 1500µA, this seems to be more reliable then 1500µA and 1.0.
2557 */
2558 rt5640->ovcd_th = RT5640_MIC1_OVTH_2000UA;
2559 rt5640->ovcd_sf = RT5640_MIC_OVCD_SF_0P75;
2560
2561 if (device_property_read_u32(component->dev,
2562 "realtek,over-current-threshold-microamp", &val) == 0) {
2563 switch (val) {
2564 case 600:
2565 rt5640->ovcd_th = RT5640_MIC1_OVTH_600UA;
2566 break;
2567 case 1500:
2568 rt5640->ovcd_th = RT5640_MIC1_OVTH_1500UA;
2569 break;
2570 case 2000:
2571 rt5640->ovcd_th = RT5640_MIC1_OVTH_2000UA;
2572 break;
2573 default:
2574 dev_warn(component->dev, "Warning: Invalid over-current-threshold-microamp value: %d, defaulting to 2000uA\n",
2575 val);
2576 }
2577 }
2578
2579 if (device_property_read_u32(component->dev,
2580 "realtek,over-current-scale-factor", &val) == 0) {
2581 if (val <= RT5640_OVCD_SF_1P5)
2582 rt5640->ovcd_sf = val << RT5640_MIC_OVCD_SF_SFT;
2583 else
2584 dev_warn(component->dev, "Warning: Invalid over-current-scale-factor value: %d, defaulting to 0.75\n",
2585 val);
2586 }
2587
2588 return 0;
2589 }
2590
rt5640_remove(struct snd_soc_component * component)2591 static void rt5640_remove(struct snd_soc_component *component)
2592 {
2593 rt5640_reset(component);
2594 }
2595
2596 #ifdef CONFIG_PM
rt5640_suspend(struct snd_soc_component * component)2597 static int rt5640_suspend(struct snd_soc_component *component)
2598 {
2599 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);
2600
2601 snd_soc_component_force_bias_level(component, SND_SOC_BIAS_OFF);
2602 rt5640_reset(component);
2603 regcache_cache_only(rt5640->regmap, true);
2604 regcache_mark_dirty(rt5640->regmap);
2605 if (gpio_is_valid(rt5640->ldo1_en))
2606 gpio_set_value_cansleep(rt5640->ldo1_en, 0);
2607
2608 return 0;
2609 }
2610
rt5640_resume(struct snd_soc_component * component)2611 static int rt5640_resume(struct snd_soc_component *component)
2612 {
2613 struct rt5640_priv *rt5640 = snd_soc_component_get_drvdata(component);
2614
2615 if (gpio_is_valid(rt5640->ldo1_en)) {
2616 gpio_set_value_cansleep(rt5640->ldo1_en, 1);
2617 msleep(400);
2618 }
2619
2620 regcache_cache_only(rt5640->regmap, false);
2621 regcache_sync(rt5640->regmap);
2622
2623 return 0;
2624 }
2625 #else
2626 #define rt5640_suspend NULL
2627 #define rt5640_resume NULL
2628 #endif
2629
2630 #define RT5640_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2631 #define RT5640_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2632 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2633
2634 static const struct snd_soc_dai_ops rt5640_aif_dai_ops = {
2635 .hw_params = rt5640_hw_params,
2636 .set_fmt = rt5640_set_dai_fmt,
2637 .set_sysclk = rt5640_set_dai_sysclk,
2638 .set_pll = rt5640_set_dai_pll,
2639 };
2640
2641 static struct snd_soc_dai_driver rt5640_dai[] = {
2642 {
2643 .name = "rt5640-aif1",
2644 .id = RT5640_AIF1,
2645 .playback = {
2646 .stream_name = "AIF1 Playback",
2647 .channels_min = 1,
2648 .channels_max = 2,
2649 .rates = RT5640_STEREO_RATES,
2650 .formats = RT5640_FORMATS,
2651 },
2652 .capture = {
2653 .stream_name = "AIF1 Capture",
2654 .channels_min = 1,
2655 .channels_max = 2,
2656 .rates = RT5640_STEREO_RATES,
2657 .formats = RT5640_FORMATS,
2658 },
2659 .ops = &rt5640_aif_dai_ops,
2660 },
2661 {
2662 .name = "rt5640-aif2",
2663 .id = RT5640_AIF2,
2664 .playback = {
2665 .stream_name = "AIF2 Playback",
2666 .channels_min = 1,
2667 .channels_max = 2,
2668 .rates = RT5640_STEREO_RATES,
2669 .formats = RT5640_FORMATS,
2670 },
2671 .capture = {
2672 .stream_name = "AIF2 Capture",
2673 .channels_min = 1,
2674 .channels_max = 2,
2675 .rates = RT5640_STEREO_RATES,
2676 .formats = RT5640_FORMATS,
2677 },
2678 .ops = &rt5640_aif_dai_ops,
2679 },
2680 };
2681
2682 static const struct snd_soc_component_driver soc_component_dev_rt5640 = {
2683 .probe = rt5640_probe,
2684 .remove = rt5640_remove,
2685 .suspend = rt5640_suspend,
2686 .resume = rt5640_resume,
2687 .set_bias_level = rt5640_set_bias_level,
2688 .set_jack = rt5640_set_jack,
2689 .controls = rt5640_snd_controls,
2690 .num_controls = ARRAY_SIZE(rt5640_snd_controls),
2691 .dapm_widgets = rt5640_dapm_widgets,
2692 .num_dapm_widgets = ARRAY_SIZE(rt5640_dapm_widgets),
2693 .dapm_routes = rt5640_dapm_routes,
2694 .num_dapm_routes = ARRAY_SIZE(rt5640_dapm_routes),
2695 .use_pmdown_time = 1,
2696 .endianness = 1,
2697 .non_legacy_dai_naming = 1,
2698
2699 };
2700
2701 static const struct regmap_config rt5640_regmap = {
2702 .reg_bits = 8,
2703 .val_bits = 16,
2704 .use_single_read = true,
2705 .use_single_write = true,
2706
2707 .max_register = RT5640_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5640_ranges) *
2708 RT5640_PR_SPACING),
2709 .volatile_reg = rt5640_volatile_register,
2710 .readable_reg = rt5640_readable_register,
2711
2712 .cache_type = REGCACHE_RBTREE,
2713 .reg_defaults = rt5640_reg,
2714 .num_reg_defaults = ARRAY_SIZE(rt5640_reg),
2715 .ranges = rt5640_ranges,
2716 .num_ranges = ARRAY_SIZE(rt5640_ranges),
2717 };
2718
2719 static const struct i2c_device_id rt5640_i2c_id[] = {
2720 { "rt5640", 0 },
2721 { "rt5639", 0 },
2722 { "rt5642", 0 },
2723 { }
2724 };
2725 MODULE_DEVICE_TABLE(i2c, rt5640_i2c_id);
2726
2727 #if defined(CONFIG_OF)
2728 static const struct of_device_id rt5640_of_match[] = {
2729 { .compatible = "realtek,rt5639", },
2730 { .compatible = "realtek,rt5640", },
2731 {},
2732 };
2733 MODULE_DEVICE_TABLE(of, rt5640_of_match);
2734 #endif
2735
2736 #ifdef CONFIG_ACPI
2737 static const struct acpi_device_id rt5640_acpi_match[] = {
2738 { "INT33CA", 0 },
2739 { "10EC3276", 0 },
2740 { "10EC5640", 0 },
2741 { "10EC5642", 0 },
2742 { "INTCCFFD", 0 },
2743 { },
2744 };
2745 MODULE_DEVICE_TABLE(acpi, rt5640_acpi_match);
2746 #endif
2747
rt5640_parse_dt(struct rt5640_priv * rt5640,struct device_node * np)2748 static int rt5640_parse_dt(struct rt5640_priv *rt5640, struct device_node *np)
2749 {
2750 rt5640->ldo1_en = of_get_named_gpio(np, "realtek,ldo1-en-gpios", 0);
2751 /*
2752 * LDO1_EN is optional (it may be statically tied on the board).
2753 * -ENOENT means that the property doesn't exist, i.e. there is no
2754 * GPIO, so is not an error. Any other error code means the property
2755 * exists, but could not be parsed.
2756 */
2757 if (!gpio_is_valid(rt5640->ldo1_en) &&
2758 (rt5640->ldo1_en != -ENOENT))
2759 return rt5640->ldo1_en;
2760
2761 return 0;
2762 }
2763
rt5640_i2c_probe(struct i2c_client * i2c,const struct i2c_device_id * id)2764 static int rt5640_i2c_probe(struct i2c_client *i2c,
2765 const struct i2c_device_id *id)
2766 {
2767 struct rt5640_priv *rt5640;
2768 int ret;
2769 unsigned int val;
2770
2771 rt5640 = devm_kzalloc(&i2c->dev,
2772 sizeof(struct rt5640_priv),
2773 GFP_KERNEL);
2774 if (NULL == rt5640)
2775 return -ENOMEM;
2776 i2c_set_clientdata(i2c, rt5640);
2777
2778 if (i2c->dev.of_node) {
2779 ret = rt5640_parse_dt(rt5640, i2c->dev.of_node);
2780 if (ret)
2781 return ret;
2782 } else
2783 rt5640->ldo1_en = -EINVAL;
2784
2785 rt5640->regmap = devm_regmap_init_i2c(i2c, &rt5640_regmap);
2786 if (IS_ERR(rt5640->regmap)) {
2787 ret = PTR_ERR(rt5640->regmap);
2788 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2789 ret);
2790 return ret;
2791 }
2792
2793 if (gpio_is_valid(rt5640->ldo1_en)) {
2794 ret = devm_gpio_request_one(&i2c->dev, rt5640->ldo1_en,
2795 GPIOF_OUT_INIT_HIGH,
2796 "RT5640 LDO1_EN");
2797 if (ret < 0) {
2798 dev_err(&i2c->dev, "Failed to request LDO1_EN %d: %d\n",
2799 rt5640->ldo1_en, ret);
2800 return ret;
2801 }
2802 msleep(400);
2803 }
2804
2805 regmap_read(rt5640->regmap, RT5640_VENDOR_ID2, &val);
2806 if (val != RT5640_DEVICE_ID) {
2807 dev_err(&i2c->dev,
2808 "Device with ID register %#x is not rt5640/39\n", val);
2809 return -ENODEV;
2810 }
2811
2812 regmap_write(rt5640->regmap, RT5640_RESET, 0);
2813
2814 ret = regmap_register_patch(rt5640->regmap, init_list,
2815 ARRAY_SIZE(init_list));
2816 if (ret != 0)
2817 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
2818
2819 regmap_update_bits(rt5640->regmap, RT5640_DUMMY1,
2820 RT5640_MCLK_DET, RT5640_MCLK_DET);
2821
2822 rt5640->hp_mute = true;
2823 rt5640->irq = i2c->irq;
2824 INIT_DELAYED_WORK(&rt5640->bp_work, rt5640_button_press_work);
2825 INIT_WORK(&rt5640->jack_work, rt5640_jack_work);
2826
2827 /* Make sure work is stopped on probe-error / remove */
2828 ret = devm_add_action_or_reset(&i2c->dev, rt5640_cancel_work, rt5640);
2829 if (ret)
2830 return ret;
2831
2832 ret = devm_request_irq(&i2c->dev, rt5640->irq, rt5640_irq,
2833 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
2834 | IRQF_ONESHOT, "rt5640", rt5640);
2835 if (ret == 0) {
2836 /* Gets re-enabled by rt5640_set_jack() */
2837 disable_irq(rt5640->irq);
2838 } else {
2839 dev_warn(&i2c->dev, "Failed to reguest IRQ %d: %d\n",
2840 rt5640->irq, ret);
2841 rt5640->irq = -ENXIO;
2842 }
2843
2844 return devm_snd_soc_register_component(&i2c->dev,
2845 &soc_component_dev_rt5640,
2846 rt5640_dai, ARRAY_SIZE(rt5640_dai));
2847 }
2848
2849 static struct i2c_driver rt5640_i2c_driver = {
2850 .driver = {
2851 .name = "rt5640",
2852 .acpi_match_table = ACPI_PTR(rt5640_acpi_match),
2853 .of_match_table = of_match_ptr(rt5640_of_match),
2854 },
2855 .probe = rt5640_i2c_probe,
2856 .id_table = rt5640_i2c_id,
2857 };
2858 module_i2c_driver(rt5640_i2c_driver);
2859
2860 MODULE_DESCRIPTION("ASoC RT5640/RT5639 driver");
2861 MODULE_AUTHOR("Johnny Hsu <johnnyhsu@realtek.com>");
2862 MODULE_LICENSE("GPL v2");
2863