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/arch/powerpc/kernel/
Dfpu.S27 #define __REST_1FPVSR(n,c,base) \ argument
36 #define __REST_32FPVSRS(n,c,base) \ argument
45 #define __SAVE_32FPVSRS(n,c,base) \ argument
54 #define __REST_1FPVSR(n,b,base) REST_FPR(n, base) argument
55 #define __REST_32FPVSRS(n,b,base) REST_32FPRS(n, base) argument
56 #define __SAVE_32FPVSRS(n,b,base) SAVE_32FPRS(n, base) argument
58 #define REST_1FPVSR(n,c,base) __REST_1FPVSR(n,__REG_##c,__REG_##base) argument
59 #define REST_32FPVSRS(n,c,base) __REST_32FPVSRS(n,__REG_##c,__REG_##base) argument
60 #define SAVE_32FPVSRS(n,c,base) __SAVE_32FPVSRS(n,__REG_##c,__REG_##base) argument
Dtm.S20 #define __SAVE_32FPRS_VSRS(n,c,base) \ argument
28 #define __REST_32FPRS_VSRS(n,c,base) \ argument
37 #define __SAVE_32FPRS_VSRS(n,c,base) SAVE_32FPRS(n, base) argument
38 #define __REST_32FPRS_VSRS(n,c,base) REST_32FPRS(n, base) argument
40 #define SAVE_32FPRS_VSRS(n,c,base) \ argument
42 #define REST_32FPRS_VSRS(n,c,base) \ argument
/arch/powerpc/boot/
Dcrt0.S229 #define SAVE_GPR(n, base) std n,8*(n)(base) argument
230 #define REST_GPR(n, base) ld n,8*(n)(base) argument
231 #define SAVE_2GPRS(n, base) SAVE_GPR(n, base); SAVE_GPR(n+1, base) argument
232 #define SAVE_4GPRS(n, base) SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base) argument
233 #define SAVE_8GPRS(n, base) SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base) argument
234 #define SAVE_10GPRS(n, base) SAVE_8GPRS(n, base); SAVE_2GPRS(n+8, base) argument
235 #define REST_2GPRS(n, base) REST_GPR(n, base); REST_GPR(n+1, base) argument
236 #define REST_4GPRS(n, base) REST_2GPRS(n, base); REST_2GPRS(n+2, base) argument
237 #define REST_8GPRS(n, base) REST_4GPRS(n, base); REST_4GPRS(n+4, base) argument
238 #define REST_10GPRS(n, base) REST_8GPRS(n, base); REST_2GPRS(n+8, base) argument
/arch/mips/include/asm/netlogic/
Dhaldefs.h46 nlm_read_reg(uint64_t base, uint32_t reg) in nlm_read_reg()
54 nlm_write_reg(uint64_t base, uint32_t reg, uint32_t val) in nlm_write_reg()
71 nlm_read_reg64(uint64_t base, uint32_t reg) in nlm_read_reg64()
98 nlm_write_reg64(uint64_t base, uint32_t reg, uint64_t val) in nlm_write_reg64()
129 nlm_read_reg_xkphys(uint64_t base, uint32_t reg) in nlm_read_reg_xkphys()
135 nlm_write_reg_xkphys(uint64_t base, uint32_t reg, uint32_t val) in nlm_write_reg_xkphys()
141 nlm_read_reg64_xkphys(uint64_t base, uint32_t reg) in nlm_read_reg64_xkphys()
147 nlm_write_reg64_xkphys(uint64_t base, uint32_t reg, uint64_t val) in nlm_write_reg64_xkphys()
/arch/powerpc/net/
Dbpf_jit32.h75 #define PPC_LBZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LBZ(r, base, i); \ argument
79 #define PPC_LD_OFFS(r, base, i) do { if ((i) < 32768) PPC_LD(r, base, i); \ argument
83 #define PPC_LWZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LWZ(r, base, i); \ argument
87 #define PPC_LHZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LHZ(r, base, i); \ argument
92 #define PPC_LL_OFFS(r, base, i) do { PPC_LD_OFFS(r, base, i); } while(0) argument
94 #define PPC_LL_OFFS(r, base, i) do { PPC_LWZ_OFFS(r, base, i); } while(0) argument
113 #define PPC_LHBRX_OFFS(r, base, i) \ argument
116 #define PPC_NTOHS_OFFS(r, base, i) PPC_LHBRX_OFFS(r, base, i) argument
118 #define PPC_NTOHS_OFFS(r, base, i) PPC_LHZ_OFFS(r, base, i) argument
121 #define PPC_BPF_LL(r, base, i) do { PPC_LWZ(r, base, i); } while(0) argument
[all …]
/arch/arm/mm/
Dcache-l2x0.c65 static void l2c_write_sec(unsigned long val, void __iomem *base, unsigned reg) in l2c_write_sec()
80 static inline void l2c_set_debug(void __iomem *base, unsigned long val) in l2c_set_debug()
91 static inline void l2c_unlock(void __iomem *base, unsigned num) in l2c_unlock()
103 static void l2c_configure(void __iomem *base) in l2c_configure()
112 static void l2c_enable(void __iomem *base, unsigned num_lock) in l2c_enable()
134 void __iomem *base = l2x0_base; in l2c_disable() local
143 static void l2c_save(void __iomem *base) in l2c_save()
150 void __iomem *base = l2x0_base; in l2c_resume() local
173 static void __l2c210_cache_sync(void __iomem *base) in __l2c210_cache_sync()
189 void __iomem *base = l2x0_base; in l2c210_inv_range() local
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/arch/mips/ath25/
Dearly_printk.c18 static inline void prom_uart_wr(void __iomem *base, unsigned reg, in prom_uart_wr()
24 static inline unsigned char prom_uart_rr(void __iomem *base, unsigned reg) in prom_uart_rr()
31 static void __iomem *base; in prom_putchar() local
/arch/arm/plat-orion/
Dpcie.c55 u32 orion_pcie_dev_id(void __iomem *base) in orion_pcie_dev_id()
60 u32 orion_pcie_rev(void __iomem *base) in orion_pcie_rev()
65 int orion_pcie_link_up(void __iomem *base) in orion_pcie_link_up()
70 int __init orion_pcie_x4_mode(void __iomem *base) in orion_pcie_x4_mode()
75 int orion_pcie_get_local_bus_nr(void __iomem *base) in orion_pcie_get_local_bus_nr()
82 void __init orion_pcie_set_local_bus_nr(void __iomem *base, int nr) in orion_pcie_set_local_bus_nr()
92 void __init orion_pcie_reset(void __iomem *base) in orion_pcie_reset()
123 static void __init orion_pcie_setup_wins(void __iomem *base) in orion_pcie_setup_wins()
181 void __init orion_pcie_setup(void __iomem *base) in orion_pcie_setup()
208 int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus, in orion_pcie_rd_conf()
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/arch/mips/include/asm/
Dr4kcache.h197 #define cache16_unroll32(base,op) \ argument
223 #define cache32_unroll32(base,op) \ argument
249 #define cache64_unroll32(base,op) \ argument
275 #define cache128_unroll32(base,op) \ argument
307 #define cache16_unroll32(base,op) \ argument
335 #define cache32_unroll32(base,op) \ argument
365 #define cache64_unroll32(base,op) \ argument
399 #define cache128_unroll32(base,op) \ argument
448 #define cache16_unroll32_user(base,op) \ argument
475 #define cache32_unroll32_user(base, op) \ argument
[all …]
Ddiv64.h20 #define do_div64_32(res, high, low, base) ({ \ argument
59 #define __div64_32(n, base) ({ \ argument
/arch/mips/alchemy/common/
Dusb.c98 static inline void __au1300_usb_phyctl(void __iomem *base, int enable) in __au1300_usb_phyctl()
123 static inline void __au1300_ohci_control(void __iomem *base, int enable, int id) in __au1300_ohci_control()
163 static inline void __au1300_ehci_control(void __iomem *base, int enable) in __au1300_ehci_control()
204 static inline void __au1300_udc_control(void __iomem *base, int enable) in __au1300_udc_control()
235 static inline void __au1300_otg_control(void __iomem *base, int enable) in __au1300_otg_control()
267 void __iomem *base = in au1300_usb_control() local
295 void __iomem *base = in au1300_usb_init() local
316 static inline void __au1200_ohci_control(void __iomem *base, int enable) in __au1200_ohci_control()
330 static inline void __au1200_ehci_control(void __iomem *base, int enable) in __au1200_ehci_control()
346 static inline void __au1200_udc_control(void __iomem *base, int enable) in __au1200_udc_control()
[all …]
Dirq.c291 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR); in au1x_ic0_unmask() local
301 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR); in au1x_ic1_unmask() local
311 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR); in au1x_ic0_mask() local
321 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR); in au1x_ic1_mask() local
331 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR); in au1x_ic0_ack() local
345 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR); in au1x_ic1_ack() local
359 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR); in au1x_ic0_maskack() local
371 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR); in au1x_ic1_maskack() local
432 void __iomem *base; in au1x_ic_settype() local
715 static inline void ic_init(void __iomem *base) in ic_init()
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/arch/arm/mach-mmp/
Ddevices.c80 static unsigned int u2o_get(void __iomem *base, unsigned int offset) in u2o_get()
85 static void u2o_set(void __iomem *base, unsigned int offset, in u2o_set()
96 static void u2o_clear(void __iomem *base, unsigned int offset, in u2o_clear()
107 static void u2o_write(void __iomem *base, unsigned int offset, in u2o_write()
118 static int usb_phy_init_internal(void __iomem *base) in usb_phy_init_internal()
199 static int usb_phy_deinit_internal(void __iomem *base) in usb_phy_deinit_internal()
/arch/mips/loongson64/common/
Dearly_printk.c13 #define PORT(base, offset) (u8 *)(base + offset) argument
15 static inline unsigned int serial_in(unsigned char *base, int offset) in serial_in()
20 static inline void serial_out(unsigned char *base, int offset, int value) in serial_out()
/arch/mips/kernel/
Dmodule.c45 u32 base, Elf_Addr v, bool rela) in apply_r_mips_none()
51 u32 base, Elf_Addr v, bool rela) in apply_r_mips_32()
59 u32 base, Elf_Addr v, bool rela) in apply_r_mips_26()
80 u32 base, Elf_Addr v, bool rela) in apply_r_mips_hi16()
119 u32 base, Elf_Addr v, bool rela) in apply_r_mips_lo16()
190 static int apply_r_mips_pc(struct module *me, u32 *location, u32 base, in apply_r_mips_pc()
222 u32 base, Elf_Addr v, bool rela) in apply_r_mips_pc16()
228 u32 base, Elf_Addr v, bool rela) in apply_r_mips_pc21()
234 u32 base, Elf_Addr v, bool rela) in apply_r_mips_pc26()
240 u32 base, Elf_Addr v, bool rela) in apply_r_mips_64()
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/arch/x86/kernel/cpu/mtrr/
Damd.c10 amd_get_mtrr(unsigned int reg, unsigned long *base, in amd_get_mtrr()
60 amd_set_mtrr(unsigned int reg, unsigned long base, unsigned long size, mtrr_type type) in amd_set_mtrr()
96 amd_validate_add_page(unsigned long base, unsigned long size, unsigned int type) in amd_validate_add_page()
Dcentaur.c27 centaur_get_free_region(unsigned long base, unsigned long size, int replace_reg) in centaur_get_free_region()
58 centaur_get_mcr(unsigned int reg, unsigned long *base, in centaur_get_mcr()
74 centaur_set_mcr(unsigned int reg, unsigned long base, in centaur_set_mcr()
100 centaur_validate_add_page(unsigned long base, unsigned long size, unsigned int type) in centaur_validate_add_page()
/arch/arm/mach-rpc/
Dirq.c24 static void iomd_set_base_mask(unsigned int irq, void __iomem *base, u32 mask) in iomd_set_base_mask()
34 void __iomem *base = iomd_get_base(d); in iomd_irq_mask_ack() local
44 void __iomem *base = iomd_get_base(d); in iomd_irq_mask() local
53 void __iomem *base = iomd_get_base(d); in iomd_irq_unmask() local
/arch/x86/include/asm/
Dmtrr.h62 static inline int mtrr_add(unsigned long base, unsigned long size, in mtrr_add()
67 static inline int mtrr_add_page(unsigned long base, unsigned long size, in mtrr_add_page()
72 static inline int mtrr_del(int reg, unsigned long base, unsigned long size) in mtrr_del()
76 static inline int mtrr_del_page(int reg, unsigned long base, unsigned long size) in mtrr_del_page()
102 compat_ulong_t base; /* Base address */ member
109 compat_uint_t base; /* Base address */ member
/arch/arm/kernel/
Dhead-nommu.S228 .macro set_region_nr tmp, rgnr, base
233 .macro setup_region bar, acr, sr, unused, base
/arch/arm/mach-ebsa110/include/mach/
Duncompress.h17 unsigned char v, *base = SERIAL_BASE; in putc() local
29 unsigned char v, *base = SERIAL_BASE; in flush() local
/arch/alpha/kernel/
Dpc873xx.c13 static unsigned int base, model; variable
26 static unsigned char __init pc873xx_read(unsigned int base, int reg) in pc873xx_read()
32 static void __init pc873xx_write(unsigned int base, int reg, unsigned char data) in pc873xx_write()
/arch/arm/mach-aspeed/
Dplatsmp.c17 void __iomem *base; in aspeed_g6_boot_secondary() local
38 void __iomem *base; in aspeed_g6_smp_prepare_cpus() local
/arch/mips/ath79/
Dearly_printk.c36 void __iomem *base = (void __iomem *)(KSEG1ADDR(AR71XX_UART_BASE)); in prom_putchar_ar71xx() local
45 void __iomem *base = (void __iomem *)(KSEG1ADDR(AR933X_UART_BASE)); in prom_putchar_ar933x() local
102 void __iomem *base; in prom_putchar_init() local
/arch/x86/mm/
Diomap_32.c11 static int is_io_mapping_possible(resource_size_t base, unsigned long size) in is_io_mapping_possible()
21 int iomap_create_wc(resource_size_t base, unsigned long size, pgprot_t *prot) in iomap_create_wc()
41 void iomap_free(resource_size_t base, unsigned long size) in iomap_free()

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