/arch/sh/kernel/cpu/sh3/ |
D | probe.c | 18 unsigned long addr0, addr1, data0, data1, data2, data3; in cpu_probe() local 27 addr1 = CACHE_OC_ADDRESS_ARRAY + (1 << 12); in cpu_probe() 32 data1 = __raw_readl(addr1); in cpu_probe() 33 __raw_writel(data1&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr1); in cpu_probe() 39 data1 = __raw_readl(addr1); in cpu_probe() 41 __raw_writel(data2, addr1); in cpu_probe() 46 __raw_writel(data2&~SH_CACHE_VALID, addr1); in cpu_probe()
|
/arch/xtensa/kernel/ |
D | smp.c | 467 unsigned long addr1; member 494 local_flush_tlb_page(fd->vma, fd->addr1); in ipi_flush_tlb_page() 501 .addr1 = addr, in flush_tlb_page() 509 local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2); in ipi_flush_tlb_range() 517 .addr1 = start, in flush_tlb_range() 526 local_flush_tlb_kernel_range(fd->addr1, fd->addr2); in ipi_flush_tlb_kernel_range() 532 .addr1 = start, in flush_tlb_kernel_range() 553 local_flush_cache_page(fd->vma, fd->addr1, fd->addr2); in ipi_flush_cache_page() 561 .addr1 = address, in flush_cache_page() 570 local_flush_cache_range(fd->vma, fd->addr1, fd->addr2); in ipi_flush_cache_range() [all …]
|
/arch/sh/mm/ |
D | tlb-debugfs.c | 42 unsigned long addr1, addr2, data1, data2; in tlb_seq_show() local 55 addr1 = MMU_ITLB_ADDRESS_ARRAY; in tlb_seq_show() 61 addr1 = MMU_UTLB_ADDRESS_ARRAY; in tlb_seq_show() 78 addr1 = MMU_ITLB_ADDRESS_ARRAY; in tlb_seq_show() 84 addr1 = MMU_UTLB_ADDRESS_ARRAY; in tlb_seq_show() 100 val = __raw_readl(addr1 | (entry << MMU_TLB_ENTRY_SHIFT)); in tlb_seq_show()
|
D | cache-sh4.c | 47 start = data->addr1; in sh4_flush_icache_range() 218 address = data->addr1 & PAGE_MASK; in sh4_flush_cache_page() 283 start = data->addr1; in sh4_flush_cache_range()
|
D | cache-sh5.c | 532 start = data->addr1; in sh5_flush_cache_range() 555 eaddr = data->addr1; in sh5_flush_cache_page() 583 start = data->addr1; in sh5_flush_icache_range()
|
D | cache.c | 199 data.addr1 = addr; in flush_cache_page() 211 data.addr1 = start; in flush_cache_range() 229 data.addr1 = start; in flush_icache_range()
|
D | cache-sh7705.c | 72 start = data->addr1; in sh7705_flush_icache_range()
|
D | cache-sh2a.c | 157 start = data->addr1 & ~(L1_CACHE_BYTES-1); in sh2a_flush_icache_range()
|
/arch/sh/kernel/ |
D | smp.c | 379 unsigned long addr1; member 387 local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2); in flush_tlb_range_ipi() 400 fd.addr1 = start; in flush_tlb_range() 417 local_flush_tlb_kernel_range(fd->addr1, fd->addr2); in flush_tlb_kernel_range_ipi() 424 fd.addr1 = start; in flush_tlb_kernel_range() 433 local_flush_tlb_page(fd->vma, fd->addr1); in flush_tlb_page_ipi() 444 fd.addr1 = page; in flush_tlb_page() 459 local_flush_tlb_one(fd->addr1, fd->addr2); in flush_tlb_one_ipi() 466 fd.addr1 = asid; in flush_tlb_one()
|
/arch/csky/abiv1/inc/abi/ |
D | page.h | 8 static inline unsigned long pages_do_alias(unsigned long addr1, in pages_do_alias() argument 11 return (addr1 ^ addr2) & (SHMLBA-1); in pages_do_alias()
|
/arch/mips/kernel/ |
D | smp.c | 555 unsigned long addr1; member 563 local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2); in flush_tlb_range_ipi() 591 .addr1 = start, in flush_tlb_range() 620 local_flush_tlb_kernel_range(fd->addr1, fd->addr2); in flush_tlb_kernel_range_ipi() 626 .addr1 = start, in flush_tlb_kernel_range() 637 local_flush_tlb_page(fd->vma, fd->addr1); in flush_tlb_page_ipi() 659 .addr1 = page, in flush_tlb_page()
|
/arch/s390/boot/ |
D | ipl_report.c | 25 unsigned long addr1, unsigned long size1) in intersects() argument 27 return addr0 + size0 > addr1 && addr1 + size1 > addr0; in intersects()
|
/arch/arc/include/asm/ |
D | cacheflush.h | 101 #define addr_not_cache_congruent(addr1, addr2) \ argument 104 (CACHE_COLOR(addr1) != CACHE_COLOR(addr2)) : 0; \
|
/arch/mips/include/asm/ |
D | page.h | 95 static inline unsigned long pages_do_alias(unsigned long addr1, in pages_do_alias() argument 98 return (addr1 ^ addr2) & shm_align_mask; in pages_do_alias()
|
/arch/sh/include/asm/ |
D | page.h | 56 pages_do_alias(unsigned long addr1, unsigned long addr2) in pages_do_alias() argument 58 return (addr1 ^ addr2) & shm_align_mask; in pages_do_alias()
|
D | cacheflush.h | 55 unsigned long addr1, addr2; member
|
/arch/mips/txx9/generic/ |
D | setup_tx4939.c | 358 void __init tx4939_ethaddr_init(unsigned char *addr0, unsigned char *addr1) in tx4939_ethaddr_init() argument 364 if (addr1 && (pcfg & TX4939_PCFG_ET1MODE)) in tx4939_ethaddr_init() 365 txx9_ethaddr_init(TXX9_IRQ_BASE + TX4939_IR_ETH(1), addr1); in tx4939_ethaddr_init() 369 void __init tx4939_ethaddr_init(unsigned char *addr0, unsigned char *addr1) in tx4939_ethaddr_init() argument
|
D | setup_tx4938.c | 310 void __init tx4938_ethaddr_init(unsigned char *addr0, unsigned char *addr1) in tx4938_ethaddr_init() argument 316 if (addr1 && (pcfg & TX4938_PCFG_ETH1_SEL)) in tx4938_ethaddr_init() 317 txx9_ethaddr_init(TXX9_IRQ_BASE + TX4938_IR_ETH1, addr1); in tx4938_ethaddr_init()
|
/arch/x86/kvm/ |
D | i8259.c | 398 static u32 pic_poll_read(struct kvm_kpic_state *s, u32 addr1) in pic_poll_read() argument 404 if (addr1 >> 7) { in pic_poll_read() 410 if (addr1 >> 7 || ret != 2) in pic_poll_read() 445 static u32 elcr_ioport_read(void *opaque, u32 addr1) in elcr_ioport_read() argument
|
/arch/x86/lib/ |
D | insn-eval.c | 999 short addr1 = 0, addr2 = 0, displacement; in get_eff_addr_modrm_16() local 1022 addr1 = regs_get_register(regs, addr_offset1) & 0xffff; in get_eff_addr_modrm_16() 1028 *eff_addr = addr1 + addr2 + displacement; in get_eff_addr_modrm_16()
|
/arch/mips/include/asm/txx9/ |
D | tx4938.h | 285 void tx4938_ethaddr_init(unsigned char *addr0, unsigned char *addr1);
|
D | tx4939.h | 506 void tx4939_ethaddr_init(unsigned char *addr0, unsigned char *addr1);
|
/arch/x86/kernel/apic/ |
D | x2apic_uv_x.c | 892 unsigned long addr1, addr2; in map_mmioh_high_uv34() local 902 addr1 = (base << shift) + f * (1ULL << m_io); in map_mmioh_high_uv34() 904 …pr_info("UV: %s[%03d..%03d] NASID 0x%04x ADDR 0x%016lx - 0x%016lx\n", id, fi, li, lnasid, addr1, a… in map_mmioh_high_uv34()
|