| /arch/mips/emma/markeins/ |
| D | irq.c | 170 u32 bitmask; in emma2rh_irq_dispatch() local
181 for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) { in emma2rh_irq_dispatch()
182 if (swIntStatus & bitmask) { in emma2rh_irq_dispatch()
192 for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) { in emma2rh_irq_dispatch()
193 if (intStatus & bitmask) { in emma2rh_irq_dispatch()
207 for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) { in emma2rh_irq_dispatch()
208 if (gpioIntStatus & bitmask) { in emma2rh_irq_dispatch()
218 for (i = 32, bitmask = 1; i < 64; i++, bitmask <<= 1) { in emma2rh_irq_dispatch()
219 if (intStatus & bitmask) { in emma2rh_irq_dispatch()
228 for (i = 64, bitmask = 1; i < 96; i++, bitmask <<= 1) { in emma2rh_irq_dispatch()
[all …]
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| /arch/sh/kernel/cpu/irq/ |
| D | intc-sh5.c | 82 unsigned long bitmask; in enable_intc_irq() local
89 bitmask = 1 << irq; in enable_intc_irq()
92 bitmask = 1 << (irq - 32); in enable_intc_irq()
95 __raw_writel(bitmask, reg); in enable_intc_irq()
102 unsigned long bitmask; in disable_intc_irq() local
106 bitmask = 1 << irq; in disable_intc_irq()
109 bitmask = 1 << (irq - 32); in disable_intc_irq()
112 __raw_writel(bitmask, reg); in disable_intc_irq()
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| /arch/openrisc/include/asm/ |
| D | cmpxchg.h | 69 u32 bitmask = ((0x1 << size * BITS_PER_BYTE) - 1) << bitoff; in cmpxchg_small() local
76 ret = (load32 & bitmask) >> bitoff; in cmpxchg_small()
80 old32 = (load32 & ~bitmask) | (old << bitoff); in cmpxchg_small()
81 new32 = (load32 & ~bitmask) | (new << bitoff); in cmpxchg_small()
101 u32 bitmask = ((0x1 << size * BITS_PER_BYTE) - 1) << bitoff; in xchg_small() local
107 ret = (oldv & bitmask) >> bitoff; in xchg_small()
108 newv = (oldv & ~bitmask) | (x << bitoff); in xchg_small()
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| /arch/sh/include/asm/ |
| D | cmpxchg-xchg.h | 27 u32 bitmask = ((0x1 << size * BITS_PER_BYTE) - 1) << bitoff; in __xchg_cmpxchg() local
33 ret = (oldv & bitmask) >> bitoff; in __xchg_cmpxchg()
34 newv = (oldv & ~bitmask) | (x << bitoff); in __xchg_cmpxchg()
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| /arch/mips/pci/ |
| D | msi-octeon.c | 223 u64 bitmask; in arch_teardown_msi_irq() local
248 bitmask = (1 << number_irqs) - 1; in arch_teardown_msi_irq()
250 bitmask <<= irq0; in arch_teardown_msi_irq()
251 if ((msi_free_irq_bitmask[index] & bitmask) != bitmask) in arch_teardown_msi_irq()
257 msi_free_irq_bitmask[index] &= ~bitmask; in arch_teardown_msi_irq()
258 msi_multiple_irq_bitmask[index] &= ~bitmask; in arch_teardown_msi_irq()
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| /arch/xtensa/include/asm/ |
| D | cmpxchg.h | 183 u32 bitmask = ((0x1 << size * BITS_PER_BYTE) - 1) << bitoff; in xchg_small() local
189 ret = (oldv & bitmask) >> bitoff; in xchg_small()
190 newv = (oldv & ~bitmask) | (x << bitoff); in xchg_small()
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| /arch/h8300/kernel/ |
| D | ptrace_h.c | 43 unsigned char bitmask; member
51 .bitmask = msk, \
224 if ((inst & op->bitmask) == op->bitpattern) { in nextpc()
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| /arch/alpha/lib/ |
| D | ev67-strlen.S | 35 cmpbge $31, $1, $2 # E : $2 <- bitmask: bit i == 1 <==> i-th byte == 0
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| D | strlen.S | 30 cmpbge $31, $1, $2 # $2 <- bitmask: bit i == 1 <==> i-th byte == 0
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| D | stxncpy.S | 130 sll t10, t2, t10 # e0 : t10 = bitmask of last count byte
332 negq t8, t6 # .. e1 : build bitmask of bytes <= zero
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| D | ev6-stxncpy.S | 164 sll t10, t2, t10 # U : t10 = bitmask of last count byte
380 negq t8, t6 # E : build bitmask of bytes <= zero
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| D | stxcpy.S | 273 negq t8, t6 # .. e1 : build bitmask of bytes <= zero
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| D | ev6-stxcpy.S | 302 negq t8, t6 # E : build bitmask of bytes <= zero
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| /arch/x86/kvm/ |
| D | pmu.c | 250 u64 bitmask; in kvm_pmu_handle_event() local
253 bitmask = pmu->reprogram_pmi; in kvm_pmu_handle_event()
255 for_each_set_bit(bit, (unsigned long *)&bitmask, X86_PMC_IDX_MAX) { in kvm_pmu_handle_event()
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| /arch/powerpc/kernel/ |
| D | exceptions-64s.S | 408 … name, vec, ool=0, early=0, virt=0, hsrr=0, area=PACA_EXGEN, ri=1, dar=0, dsisr=0, bitmask=0, kvm=0
436 .if \bitmask
438 andi. r10,r10,\bitmask
1259 INT_HANDLER hardware_interrupt, 0x500, hsrr=EXC_HV_OR_STD, bitmask=IRQS_DISABLED, kvm=1
1262 INT_HANDLER hardware_interrupt, 0x500, virt=1, hsrr=EXC_HV_OR_STD, bitmask=IRQS_DISABLED, kvm=1
1365 INT_HANDLER decrementer, 0x900, ool=1, bitmask=IRQS_DISABLED, kvm=1
1368 INT_HANDLER decrementer, 0x900, ool=1, virt=1, bitmask=IRQS_DISABLED
1385 INT_HANDLER doorbell_super, 0xa00, bitmask=IRQS_DISABLED, kvm=1
1388 INT_HANDLER doorbell_super, 0xa00, virt=1, bitmask=IRQS_DISABLED
1618 INT_HANDLER hmi_exception, 0xe60, hsrr=EXC_HV, bitmask=IRQS_DISABLED, kvm=1
[all …]
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| /arch/x86/kvm/vmx/ |
| D | vmx.h | 238 u32 bitmask; /* 4 bits per segment (1 bit per field) */ member
439 vmx->segment_cache.bitmask = 0; in BUILD_CONTROLS_SHADOW()
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| D | vmx.c | 766 vmx->segment_cache.bitmask = 0; in vmx_segment_cache_test_set()
768 ret = vmx->segment_cache.bitmask & mask; in vmx_segment_cache_test_set()
769 vmx->segment_cache.bitmask |= mask; in vmx_segment_cache_test_set()
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| D | nested.c | 2239 vmx->segment_cache.bitmask = 0; in prepare_vmcs02_rare()
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| /arch/mips/include/asm/octeon/ |
| D | cvmx-lmcx-defs.h | 2272 uint64_t bitmask:16; member
2278 uint64_t bitmask:16;
2343 uint64_t bitmask:8; member
2353 uint64_t bitmask:8;
2380 uint64_t bitmask:64; member
2382 uint64_t bitmask:64;
2778 uint64_t bitmask:8; member
2786 uint64_t bitmask:8;
2809 uint64_t bitmask:8; member
2813 uint64_t bitmask:8;
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| /arch/ia64/kernel/ |
| D | unaligned.c | 458 unsigned long bitmask; in setreg() local
498 bitmask = 1UL << (addr >> 3 & 0x3f); in setreg()
501 *unat |= bitmask; in setreg()
503 *unat &= ~bitmask; in setreg()
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| /arch/sh/kernel/cpu/sh3/ |
| D | entry.S | 214 ! r8 passes SR bitmask, overwritten with restored data on return
|