| /arch/sparc/lib/ |
| D | ffs.S | 14 clr %o0
21 clr %o1 /* 2 */
25 1: clr %o2
31 clr %o3
34 clr %o4
40 clr %o5
|
| D | bitops.S | 28 clr %o0
50 clr %o0
72 clr %o0
|
| D | GENbzero.S | 35 clr %o2
122 clr %o3
125 clr %o2
|
| /arch/arm/mach-rpc/ |
| D | irq.c | 75 unsigned int irq, clr, set; in rpc_init_irq() local
86 clr = IRQ_NOREQUEST; in rpc_init_irq()
90 clr |= IRQ_NOPROBE; in rpc_init_irq()
100 irq_modify_status(irq, clr, set); in rpc_init_irq()
108 irq_modify_status(irq, clr, set); in rpc_init_irq()
116 irq_modify_status(irq, clr, set); in rpc_init_irq()
123 irq_modify_status(irq, clr, set); in rpc_init_irq()
|
| /arch/powerpc/include/asm/nohash/32/ |
| D | pgtable.h | 224 unsigned long clr, in pte_update() argument
238 : "r" (p), "r" (clr), "r" (set), "m" (*p) in pte_update()
242 unsigned long new = (old & ~clr) | set; in pte_update()
259 unsigned long clr, in pte_update() argument
275 : "r" (p), "r" ((unsigned long)(p) + 4), "r" (clr), "r" (set), "m" (*p) in pte_update()
279 *p = __pte((old & ~(unsigned long long)clr) | set); in pte_update()
311 unsigned long clr = ~pte_val(pte_wrprotect(__pte(~0))); in ptep_set_wrprotect() local
314 pte_update(ptep, clr, set); in ptep_set_wrprotect()
325 unsigned long clr = ~pte_val(entry) & ~pte_val(pte_clr); in __ptep_set_access_flags() local
327 pte_update(ptep, clr, set); in __ptep_set_access_flags()
|
| /arch/powerpc/include/asm/ |
| D | dcr-native.h | 112 unsigned clr, unsigned set) in __dcri_clrset() argument
120 val = (mfdcrx(base_data) & ~clr) | set; in __dcri_clrset()
124 val = (__mfdcr(base_data) & ~clr) | set; in __dcri_clrset()
138 #define dcri_clrset(base, reg, clr, set) __dcri_clrset(DCRN_ ## base ## _CONFIG_ADDR, \ argument
140 reg, clr, set)
|
| D | code-patching.h | 49 static inline int modify_instruction(unsigned int *addr, unsigned int clr, in modify_instruction() argument
52 return patch_instruction(addr, (*addr & ~clr) | set); in modify_instruction()
55 static inline int modify_instruction_site(s32 *site, unsigned int clr, unsigned int set) in modify_instruction_site() argument
57 return modify_instruction((unsigned int *)patch_site_addr(site), clr, set); in modify_instruction_site()
|
| /arch/m68k/ifpsp060/src/ |
| D | itest.S | 81 clr.l TESTCTR(%a6)
91 clr.l TESTCTR(%a6)
101 clr.l TESTCTR(%a6)
111 clr.l TESTCTR(%a6)
121 clr.l TESTCTR(%a6)
132 clr.l TESTCTR(%a6)
142 clr.l TESTCTR(%a6)
169 clr.l %d1
181 clr.l IREGS+0x8(%a6)
182 clr.l IREGS+0xc(%a6)
[all …]
|
| D | ilsp.S | 298 clr.l %d1
313 clr.w %d5
327 clr.l DDNORMAL(%a6) # count of shifts for normalization
328 clr.b DDSECOND(%a6) # clear flag for quotient digits
329 clr.l %d1 # %d1 will hold trial quotient
362 clr.w %d6 # word u3 left
405 clr.l %d2
408 clr.w %d3 # %d3 now ls word of divisor
412 clr.w %d3 # %d3 now ms word of divisor
421 clr.l %d1
[all …]
|
| D | ftest.S | 98 clr.l TESTCTR(%a6)
108 clr.l TESTCTR(%a6)
118 clr.l TESTCTR(%a6)
126 clr.l TESTCTR(%a6)
150 clr.l TESTCTR(%a6)
176 clr.l TESTCTR(%a6)
184 clr.l TESTCTR(%a6)
192 clr.l TESTCTR(%a6)
200 clr.l TESTCTR(%a6)
208 clr.l TESTCTR(%a6)
[all …]
|
| /arch/powerpc/include/asm/book3s/64/ |
| D | radix.h | 132 static inline unsigned long __radix_pte_update(pte_t *ptep, unsigned long clr, in __radix_pte_update() argument
144 : "r" (ptep), "r" (cpu_to_be64(set)), "r" (cpu_to_be64(clr)) in __radix_pte_update()
152 pte_t *ptep, unsigned long clr, in radix__pte_update() argument
158 old_pte = __radix_pte_update(ptep, clr, set); in radix__pte_update()
250 pmd_t *pmdp, unsigned long clr,
|
| /arch/m68k/math-emu/ |
| D | fp_util.S | 70 2: clr.l %d0
99 clr.l %d1 | sign defaults to zero
109 clr.l (%a0)
116 clr.l (%a0)+
117 clr.l (%a0)+
118 clr.l (%a0)
142 clr.l (%a0) | low lword = 0
|
| /arch/m68k/ifpsp060/ |
| D | os.S | 94 clr.l %d1 | return success
101 clr.l %d1 | return success
127 clr.l %d1 | return success
134 clr.l %d1 | return success
151 clr.l %d0 | clear whole longword
152 clr.l %d1 | assume success
187 clr.l %d1 | assume success
188 clr.l %d0 | clear whole longword
223 clr.l %d1 | assume success
245 clr.l %d1 | assume success
[all …]
|
| /arch/mips/pic32/pic32mzda/ |
| D | config.c | 71 u32 clr, set; in pic32_set_sdhci_adma_fifo_threshold() local
73 clr = (0x3ff << 4) | (0x3ff << 16); in pic32_set_sdhci_adma_fifo_threshold()
75 return pic32_conf_modify_atomic(PIC32_CFGCON2, clr, set); in pic32_set_sdhci_adma_fifo_threshold()
|
| /arch/mips/include/asm/mach-ralink/ |
| D | ralink_regs.h | 45 static inline void rt_sysc_m32(u32 clr, u32 set, unsigned reg) in rt_sysc_m32() argument
47 u32 val = rt_sysc_r32(reg) & ~clr; in rt_sysc_m32()
|
| /arch/mips/include/asm/octeon/ |
| D | cvmx-gpio-defs.h | 296 uint64_t clr:24; member
298 uint64_t clr:24;
305 uint64_t clr:16; member
307 uint64_t clr:16;
314 uint64_t clr:20; member
316 uint64_t clr:20;
|
| D | cvmx-led-defs.h | 193 uint64_t clr:32; member
195 uint64_t clr:32;
|
| /arch/mips/kernel/ |
| D | head.S | 35 .macro setup_c0_status set clr argument
38 or t0, ST0_CU0|\set|0x1f|\clr
39 xor t0, 0x1f|\clr
|
| /arch/sparc/include/asm/ |
| D | ns87303.h | 88 unsigned char clr, unsigned char set) in ns87303_modify() argument
106 value &= ~(reserved[index] | clr); in ns87303_modify()
|
| D | ttable.h | 18 clr %o0; clr %o1; clr %o2; clr %o3; \
19 clr %o4; clr %o5; clr %o6; clr %o7; \
20 clr %l0; clr %l1; clr %l2; clr %l3; \
21 clr %l4; clr %l5; clr %l6; clr %l7; \
|
| D | asmmacro.h | 22 #define RESTORE_ALL b ret_trap_entry; clr %l6;
|
| /arch/arm/mach-s3c24xx/include/mach/ |
| D | hardware.h | 14 extern unsigned int s3c2410_modify_misccr(unsigned int clr, unsigned int chg);
|
| /arch/arm64/kvm/ |
| D | pmu.c | 48 void kvm_clr_pmu_events(u32 clr) in kvm_clr_pmu_events() argument
52 ctx->pmu_events.events_host &= ~clr; in kvm_clr_pmu_events()
53 ctx->pmu_events.events_guest &= ~clr; in kvm_clr_pmu_events()
|
| /arch/alpha/lib/ |
| D | clear_user.S | 63 clr $0 # .. e1 :
95 clr $0 # .. e1 :
|
| /arch/mips/alchemy/devboards/ |
| D | bcsr.c | 73 void bcsr_mod(enum bcsr_id reg, unsigned short clr, unsigned short set) in bcsr_mod() argument
80 r &= ~clr; in bcsr_mod()
|