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Searched refs:clrbits32 (Results 1 – 25 of 27) sorted by relevance

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/arch/powerpc/platforms/4xx/
Dgpio.c75 clrbits32(&regs->or, GPIO_MASK(gpio)); in __ppc4xx_gpio_set()
103 clrbits32(&regs->odr, GPIO_MASK(gpio)); in ppc4xx_gpio_dir_in()
106 clrbits32(&regs->tcr, GPIO_MASK(gpio)); in ppc4xx_gpio_dir_in()
110 clrbits32(&regs->osrl, GPIO_MASK2(gpio)); in ppc4xx_gpio_dir_in()
111 clrbits32(&regs->tsrl, GPIO_MASK2(gpio)); in ppc4xx_gpio_dir_in()
113 clrbits32(&regs->osrh, GPIO_MASK2(gpio)); in ppc4xx_gpio_dir_in()
114 clrbits32(&regs->tsrh, GPIO_MASK2(gpio)); in ppc4xx_gpio_dir_in()
136 clrbits32(&regs->odr, GPIO_MASK(gpio)); in ppc4xx_gpio_dir_out()
143 clrbits32(&regs->osrl, GPIO_MASK2(gpio)); in ppc4xx_gpio_dir_out()
144 clrbits32(&regs->tsrl, GPIO_MASK2(gpio)); in ppc4xx_gpio_dir_out()
[all …]
/arch/powerpc/sysdev/
Dfsl_rcpm.c54 clrbits32(&rcpm_v1_regs->cpmimr, mask); in rcpm_v1_irq_unmask()
55 clrbits32(&rcpm_v1_regs->cpmcimr, mask); in rcpm_v1_irq_unmask()
56 clrbits32(&rcpm_v1_regs->cpmmcmr, mask); in rcpm_v1_irq_unmask()
57 clrbits32(&rcpm_v1_regs->cpmnmimr, mask); in rcpm_v1_irq_unmask()
65 clrbits32(&rcpm_v2_regs->tpmimr0, mask); in rcpm_v2_irq_unmask()
66 clrbits32(&rcpm_v2_regs->tpmcimr0, mask); in rcpm_v2_irq_unmask()
67 clrbits32(&rcpm_v2_regs->tpmmcmr0, mask); in rcpm_v2_irq_unmask()
68 clrbits32(&rcpm_v2_regs->tpmnmimr0, mask); in rcpm_v2_irq_unmask()
76 clrbits32(&rcpm_v1_regs->ippdexpcr, mask); in rcpm_v1_set_ip_power()
84 clrbits32(&rcpm_v2_regs->ippdexpcr[0], mask); in rcpm_v2_set_ip_power()
[all …]
Dcpm2.c340 clrbits32(&iop[port].dir, pin); in cpm2_set_pin()
345 clrbits32(&iop[port].par, pin); in cpm2_set_pin()
350 clrbits32(&iop[port].sor, pin); in cpm2_set_pin()
355 clrbits32(&iop[port].odr, pin); in cpm2_set_pin()
Dcpm_common.c183 clrbits32(&iop->dir, pin_mask); in cpm2_gpio32_dir_in()
Dmpic_timer.c252 clrbits32(&priv->regs[handle->num].gtbcr, TIMER_STOP); in mpic_start_timer()
339 clrbits32(priv->group_tcr, tcr); in mpic_free_timer()
/arch/powerpc/platforms/8xx/
Dmpc885ads_setup.c126 clrbits32(&mpc8xx_immr->im_cpm.cp_cptr, 0x00000180); in init_ioports()
151 clrbits32(&bcsr[1], BCSR1_RS232EN_1); in mpc885ads_setup_arch()
155 clrbits32(&bcsr[1], BCSR1_RS232EN_2); in mpc885ads_setup_arch()
158 clrbits32(bcsr5, BCSR5_MII1_EN); in mpc885ads_setup_arch()
161 clrbits32(bcsr5, BCSR5_MII1_RST); in mpc885ads_setup_arch()
164 clrbits32(bcsr5, BCSR5_MII2_EN); in mpc885ads_setup_arch()
167 clrbits32(bcsr5, BCSR5_MII2_RST); in mpc885ads_setup_arch()
173 clrbits32(&bcsr[4], BCSR4_ETH10_RST); in mpc885ads_setup_arch()
Dmpc86xads_setup.c90 clrbits32(&mpc8xx_immr->im_cpm.cp_cptr, 0x00000180); in init_ioports()
115 clrbits32(bcsr_io, BCSR1_RS232EN_1 | BCSR1_RS232EN_2 | BCSR1_ETHEN); in mpc86xads_setup_arch()
Dcpm1.c63 clrbits32(&cpic_reg->cpic_cimr, (1 << cpm_vec)); in cpm_mask_irq()
325 clrbits32(&iop->dir, pin); in cpm1_set_pin32()
330 clrbits32(&iop->par, pin); in cpm1_set_pin32()
343 clrbits32(&iop->sor, pin); in cpm1_set_pin32()
348 clrbits32(&mpc8xx_immr->im_cpm.cp_peodr, pin); in cpm1_set_pin32()
756 clrbits32(&iop->dir, pin_mask); in cpm1_gpio32_dir_in()
Dadder875.c77 clrbits32(&mpc8xx_immr->im_cpm.cp_cptr, 0x00000180); in init_ioports()
/arch/powerpc/platforms/embedded6xx/
Dwii.c108 clrbits32(hw_gpio + HW_GPIO_OUT(0), in wii_setup_arch()
119 clrbits32(hw_ctrl + HW_CTRL_RESETS, HW_CTRL_RESETS_SYS); in wii_restart()
133 clrbits32(hw_gpio + HW_GPIO_OWNER, HW_GPIO_SHUTDOWN); in wii_power_off()
Dhlwd-pic.c48 clrbits32(io_base + HW_BROADWAY_IMR, mask); in hlwd_pic_mask_and_ack()
65 clrbits32(io_base + HW_BROADWAY_IMR, 1 << irq); in hlwd_pic_mask()
76 clrbits32(io_base + HW_STARLET_IMR, 1 << irq); in hlwd_pic_unmask()
Dflipper-pic.c51 clrbits32(io_base + FLIPPER_IMR, mask); in flipper_pic_mask_and_ack()
70 clrbits32(io_base + FLIPPER_IMR, 1 << irq); in flipper_pic_mask()
/arch/powerpc/platforms/82xx/
Dpq2fads.c140 clrbits32(&bcsr[1], BCSR1_RS232_EN1 | BCSR1_RS232_EN2 | BCSR1_FETHIEN); in pq2fads_setup_arch()
143 clrbits32(&bcsr[3], BCSR3_FETHIEN2); in pq2fads_setup_arch()
151 clrbits32(&cpm2_immr->im_siu_conf.siu_82xx.sc_siumcr, 0x0c000000); in pq2fads_setup_arch()
Dmpc8272_ads.c163 clrbits32(&bcsr[1], BCSR1_RS232_EN1 | BCSR1_RS232_EN2 | BCSR1_FETHIEN); in mpc8272_ads_setup_arch()
166 clrbits32(&bcsr[3], BCSR3_FETHIEN2); in mpc8272_ads_setup_arch()
169 clrbits32(&bcsr[3], BCSR3_USB_nEN); in mpc8272_ads_setup_arch()
Dkm82xx.c158 clrbits32(&cpm2_immr->im_ioport.iop_pdata, 1 << (31 - 11)); in init_ioports()
171 clrbits32(&cpm2_immr->im_siu_conf.siu_82xx.sc_bcr, MPC82XX_BCR_PLDP); in km82xx_setup_arch()
Dpq2ads-pci-pic.c63 clrbits32(&priv->regs->mask, 1 << irq); in pq2ads_pci_unmask_irq()
Dep8248e.c261 clrbits32(&cpm2_immr->im_siu_conf.siu_82xx.sc_bcr, MPC82XX_BCR_PLDP); in ep8248e_setup_arch()
/arch/powerpc/platforms/85xx/
Dmpc85xx_pm_ops.c61 clrbits32(&guts->devdisr, mask); in mpc85xx_freeze_time_base()
Dp1022_rdk.c78 clrbits32(&guts->clkdvdr, in p1022rdk_set_pixel_clock()
Dt1042rdb_diu.c113 clrbits32(scfg + CCSR_SCFG_PIXCLKCR, in t1042rdb_set_pixel_clock()
Dp1022_ds.c408 clrbits32(&guts->clkdvdr, in p1022ds_set_pixel_clock()
/arch/powerpc/platforms/52xx/
Dmpc52xx_gpt.c151 clrbits32(&gpt->regs->mode, MPC52xx_GPT_MODE_IRQ_EN); in mpc52xx_gpt_irq_mask()
307 clrbits32(&gpt->regs->mode, MPC52xx_GPT_MODE_GPIO_MASK); in mpc52xx_gpt_gpio_dir_in()
481 clrbits32(&gpt->regs->mode, MPC52xx_GPT_MODE_COUNTER_ENABLE); in mpc52xx_gpt_stop_timer()
638 clrbits32(&gpt_wdt->regs->mode, in mpc52xx_wdt_release()
Dmpc52xx_common.c323 clrbits32(&simple_gpio->simple_dvo, sync | out); in mpc5200_psc_ac97_gpio_reset()
/arch/powerpc/platforms/86xx/
Dmpc8610_hpcd.c260 clrbits32(&guts->clkdvdr, in mpc8610hpcd_set_pixel_clock()
/arch/powerpc/include/asm/
Dfsl_lbc.h266 clrbits32(upm->mxmr, MxMR_OP_RP); in fsl_upm_end_pattern()

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