| /arch/arm/mach-rpc/include/mach/ |
| D | acornfb.h | 95 case 1: vidc->control |= VIDC20_CTRL_PIX_CK; break; in acornfb_vidc20_find_rates()
96 case 2: vidc->control |= VIDC20_CTRL_PIX_CK2; break; in acornfb_vidc20_find_rates()
97 case 3: vidc->control |= VIDC20_CTRL_PIX_CK3; break; in acornfb_vidc20_find_rates()
98 case 4: vidc->control |= VIDC20_CTRL_PIX_CK4; break; in acornfb_vidc20_find_rates()
99 case 5: vidc->control |= VIDC20_CTRL_PIX_CK5; break; in acornfb_vidc20_find_rates()
100 case 6: vidc->control |= VIDC20_CTRL_PIX_CK6; break; in acornfb_vidc20_find_rates()
101 case 7: vidc->control |= VIDC20_CTRL_PIX_CK7; break; in acornfb_vidc20_find_rates()
102 case 8: vidc->control |= VIDC20_CTRL_PIX_CK8; break; in acornfb_vidc20_find_rates()
115 vidc->control |= VIDC20_CTRL_FIFO_24; in acornfb_vidc20_find_rates()
117 vidc->control |= VIDC20_CTRL_FIFO_28; in acornfb_vidc20_find_rates()
[all …]
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| /arch/arm/boot/dts/ |
| D | keystone-k2hk-clocks.dtsi | 15 reg-names = "control";
23 reg-names = "control", "multiplier", "post-divider";
32 reg-names = "control";
41 reg-names = "control";
50 reg-names = "control";
59 reg-names = "control", "domain";
69 reg-names = "control", "domain";
79 reg-names = "control", "domain";
89 reg-names = "control", "domain";
99 reg-names = "control", "domain";
[all …]
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| D | keystone-k2l-clocks.dtsi | 15 reg-names = "control";
23 reg-names = "control", "multiplier", "post-divider";
32 reg-names = "control";
41 reg-names = "control";
49 reg-names = "control", "domain";
60 reg-names = "control", "domain";
70 reg-names = "control", "domain";
80 reg-names = "control", "domain";
90 reg-names = "control", "domain";
100 reg-names = "control", "domain";
[all …]
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| D | keystone-k2e-clocks.dtsi | 14 reg-names = "control", "multiplier", "post-divider";
23 reg-names = "control";
32 reg-names = "control";
41 reg-names = "control", "domain";
51 reg-names = "control", "domain";
61 reg-names = "control", "domain";
71 reg-names = "control", "domain";
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| D | keystone-clocks.dtsi | 166 reg-names = "control", "domain";
177 reg-names = "control", "domain";
187 reg-names = "control", "domain";
198 reg-names = "control", "domain";
208 reg-names = "control", "domain";
218 reg-names = "control", "domain";
228 reg-names = "control", "domain";
238 reg-names = "control", "domain";
248 reg-names = "control", "domain";
258 reg-names = "control", "domain";
[all …]
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| D | exynos5420-cpus.dtsi | 31 cci-control-port = <&cci_control1>;
43 cci-control-port = <&cci_control1>;
55 cci-control-port = <&cci_control1>;
67 cci-control-port = <&cci_control1>;
79 cci-control-port = <&cci_control0>;
91 cci-control-port = <&cci_control0>;
103 cci-control-port = <&cci_control0>;
115 cci-control-port = <&cci_control0>;
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| D | exynos5422-cpus.dtsi | 30 cci-control-port = <&cci_control0>;
42 cci-control-port = <&cci_control0>;
54 cci-control-port = <&cci_control0>;
66 cci-control-port = <&cci_control0>;
78 cci-control-port = <&cci_control1>;
90 cci-control-port = <&cci_control1>;
102 cci-control-port = <&cci_control1>;
114 cci-control-port = <&cci_control1>;
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| /arch/x86/include/asm/ |
| D | mshyperv.h | 74 static inline u64 hv_do_hypercall(u64 control, void *input, void *output) in hv_do_hypercall() argument
87 "+c" (control), "+d" (input_address) in hv_do_hypercall()
103 : "A" (control), in hv_do_hypercall()
115 u64 hv_status, control = (u64)code | HV_HYPERCALL_FAST_BIT; in hv_do_fast_hypercall8() local
121 "+c" (control), "+d" (input1) in hv_do_fast_hypercall8()
134 : "A" (control), in hv_do_fast_hypercall8()
146 u64 hv_status, control = (u64)code | HV_HYPERCALL_FAST_BIT; in hv_do_fast_hypercall16() local
153 "+c" (control), "+d" (input1) in hv_do_fast_hypercall16()
168 : "A" (control), "b" (input1_hi), in hv_do_fast_hypercall16()
184 u64 control = code; in hv_do_rep_hypercall() local
[all …]
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| /arch/x86/kvm/ |
| D | svm.c | 466 vmcb->control.clean = 0; in mark_all_dirty()
471 vmcb->control.clean = ((1 << VMCB_DIRTY_MAX) - 1) in mark_all_clean()
477 vmcb->control.clean &= ~(1 << bit); in mark_dirty()
487 svm->vmcb->control.avic_vapic_bar = data & VMCB_AVIC_APIC_BAR_MASK; in avic_update_vapic_bar()
512 c = &svm->vmcb->control; in recalc_intercepts()
513 h = &svm->nested.hsave->control; in recalc_intercepts()
537 vmcb->control.intercept_cr |= (1U << bit); in set_cr_intercept()
546 vmcb->control.intercept_cr &= ~(1U << bit); in clr_cr_intercept()
555 return vmcb->control.intercept_cr & (1U << bit); in is_cr_intercept()
562 vmcb->control.intercept_dr = (1 << INTERCEPT_DR0_READ) in set_dr_intercepts()
[all …]
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| /arch/mips/oprofile/ |
| D | op_model_mipsxx.c | 129 unsigned int control[4]; member
142 reg.control[i] = 0; in mipsxx_reg_setup()
148 reg.control[i] = M_PERFCTL_EVENT(ctr[i].event) | in mipsxx_reg_setup()
151 reg.control[i] |= MIPS_PERFCTRL_K; in mipsxx_reg_setup()
153 reg.control[i] |= MIPS_PERFCTRL_U; in mipsxx_reg_setup()
155 reg.control[i] |= MIPS_PERFCTRL_EXL; in mipsxx_reg_setup()
157 reg.control[i] |= XLR_PERFCTRL_ALLTHREADS; in mipsxx_reg_setup()
200 w_c0_perfctrl3(WHAT | reg.control[3]); in mipsxx_cpu_start()
203 w_c0_perfctrl2(WHAT | reg.control[2]); in mipsxx_cpu_start()
206 w_c0_perfctrl1(WHAT | reg.control[1]); in mipsxx_cpu_start()
[all …]
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| /arch/sparc/kernel/ |
| D | psycho_common.c | 39 u64 control; in psycho_check_stc_error() local
59 control = upa_readq(strbuf->strbuf_control); in psycho_check_stc_error()
60 upa_writeq(control | PSYCHO_STRBUF_CTRL_DENAB, strbuf->strbuf_control); in psycho_check_stc_error()
76 upa_writeq(control, strbuf->strbuf_control); in psycho_check_stc_error()
207 u64 control, iommu_tag[16], iommu_data[16]; in psycho_check_iommu_error() local
212 control = upa_readq(iommu->iommu_control); in psycho_check_iommu_error()
213 if (control & PSYCHO_IOMMU_CTRL_XLTEERR) { in psycho_check_iommu_error()
216 control &= ~PSYCHO_IOMMU_CTRL_XLTEERR; in psycho_check_iommu_error()
217 upa_writeq(control, iommu->iommu_control); in psycho_check_iommu_error()
219 switch ((control & PSYCHO_IOMMU_CTRL_XLTESTAT) >> 25UL) { in psycho_check_iommu_error()
[all …]
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| D | pci_schizo.c | 134 u64 control; in __schizo_check_stc_error_pbm() local
152 control = upa_readq(strbuf->strbuf_control); in __schizo_check_stc_error_pbm()
153 upa_writeq((control | SCHIZO_STRBUF_CTRL_DENAB), in __schizo_check_stc_error_pbm()
170 upa_writeq(control, strbuf->strbuf_control); in __schizo_check_stc_error_pbm()
243 u64 control; in schizo_check_iommu_error_pbm() local
247 control = upa_readq(iommu->iommu_control); in schizo_check_iommu_error_pbm()
248 if (control & SCHIZO_IOMMU_CTRL_XLTEERR) { in schizo_check_iommu_error_pbm()
253 control &= ~SCHIZO_IOMMU_CTRL_XLTEERR; in schizo_check_iommu_error_pbm()
254 upa_writeq(control, iommu->iommu_control); in schizo_check_iommu_error_pbm()
256 switch((control & SCHIZO_IOMMU_CTRL_XLTESTAT) >> 25UL) { in schizo_check_iommu_error_pbm()
[all …]
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| D | sbus.c | 499 u64 control; in sysio_register_error_handlers() local
534 control = upa_readq(iommu->write_complete_reg); in sysio_register_error_handlers()
535 control |= 0x100UL; /* SBUS Error Interrupt Enable */ in sysio_register_error_handlers()
536 upa_writeq(control, iommu->write_complete_reg); in sysio_register_error_handlers()
548 u64 control; in sbus_iommu_init() local
601 control = upa_readq(iommu->iommu_control); in sbus_iommu_init()
602 control = ((7UL << 16UL) | in sbus_iommu_init()
606 upa_writeq(control, iommu->iommu_control); in sbus_iommu_init()
628 control = (1UL << 1UL) | (1UL << 0UL); in sbus_iommu_init()
629 upa_writeq(control, strbuf->strbuf_control); in sbus_iommu_init()
[all …]
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| /arch/mips/pci/ |
| D | ops-mace.c | 43 u32 control = mace->pci.control; in mace_pci_read_config() local
46 mace->pci.control = control & ~MACEPCI_CONTROL_MAR_INT; in mace_pci_read_config()
61 mace->pci.control = control; in mace_pci_read_config()
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| D | pci-rc32434.c | 159 rc32434_pci->pcilba[0].control = in rc32434_pcibridge_init()
161 dummyread = rc32434_pci->pcilba[0].control; /* flush the CPU write Buffers */ in rc32434_pcibridge_init()
166 rc32434_pci->pcilba[1].control = in rc32434_pcibridge_init()
168 dummyread = rc32434_pci->pcilba[1].control; /* flush the CPU write Buffers */ in rc32434_pcibridge_init()
173 rc32434_pci->pcilba[2].control = in rc32434_pcibridge_init()
175 dummyread = rc32434_pci->pcilba[2].control; /* flush the CPU write Buffers */ in rc32434_pcibridge_init()
180 rc32434_pci->pcilba[3].control = in rc32434_pcibridge_init()
183 dummyread = rc32434_pci->pcilba[3].control; /* flush the CPU write Buffers */ in rc32434_pcibridge_init()
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| D | msi-octeon.c | 63 u16 control; in arch_setup_msi_irq() local
76 pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control); in arch_setup_msi_irq()
84 configured_private_bits = (control & PCI_MSI_FLAGS_QSIZE) >> 4; in arch_setup_msi_irq()
87 request_private_bits = (control & PCI_MSI_FLAGS_QMASK) >> 1; in arch_setup_msi_irq()
176 control &= ~PCI_MSI_FLAGS_QSIZE; in arch_setup_msi_irq()
177 control |= request_private_bits << 4; in arch_setup_msi_irq()
178 pci_write_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, control); in arch_setup_msi_irq()
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| /arch/um/drivers/ |
| D | daemon_user.c | 55 pri->control = socket(AF_UNIX, SOCK_STREAM, 0); in connect_to_switch()
56 if (pri->control < 0) { in connect_to_switch()
63 if (connect(pri->control, (struct sockaddr *) ctl_addr, in connect_to_switch()
97 n = write(pri->control, &req, sizeof(req)); in connect_to_switch()
105 n = read(pri->control, sun, sizeof(*sun)); in connect_to_switch()
121 close(pri->control); in connect_to_switch()
166 close(pri->control); in daemon_remove()
167 pri->control = -1; in daemon_remove()
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| /arch/m68k/hp300/ |
| D | hp300map.map | 6 # altgr control keycode 83 = Boot
7 # altgr control keycode 111 = Boot
78 control keycode 63 = nul
90 control keycode 73 = Console_4
92 control keycode 74 = Console_3
94 control keycode 75 = Console_2
96 control keycode 76 = Console_1
102 control keycode 81 = Console_5
104 control keycode 82 = Console_6
106 control keycode 83 = Console_7
[all …]
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| /arch/arm/kernel/ |
| D | iwmmxt.h | 38 .macro tmrc, dest:req, control:req
39 mrc p1, 0, \dest, \control, c0, 0
42 .macro tmcr, control:req, src:req
43 mcr p1, 0, \src, \control, c0, 0
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| /arch/arm/mm/ |
| D | proc-v6.S | 144 mrc p15, 0, r7, c1, c0, 1 @ auxiliary control register
145 mrc p15, 0, r8, c1, c0, 2 @ co-processor access control
146 mrc p15, 0, r9, c1, c0, 0 @ control register
166 mcr p15, 0, ip, c2, c0, 2 @ TTB control register
168 mcr p15, 0, r7, c1, c0, 1 @ auxiliary control register
169 mcr p15, 0, r8, c1, c0, 2 @ co-processor access control
171 mov r0, r9 @ control register
210 mcr p15, 0, r0, c2, c0, 2 @ TTB control register
222 mrc p15, 0, r0, c1, c0, 0 @ read control register
236 mrceq p15, 0, r5, c1, c0, 1 @ load aux control reg
[all …]
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| /arch/arm/boot/compressed/ |
| D | big-endian.S | 11 mrc p15, 0, r0, c1, c0, 0 @ read control reg
13 mcr p15, 0, r0, c1, c0, 0 @ write control reg
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| /arch/powerpc/include/asm/ |
| D | dbdma.h | 16 unsigned int control; /* lets you change bits in status */ member
97 out_le32(&((regs)->control), (RUN|FLUSH)<<16); \
103 out_le32(&((regs)->control), (ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN)<<16);\
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| /arch/x86/kvm/vmx/ |
| D | vmx.h | 64 u64 control; member
351 (unsigned long *)&pi_desc->control); in pi_test_and_set_on()
357 (unsigned long *)&pi_desc->control); in pi_test_and_clear_on()
373 (unsigned long *)&pi_desc->control); in pi_set_sn()
379 (unsigned long *)&pi_desc->control); in pi_set_on()
385 (unsigned long *)&pi_desc->control); in pi_clear_on()
391 (unsigned long *)&pi_desc->control); in pi_clear_sn()
397 (unsigned long *)&pi_desc->control); in pi_test_on()
403 (unsigned long *)&pi_desc->control); in pi_test_sn()
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| /arch/sparc/mm/ |
| D | iommu.c | 62 unsigned long control; in sbus_iommu_init() local
79 control = sbus_readl(&iommu->regs->control); in sbus_iommu_init()
80 impl = (control & IOMMU_CTRL_IMPL) >> 28; in sbus_iommu_init()
81 vers = (control & IOMMU_CTRL_VERS) >> 24; in sbus_iommu_init()
82 control &= ~(IOMMU_CTRL_RNGE); in sbus_iommu_init()
83 control |= (IOMMU_RNGE_256MB | IOMMU_CTRL_ENAB); in sbus_iommu_init()
84 sbus_writel(control, &iommu->regs->control); in sbus_iommu_init()
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| /arch/mips/include/asm/ip32/ |
| D | mace.h | 49 volatile unsigned int control; member
135 volatile unsigned long control; member
140 volatile unsigned long control; /* channel control */ member
240 volatile unsigned long control; member
259 volatile unsigned long control; member
|