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Searched refs:controls (Results 1 – 25 of 32) sorted by relevance

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/arch/x86/oprofile/
Dop_model_ppro.c58 msrs->controls[i].addr = MSR_P6_EVNTSEL0 + i; in ppro_fill_in_addresses()
97 if (!msrs->controls[i].addr) in ppro_setup_ctrs()
99 rdmsrl(msrs->controls[i].addr, val); in ppro_setup_ctrs()
103 wrmsrl(msrs->controls[i].addr, val); in ppro_setup_ctrs()
116 rdmsrl(msrs->controls[i].addr, val); in ppro_setup_ctrs()
119 wrmsrl(msrs->controls[i].addr, val); in ppro_setup_ctrs()
165 rdmsrl(msrs->controls[i].addr, val); in ppro_start()
167 wrmsrl(msrs->controls[i].addr, val); in ppro_start()
181 rdmsrl(msrs->controls[i].addr, val); in ppro_stop()
183 wrmsrl(msrs->controls[i].addr, val); in ppro_stop()
Dop_model_p4.c402 if (msrs->controls[i].addr) in p4_shutdown()
403 release_evntsel_nmi(msrs->controls[i].addr); in p4_shutdown()
421 msrs->controls[i].addr = cccraddr; in p4_fill_in_addresses()
429 msrs->controls[i].addr = addr; in p4_fill_in_addresses()
438 msrs->controls[i].addr = addr; in p4_fill_in_addresses()
444 msrs->controls[i].addr = addr; in p4_fill_in_addresses()
451 msrs->controls[i].addr = addr; in p4_fill_in_addresses()
457 msrs->controls[i].addr = addr; in p4_fill_in_addresses()
463 msrs->controls[i].addr = addr; in p4_fill_in_addresses()
471 msrs->controls[i++].addr = MSR_P4_CRU_ESCR5; in p4_fill_in_addresses()
[all …]
Dnmi_int.c78 struct op_msr *controls = msrs->controls; in nmi_cpu_save_registers() local
87 if (controls[i].addr) in nmi_cpu_save_registers()
88 rdmsrl(controls[i].addr, controls[i].saved); in nmi_cpu_save_registers()
95 if (!msrs->controls) in nmi_cpu_start()
115 if (!msrs->controls) in nmi_cpu_stop()
309 kfree(per_cpu(cpu_msrs, i).controls); in free_msrs()
310 per_cpu(cpu_msrs, i).controls = NULL; in free_msrs()
326 per_cpu(cpu_msrs, i).controls = kzalloc(controls_size, in allocate_msrs()
328 if (!per_cpu(cpu_msrs, i).controls) in allocate_msrs()
359 struct op_msr *controls = msrs->controls; in nmi_cpu_restore_registers() local
[all …]
Dop_model_amd.c279 rdmsrl(msrs->controls[i].addr, val); in op_mux_switch_ctrl()
282 wrmsrl(msrs->controls[i].addr, val); in op_mux_switch_ctrl()
316 msrs->controls[i].addr = MSR_F15H_PERF_CTL + (i << 1); in op_amd_fill_in_addresses()
318 msrs->controls[i].addr = MSR_K7_EVNTSEL0 + i; in op_amd_fill_in_addresses()
350 if (!msrs->controls[i].addr) in op_amd_setup_ctrs()
352 rdmsrl(msrs->controls[i].addr, val); in op_amd_setup_ctrs()
356 wrmsrl(msrs->controls[i].addr, val); in op_amd_setup_ctrs()
374 rdmsrl(msrs->controls[i].addr, val); in op_amd_setup_ctrs()
377 wrmsrl(msrs->controls[i].addr, val); in op_amd_setup_ctrs()
413 rdmsrl(msrs->controls[i].addr, val); in op_amd_start()
[all …]
Dop_x86_model.h25 struct op_msr *controls; member
/arch/arm/boot/dts/
Dat91-natte.dtsi24 mux-controls = <&mux>;
35 mux-controls = <&mux>;
46 mux-controls = <&mux>;
57 mux-controls = <&mux>;
Dimx6dl.dtsi186 mux-controls = <&mux 0>;
240 mux-controls = <&mux 1>;
Dimx6q.dtsi349 mux-controls = <&mux 0>;
379 mux-controls = <&mux 1>;
Dsun8i-a23.dtsi59 allwinner,codec-analog-controls = <&codec_analog>;
Dsun4i-a10-gemei-g9.dts74 /* PH15 controls power to external amplifier (ft2012q) */
Dat91-tse850-3.dts95 mux-controls = <&mux>;
Dsun7i-a20-i12-tvbox.dts90 /* This controls VCC-PI, must be always on! */
Dsun8i-a83t-bananapi-m3.dts126 /* TODO GL830 USB-to-SATA bridge downstream w/ GPIO power controls */
Domap3-lilly-a83x.dtsi126 /* GPIO 182 controls USB-Hub reset. But USB-Phy its
Domap5-cm-t54.dts620 /* REGEN3 controls LDO9 supply to card */
Domap5-board-common.dtsi622 /* REGEN3 controls LDO9 supply to card */
/arch/arm/mach-omap1/
Dsleep.S133 @ Restore EMIFF controls
361 @ Restore EMIFF controls
/arch/x86/xen/
DKconfig59 pv-domains with more than 512 GB of RAM. This option controls the
/arch/arm64/boot/dts/freescale/
Dfsl-ls1028a-qds.dts91 mux-controls = <&mux 0>;
/arch/arm64/boot/dts/allwinner/
Dsun50i-a64-bananapi-m64.dts234 * which also controls two LEDs.
259 * which also controls the power LED.
/arch/arm64/boot/dts/ti/
Dk3-am65-main.dtsi77 mux-controls = <&serdes_mux 0>;
92 mux-controls = <&serdes_mux 1>;
/arch/arm/plat-samsung/
DKconfig290 Compile support for wakeup-mask controls found on the S3C6400
/arch/powerpc/platforms/
DKconfig.cputype497 This symbol controls whether we build the 32-bit VDSO. We obviously
/arch/arm64/boot/dts/rockchip/
Drk3399-gru.dtsi34 * - The EC controls the enable and the EC always enables a rail as
/arch/m68k/
DKconfig.machine441 the chip select that controls the boot ROM device.

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