Searched refs:inv (Results 1 – 14 of 14) sorted by relevance
/arch/arm/mm/ |
D | proc-feroceon.S | 252 mcr p15, 5, r0, c15, c15, 0 @ D clean/inv range start 253 mcr p15, 5, r1, c15, c15, 1 @ D clean/inv range top 298 mcr p15, 5, r0, c15, c14, 0 @ D inv range start 299 mcr p15, 5, r1, c15, c14, 1 @ D inv range top 361 mcr p15, 5, r0, c15, c15, 0 @ D clean/inv range start 362 mcr p15, 5, r1, c15, c15, 1 @ D clean/inv range top
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/arch/mips/boot/dts/brcm/ |
D | bcm63268-comtrend-vr-3032u.dts | 25 brcm,serial-shift-inv;
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/arch/x86/events/intel/ |
D | p6.c | 188 PMU_FORMAT_ATTR(inv, "config:23" );
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D | knc.c | 278 PMU_FORMAT_ATTR(inv, "config:23" );
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D | core.c | 3142 u64 alt_config = X86_CONFIG(.event=0xc0, .inv=1, .cmask=16); in intel_pebs_aliases_core2() 3170 u64 alt_config = X86_CONFIG(.event=0xc2, .umask=0x01, .inv=1, .cmask=16); in intel_pebs_aliases_snb() 3194 u64 alt_config = X86_CONFIG(.event=0xc0, .umask=0x01, .inv=1, .cmask=16); in intel_pebs_aliases_precdist() 3599 PMU_FORMAT_ATTR(inv, "config:23" ); 4648 X86_CONFIG(.event=0x0e, .umask=0x01, .inv=1, .cmask=1); in intel_pmu_init() 4651 X86_CONFIG(.event=0xb1, .umask=0x3f, .inv=1, .cmask=1); in intel_pmu_init() 4805 X86_CONFIG(.event=0x0e, .umask=0x01, .inv=1, .cmask=1); in intel_pmu_init() 4808 X86_CONFIG(.event=0xb1, .umask=0x3f, .inv=1, .cmask=1); in intel_pmu_init() 4845 X86_CONFIG(.event=0x0e, .umask=0x01, .inv=1, .cmask=1); in intel_pmu_init() 4848 X86_CONFIG(.event=0xb1, .umask=0x01, .inv=1, .cmask=1); in intel_pmu_init() [all …]
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D | uncore_snb.c | 120 DEFINE_UNCORE_FORMAT_ATTR(inv, inv, "config:23");
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D | uncore_nhmex.c | 194 DEFINE_UNCORE_FORMAT_ATTR(inv, inv, "config:23");
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D | uncore_snbep.c | 396 DEFINE_UNCORE_FORMAT_ATTR(inv, inv, "config:23");
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/arch/x86/events/amd/ |
D | core.c | 720 PMU_FORMAT_ATTR(inv, "config:23" );
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/arch/x86/events/ |
D | perf_event.h | 544 inv:1, member
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D | core.c | 1744 bool inv = (config & ARCH_PERFMON_EVENTSEL_INV); in x86_event_sysfs_show() local 1765 if (inv) in x86_event_sysfs_show()
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/arch/arm/crypto/ |
D | aes-neonbs-core.S | 302 t0, t1, t2, t3, t4, t5, t6, t7, inv argument 341 .ifb \inv
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/arch/arm64/crypto/ |
D | aes-neonbs-core.S | 250 t0, t1, t2, t3, t4, t5, t6, t7, inv argument 289 .ifb \inv
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/arch/arm/boot/dts/ |
D | omap3-n900.dts | 801 clock-inv = <0>;
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