Searched refs:spsr (Results 1 – 12 of 12) sorted by relevance
/arch/arm64/kvm/hyp/ |
D | sysreg-sr.c | 66 ctxt->gp_regs.spsr[KVM_SPSR_EL1]= read_sysreg_el1(SYS_SPSR); in __sysreg_save_el1_state() 140 write_sysreg_el1(ctxt->gp_regs.spsr[KVM_SPSR_EL1],SYS_SPSR); in __sysreg_restore_el1_state() 193 u64 *spsr, *sysreg; in __sysreg32_save_state() local 198 spsr = vcpu->arch.ctxt.gp_regs.spsr; in __sysreg32_save_state() 201 spsr[KVM_SPSR_ABT] = read_sysreg(spsr_abt); in __sysreg32_save_state() 202 spsr[KVM_SPSR_UND] = read_sysreg(spsr_und); in __sysreg32_save_state() 203 spsr[KVM_SPSR_IRQ] = read_sysreg(spsr_irq); in __sysreg32_save_state() 204 spsr[KVM_SPSR_FIQ] = read_sysreg(spsr_fiq); in __sysreg32_save_state() 215 u64 *spsr, *sysreg; in __sysreg32_restore_state() local 220 spsr = vcpu->arch.ctxt.gp_regs.spsr; in __sysreg32_restore_state() [all …]
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D | switch.c | 768 static void __hyp_text __hyp_call_panic_nvhe(u64 spsr, u64 elr, u64 par, in __hyp_call_panic_nvhe() argument 791 spsr, elr, in __hyp_call_panic_nvhe() 796 static void __hyp_call_panic_vhe(u64 spsr, u64 elr, u64 par, in __hyp_call_panic_vhe() argument 806 spsr, elr, in __hyp_call_panic_vhe() 814 u64 spsr = read_sysreg_el2(SYS_SPSR); in hyp_panic() local 819 __hyp_call_panic_nvhe(spsr, elr, par, host_ctxt); in hyp_panic() 821 __hyp_call_panic_vhe(spsr, elr, par, host_ctxt); in hyp_panic()
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/arch/arm64/include/asm/ |
D | kvm_emulate.h | 185 return vcpu_gp_regs(vcpu)->spsr[KVM_SPSR_EL1]; in vcpu_read_spsr() 198 vcpu_gp_regs(vcpu)->spsr[KVM_SPSR_EL1] = v; in vcpu_write_spsr() 221 static inline unsigned long host_spsr_to_spsr32(unsigned long spsr) in host_spsr_to_spsr32() argument 224 unsigned long dit = !!(spsr & PSR_AA32_DIT_BIT); in host_spsr_to_spsr32() 226 spsr &= ~overlap; in host_spsr_to_spsr32() 228 spsr |= dit << 21; in host_spsr_to_spsr32() 230 return spsr; in host_spsr_to_spsr32()
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D | kvm_asm.h | 101 u64 spsr, elr; \ 113 : "+r" (__kvm_at_err), "=&r" (spsr), "=&r" (elr) \
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/arch/arm64/kernel/ |
D | signal32.c | 324 compat_ulong_t spsr = regs->pstate & ~(PSR_f | PSR_AA32_E_BIT); in compat_setup_return() local 331 spsr |= PSR_AA32_T_BIT; in compat_setup_return() 333 spsr &= ~PSR_AA32_T_BIT; in compat_setup_return() 336 spsr &= ~PSR_AA32_IT_MASK; in compat_setup_return() 339 spsr |= PSR_AA32_ENDSTATE; in compat_setup_return() 383 regs->pstate = spsr; in compat_setup_return()
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/arch/arm64/kvm/ |
D | regmap.c | 151 return vcpu_gp_regs(vcpu)->spsr[spsr_idx]; in vcpu_read_spsr32() 174 vcpu_gp_regs(vcpu)->spsr[spsr_idx] = v; in vcpu_write_spsr32()
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D | guest.c | 74 case KVM_REG_ARM_CORE_REG(spsr[0]) ... in core_reg_size_from_offset() 75 KVM_REG_ARM_CORE_REG(spsr[KVM_NR_SPSR - 1]): in core_reg_size_from_offset()
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/arch/arm/include/asm/ |
D | kvm_emulate.h | 56 static inline unsigned long host_spsr_to_spsr32(unsigned long spsr) in host_spsr_to_spsr32() argument 58 return spsr; in host_spsr_to_spsr32()
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/arch/arm/kernel/ |
D | entry-armv.S | 314 mrs r2, spsr @ Save spsr_abt, abort is now safe 995 * Enter in IRQ mode, spsr = SVC/USR CPSR, lr = SVC/USR PC 1012 2: mrs lr, spsr 1013 str lr, [sp, #8] @ save spsr
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D | entry-common.S | 200 mrs saved_psr, spsr @ called from non-FIQ mode, so ok.
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/arch/arm64/include/uapi/asm/ |
D | kvm.h | 56 __u64 spsr[KVM_NR_SPSR]; member
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/arch/arm/boot/compressed/ |
D | head.S | 459 mrs r0, spsr 614 mrs r0, spsr @ Get saved CPU boot mode
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