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/include/soc/mscc/
Docelot_hsio.h90 #define HSIO_PLL5G_CFG0_SELBGV820(x) (((x) << 23) & GENMASK(26, 23)) argument
92 #define HSIO_PLL5G_CFG0_SELBGV820_X(x) (((x) & GENMASK(26, 23)) >> 23) argument
93 #define HSIO_PLL5G_CFG0_LOOP_BW_RES(x) (((x) << 18) & GENMASK(22, 18)) argument
95 #define HSIO_PLL5G_CFG0_LOOP_BW_RES_X(x) (((x) & GENMASK(22, 18)) >> 18) argument
96 #define HSIO_PLL5G_CFG0_SELCPI(x) (((x) << 16) & GENMASK(17, 16)) argument
98 #define HSIO_PLL5G_CFG0_SELCPI_X(x) (((x) & GENMASK(17, 16)) >> 16) argument
103 #define HSIO_PLL5G_CFG0_CPU_CLK_DIV(x) (((x) << 6) & GENMASK(11, 6)) argument
105 #define HSIO_PLL5G_CFG0_CPU_CLK_DIV_X(x) (((x) & GENMASK(11, 6)) >> 6) argument
106 #define HSIO_PLL5G_CFG0_CORE_CLK_DIV(x) ((x) & GENMASK(5, 0)) argument
114 #define HSIO_PLL5G_CFG1_RC_CTRL_DATA(x) (((x) << 6) & GENMASK(13, 6)) argument
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/include/asm-generic/
Dint-ll64.h25 #define S8_C(x) x argument
26 #define U8_C(x) x ## U argument
27 #define S16_C(x) x argument
28 #define U16_C(x) x ## U argument
29 #define S32_C(x) x argument
30 #define U32_C(x) x ## U argument
31 #define S64_C(x) x ## LL argument
32 #define U64_C(x) x ## ULL argument
36 #define S8_C(x) x argument
37 #define U8_C(x) x argument
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/include/uapi/linux/byteorder/
Dlittle_endian.h15 #define __constant_htonl(x) ((__force __be32)___constant_swab32((x))) argument
16 #define __constant_ntohl(x) ___constant_swab32((__force __be32)(x)) argument
17 #define __constant_htons(x) ((__force __be16)___constant_swab16((x))) argument
18 #define __constant_ntohs(x) ___constant_swab16((__force __be16)(x)) argument
19 #define __constant_cpu_to_le64(x) ((__force __le64)(__u64)(x)) argument
20 #define __constant_le64_to_cpu(x) ((__force __u64)(__le64)(x)) argument
21 #define __constant_cpu_to_le32(x) ((__force __le32)(__u32)(x)) argument
22 #define __constant_le32_to_cpu(x) ((__force __u32)(__le32)(x)) argument
23 #define __constant_cpu_to_le16(x) ((__force __le16)(__u16)(x)) argument
24 #define __constant_le16_to_cpu(x) ((__force __u16)(__le16)(x)) argument
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Dbig_endian.h15 #define __constant_htonl(x) ((__force __be32)(__u32)(x)) argument
16 #define __constant_ntohl(x) ((__force __u32)(__be32)(x)) argument
17 #define __constant_htons(x) ((__force __be16)(__u16)(x)) argument
18 #define __constant_ntohs(x) ((__force __u16)(__be16)(x)) argument
19 #define __constant_cpu_to_le64(x) ((__force __le64)___constant_swab64((x))) argument
20 #define __constant_le64_to_cpu(x) ___constant_swab64((__force __u64)(__le64)(x)) argument
21 #define __constant_cpu_to_le32(x) ((__force __le32)___constant_swab32((x))) argument
22 #define __constant_le32_to_cpu(x) ___constant_swab32((__force __u32)(__le32)(x)) argument
23 #define __constant_cpu_to_le16(x) ((__force __le16)___constant_swab16((x))) argument
24 #define __constant_le16_to_cpu(x) ___constant_swab16((__force __u16)(__le16)(x)) argument
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/include/linux/iio/frequency/
Dadf4350.h20 #define ADF4350_REG0_FRACT(x) (((x) & 0xFFF) << 3) argument
21 #define ADF4350_REG0_INT(x) (((x) & 0xFFFF) << 15) argument
24 #define ADF4350_REG1_MOD(x) (((x) & 0xFFF) << 3) argument
25 #define ADF4350_REG1_PHASE(x) (((x) & 0xFFF) << 15) argument
37 #define ADF4350_REG2_CHARGE_PUMP_CURR_uA(x) (((((x)-312) / 312) & 0xF) << 9) argument
39 #define ADF4350_REG2_10BIT_R_CNT(x) ((x) << 14) argument
42 #define ADF4350_REG2_MUXOUT(x) ((x) << 26) argument
43 #define ADF4350_REG2_NOISE_MODE(x) (((unsigned)(x)) << 29) argument
53 #define ADF4350_REG3_12BIT_CLKDIV(x) ((x) << 3) argument
54 #define ADF4350_REG3_12BIT_CLKDIV_MODE(x) ((x) << 16) argument
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/include/dt-bindings/sound/
Dfsl-imx-audmux.h36 #define IMX_AUDMUX_V1_PCR_INMMASK(x) ((x) & 0xff) argument
40 #define IMX_AUDMUX_V1_PCR_RXDSEL(x) (((x) & 0x7) << 13) argument
41 #define IMX_AUDMUX_V1_PCR_RFCSEL(x) (((x) & 0xf) << 20) argument
44 #define IMX_AUDMUX_V1_PCR_TFCSEL(x) (((x) & 0xf) << 26) argument
50 #define IMX_AUDMUX_V2_PTCR_TFSEL(x) (((x) & 0xf) << 27) argument
52 #define IMX_AUDMUX_V2_PTCR_TCSEL(x) (((x) & 0xf) << 22) argument
54 #define IMX_AUDMUX_V2_PTCR_RFSEL(x) (((x) & 0xf) << 17) argument
56 #define IMX_AUDMUX_V2_PTCR_RCSEL(x) (((x) & 0xf) << 12) argument
59 #define IMX_AUDMUX_V2_PDCR_RXDSEL(x) (((x) & 0x7) << 13) argument
61 #define IMX_AUDMUX_V2_PDCR_MODE(x) (((x) & 0x3) << 8) argument
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/include/linux/usb/
Dphy.h73 int (*read)(struct usb_phy *x, u32 reg);
74 int (*write)(struct usb_phy *x, u32 val, u32 reg);
126 int (*init)(struct usb_phy *x);
127 void (*shutdown)(struct usb_phy *x);
130 int (*set_vbus)(struct usb_phy *x, int on);
133 int (*set_power)(struct usb_phy *x,
137 int (*set_suspend)(struct usb_phy *x,
145 int (*set_wakeup)(struct usb_phy *x, bool enabled);
148 int (*notify_connect)(struct usb_phy *x,
150 int (*notify_disconnect)(struct usb_phy *x,
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/include/video/
Dili9320.h12 #define ILI9320_REG(x) (x) argument
84 #define ILI9320_ENTRYMODE_ID(x) ((x) << 4) argument
92 #define ILI9320_RESIZING_RSZ(x) ((x) << 0) argument
93 #define ILI9320_RESIZING_RCH(x) ((x) << 4) argument
94 #define ILI9320_RESIZING_RCV(x) ((x) << 8) argument
97 #define ILI9320_DISPLAY1_D(x) ((x) << 0) argument
102 #define ILI9320_DISPLAY1_PTDE(x) ((x) << 12) argument
105 #define ILI9320_DISPLAY2_BP(x) ((x) << 0) argument
106 #define ILI9320_DISPLAY2_FP(x) ((x) << 8) argument
119 #define ILI9320_RGBIF1_ENC_FRAMES(x) (((x) - 1)<< 13) argument
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/include/linux/
Dpxa2xx_ssp.h47 #define SSCR0_DataSize(x) ((x) - 1) /* Data Size Select [4..16] */ argument
54 #define SSCR0_SCR(x) ((x) << 8) /* Serial Clock Rate (mask) */ argument
62 #define SSCR0_SlotsPerFrm(x) (((x) - 1) << 24) /* Time slots per frame [1..8] */ argument
90 #define SSCR1_TxTresh(x) (((x) - 1) << 6) /* level [1..16] */ argument
92 #define SSCR1_RxTresh(x) (((x) - 1) << 10) /* level [1..16] */ argument
101 #define CE4100_SSCR1_TxTresh(x) (((x) - 1) << 6) /* level [1..4] */ argument
103 #define CE4100_SSCR1_RxTresh(x) (((x) - 1) << 10) /* level [1..4] */ argument
107 #define QUARK_X1000_SSCR0_DataSize(x) ((x) - 1) /* Data Size Select [4..32] */ argument
118 #define QUARK_X1000_SSCR1_TxTresh(x) (((x) - 1) << 6) /* level [1..32] */ argument
120 #define QUARK_X1000_SSCR1_RxTresh(x) (((x) - 1) << 11) /* level [1..32] */ argument
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Dbcd.h7 #define bcd2bin(x) \ argument
8 (__builtin_constant_p((u8 )(x)) ? \
9 const_bcd2bin(x) : \
10 _bcd2bin(x))
12 #define bin2bcd(x) \ argument
13 (__builtin_constant_p((u8 )(x)) ? \
14 const_bin2bcd(x) : \
15 _bin2bcd(x))
17 #define const_bcd2bin(x) (((x) & 0x0f) + ((x) >> 4) * 10) argument
18 #define const_bin2bcd(x) ((((x) / 10) << 4) + (x) % 10) argument
Dinterconnect.h14 #define Bps_to_icc(x) ((x) / 1000) argument
15 #define kBps_to_icc(x) (x) argument
16 #define MBps_to_icc(x) ((x) * 1000) argument
17 #define GBps_to_icc(x) ((x) * 1000 * 1000) argument
18 #define bps_to_icc(x) (1) argument
19 #define kbps_to_icc(x) ((x) / 8 + ((x) % 8 ? 1 : 0)) argument
20 #define Mbps_to_icc(x) ((x) * 1000 / 8) argument
21 #define Gbps_to_icc(x) ((x) * 1000 * 1000 / 8) argument
Dcompletion.h31 #define init_completion_map(x, m) __init_completion(x) argument
32 #define init_completion(x) __init_completion(x) argument
33 static inline void complete_acquire(struct completion *x) {} in complete_acquire() argument
34 static inline void complete_release(struct completion *x) {} in complete_release() argument
85 static inline void __init_completion(struct completion *x) in __init_completion() argument
87 x->done = 0; in __init_completion()
88 init_waitqueue_head(&x->wait); in __init_completion()
98 static inline void reinit_completion(struct completion *x) in reinit_completion() argument
100 x->done = 0; in reinit_completion()
105 extern int wait_for_completion_interruptible(struct completion *x);
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Dpfn.h18 #define PFN_ALIGN(x) (((unsigned long)(x) + (PAGE_SIZE - 1)) & PAGE_MASK) argument
19 #define PFN_UP(x) (((x) + PAGE_SIZE-1) >> PAGE_SHIFT) argument
20 #define PFN_DOWN(x) ((x) >> PAGE_SHIFT) argument
21 #define PFN_PHYS(x) ((phys_addr_t)(x) << PAGE_SHIFT) argument
22 #define PHYS_PFN(x) ((unsigned long)((x) >> PAGE_SHIFT)) argument
/include/scsi/
Dscsi_transport_spi.h62 #define spi_period(x) (((struct spi_transport_attrs *)&(x)->starget_data)->period) argument
63 #define spi_min_period(x) (((struct spi_transport_attrs *)&(x)->starget_data)->min_period) argument
64 #define spi_offset(x) (((struct spi_transport_attrs *)&(x)->starget_data)->offset) argument
65 #define spi_max_offset(x) (((struct spi_transport_attrs *)&(x)->starget_data)->max_offset) argument
66 #define spi_width(x) (((struct spi_transport_attrs *)&(x)->starget_data)->width) argument
67 #define spi_max_width(x) (((struct spi_transport_attrs *)&(x)->starget_data)->max_width) argument
68 #define spi_iu(x) (((struct spi_transport_attrs *)&(x)->starget_data)->iu) argument
69 #define spi_max_iu(x) (((struct spi_transport_attrs *)&(x)->starget_data)->max_iu) argument
70 #define spi_dt(x) (((struct spi_transport_attrs *)&(x)->starget_data)->dt) argument
71 #define spi_qas(x) (((struct spi_transport_attrs *)&(x)->starget_data)->qas) argument
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/include/uapi/linux/
Dswab.h14 #define ___constant_swab16(x) ((__u16)( \ argument
15 (((__u16)(x) & (__u16)0x00ffU) << 8) | \
16 (((__u16)(x) & (__u16)0xff00U) >> 8)))
18 #define ___constant_swab32(x) ((__u32)( \ argument
19 (((__u32)(x) & (__u32)0x000000ffUL) << 24) | \
20 (((__u32)(x) & (__u32)0x0000ff00UL) << 8) | \
21 (((__u32)(x) & (__u32)0x00ff0000UL) >> 8) | \
22 (((__u32)(x) & (__u32)0xff000000UL) >> 24)))
24 #define ___constant_swab64(x) ((__u64)( \ argument
25 (((__u64)(x) & (__u64)0x00000000000000ffULL) << 56) | \
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Da.out.h77 #define N_BADMAG(x) (N_MAGIC(x) != OMAGIC \ argument
78 && N_MAGIC(x) != NMAGIC \
79 && N_MAGIC(x) != ZMAGIC \
80 && N_MAGIC(x) != QMAGIC)
83 #define _N_HDROFF(x) (1024 - sizeof (struct exec)) argument
86 #define N_TXTOFF(x) \ argument
87 (N_MAGIC(x) == ZMAGIC ? _N_HDROFF((x)) + sizeof (struct exec) : \
88 (N_MAGIC(x) == QMAGIC ? 0 : sizeof (struct exec)))
92 #define N_DATOFF(x) (N_TXTOFF(x) + (x).a_text) argument
96 #define N_TRELOFF(x) (N_DATOFF(x) + (x).a_data) argument
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Dmtio.h140 #define GMT_EOF(x) ((x) & 0x80000000) argument
141 #define GMT_BOT(x) ((x) & 0x40000000) argument
142 #define GMT_EOT(x) ((x) & 0x20000000) argument
143 #define GMT_SM(x) ((x) & 0x10000000) /* DDS setmark */ argument
144 #define GMT_EOD(x) ((x) & 0x08000000) /* DDS EOD */ argument
145 #define GMT_WR_PROT(x) ((x) & 0x04000000) argument
147 #define GMT_ONLINE(x) ((x) & 0x01000000) argument
148 #define GMT_D_6250(x) ((x) & 0x00800000) argument
149 #define GMT_D_1600(x) ((x) & 0x00400000) argument
150 #define GMT_D_800(x) ((x) & 0x00200000) argument
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/include/linux/mtd/
Dcfi_endian.h27 #define cpu_to_cfi8(map, x) (x) argument
28 #define cfi8_to_cpu(map, x) (x) argument
29 #define cpu_to_cfi16(map, x) _cpu_to_cfi(16, (map)->swap, (x)) argument
30 #define cpu_to_cfi32(map, x) _cpu_to_cfi(32, (map)->swap, (x)) argument
31 #define cpu_to_cfi64(map, x) _cpu_to_cfi(64, (map)->swap, (x)) argument
32 #define cfi16_to_cpu(map, x) _cfi_to_cpu(16, (map)->swap, (x)) argument
33 #define cfi32_to_cpu(map, x) _cfi_to_cpu(32, (map)->swap, (x)) argument
34 #define cfi64_to_cpu(map, x) _cfi_to_cpu(64, (map)->swap, (x)) argument
36 #define _cpu_to_cfi(w, s, x) (cfi_host(s)?(x):_swap_to_cfi(w, s, x)) argument
37 #define _cfi_to_cpu(w, s, x) (cfi_host(s)?(x):_swap_to_cpu(w, s, x)) argument
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/include/asm-generic/bitops/
Dffs.h13 static inline int ffs(int x) in ffs() argument
17 if (!x) in ffs()
19 if (!(x & 0xffff)) { in ffs()
20 x >>= 16; in ffs()
23 if (!(x & 0xff)) { in ffs()
24 x >>= 8; in ffs()
27 if (!(x & 0xf)) { in ffs()
28 x >>= 4; in ffs()
31 if (!(x & 3)) { in ffs()
32 x >>= 2; in ffs()
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Dfls.h13 static __always_inline int fls(unsigned int x) in fls() argument
17 if (!x) in fls()
19 if (!(x & 0xffff0000u)) { in fls()
20 x <<= 16; in fls()
23 if (!(x & 0xff000000u)) { in fls()
24 x <<= 8; in fls()
27 if (!(x & 0xf0000000u)) { in fls()
28 x <<= 4; in fls()
31 if (!(x & 0xc0000000u)) { in fls()
32 x <<= 2; in fls()
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/include/linux/mfd/
Dmc13xxx.h132 #define MC13783_LED_C0_ABMODE(x) (((x) & 0x7) << 11) argument
133 #define MC13783_LED_C0_ABREF(x) (((x) & 0x3) << 14) argument
138 #define MC13783_LED_C2_CURRENT_MD(x) (((x) & 0x7) << 0) argument
139 #define MC13783_LED_C2_CURRENT_AD(x) (((x) & 0x7) << 3) argument
140 #define MC13783_LED_C2_CURRENT_KP(x) (((x) & 0x7) << 6) argument
141 #define MC13783_LED_C2_PERIOD(x) (((x) & 0x3) << 21) argument
144 #define MC13783_LED_C3_CURRENT_R1(x) (((x) & 0x3) << 0) argument
145 #define MC13783_LED_C3_CURRENT_G1(x) (((x) & 0x3) << 2) argument
146 #define MC13783_LED_C3_CURRENT_B1(x) (((x) & 0x3) << 4) argument
147 #define MC13783_LED_C3_PERIOD(x) (((x) & 0x3) << 21) argument
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Dsun4i-gpadc.h12 #define SUN4I_GPADC_CTRL0_ADC_FIRST_DLY(x) ((GENMASK(7, 0) & (x)) << 24) argument
15 #define SUN4I_GPADC_CTRL0_ADC_CLK_DIVIDER(x) ((GENMASK(1, 0) & (x)) << 20) argument
16 #define SUN4I_GPADC_CTRL0_FS_DIV(x) ((GENMASK(3, 0) & (x)) << 16) argument
17 #define SUN4I_GPADC_CTRL0_T_ACQ(x) (GENMASK(15, 0) & (x)) argument
21 #define SUN4I_GPADC_CTRL1_STYLUS_UP_DEBOUNCE(x) ((GENMASK(7, 0) & (x)) << 12) argument
27 #define SUN4I_GPADC_CTRL1_ADC_CHAN_SELECT(x) (GENMASK(2, 0) & (x)) argument
35 #define SUN6I_GPADC_CTRL1_ADC_CHAN_SELECT(x) (GENMASK(3, 0) & BIT(x)) argument
44 #define SUN4I_GPADC_CTRL2_TP_SENSITIVE_ADJUST(x) ((GENMASK(3, 0) & (x)) << 28) argument
45 #define SUN4I_GPADC_CTRL2_TP_MODE_SELECT(x) ((GENMASK(1, 0) & (x)) << 26) argument
47 #define SUN4I_GPADC_CTRL2_PRE_MEA_THRE_CNT(x) (GENMASK(23, 0) & (x)) argument
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/include/trace/events/
Drdma.h35 #define ib_event(x) TRACE_DEFINE_ENUM(IB_EVENT_##x); argument
36 #define ib_event_end(x) TRACE_DEFINE_ENUM(IB_EVENT_##x); argument
43 #define ib_event(x) { IB_EVENT_##x, #x }, argument
44 #define ib_event_end(x) { IB_EVENT_##x, #x } argument
46 #define rdma_show_ib_event(x) \ argument
47 __print_symbolic(x, IB_EVENT_LIST)
79 #define ib_wc_status(x) TRACE_DEFINE_ENUM(IB_WC_##x); argument
80 #define ib_wc_status_end(x) TRACE_DEFINE_ENUM(IB_WC_##x); argument
87 #define ib_wc_status(x) { IB_WC_##x, #x }, argument
88 #define ib_wc_status_end(x) { IB_WC_##x, #x } argument
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/include/linux/platform_data/
Dvideo-imxfb.h33 #define PCR_ACD(x) (((x) & 0x7f) << 8) argument
36 #define PCR_PCD(x) ((x) & 0x3f) argument
38 #define PWMR_CLS(x) (((x) & 0x1ff) << 16) argument
43 #define PWMR_PW(x) ((x) & 0xff) argument
45 #define LSCR1_PS_RISE_DELAY(x) (((x) & 0x7f) << 26) argument
46 #define LSCR1_CLS_RISE_DELAY(x) (((x) & 0x3f) << 16) argument
47 #define LSCR1_REV_TOGGLE_DELAY(x) (((x) & 0xf) << 8) argument
48 #define LSCR1_GRAY2(x) (((x) & 0xf) << 4) argument
49 #define LSCR1_GRAY1(x) (((x) & 0xf)) argument
/include/uapi/sound/
Demu10k1.h65 #define FXBUS(x) (0x00 + (x)) /* x = 0x00 - 0x0f */ argument
66 #define EXTIN(x) (0x10 + (x)) /* x = 0x00 - 0x0f */ argument
67 #define EXTOUT(x) (0x20 + (x)) /* x = 0x00 - 0x0f physical outs -> FXWC low 16 bits */ argument
68 #define FXBUS2(x) (0x30 + (x)) /* x = 0x00 - 0x0f copies of fx buses for capture -> FXWC high 16 bi… argument
99 #define GPR(x) (FXGPREGBASE + (x)) /* free GPRs: x = 0x00 - 0xff */ argument
100 #define ITRAM_DATA(x) (TANKMEMDATAREGBASE + 0x00 + (x)) /* x = 0x00 - 0x7f */ argument
101 #define ETRAM_DATA(x) (TANKMEMDATAREGBASE + 0x80 + (x)) /* x = 0x00 - 0x1f */ argument
102 #define ITRAM_ADDR(x) (TANKMEMADDRREGBASE + 0x00 + (x)) /* x = 0x00 - 0x7f */ argument
103 #define ETRAM_ADDR(x) (TANKMEMADDRREGBASE + 0x80 + (x)) /* x = 0x00 - 0x1f */ argument
105 #define A_ITRAM_DATA(x) (TANKMEMDATAREGBASE + 0x00 + (x)) /* x = 0x00 - 0xbf */ argument
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