1==================== 2HugeTLBpage on ARM64 3==================== 4 5Hugepage relies on making efficient use of TLBs to improve performance of 6address translations. The benefit depends on both - 7 8 - the size of hugepages 9 - size of entries supported by the TLBs 10 11The ARM64 port supports two flavours of hugepages. 12 131) Block mappings at the pud/pmd level 14-------------------------------------- 15 16These are regular hugepages where a pmd or a pud page table entry points to a 17block of memory. Regardless of the supported size of entries in TLB, block 18mappings reduce the depth of page table walk needed to translate hugepage 19addresses. 20 212) Using the Contiguous bit 22--------------------------- 23 24The architecture provides a contiguous bit in the translation table entries 25(D4.5.3, ARM DDI 0487C.a) that hints to the MMU to indicate that it is one of a 26contiguous set of entries that can be cached in a single TLB entry. 27 28The contiguous bit is used in Linux to increase the mapping size at the pmd and 29pte (last) level. The number of supported contiguous entries varies by page size 30and level of the page table. 31 32 33The following hugepage sizes are supported - 34 35 ====== ======== ==== ======== === 36 - CONT PTE PMD CONT PMD PUD 37 ====== ======== ==== ======== === 38 4K: 64K 2M 32M 1G 39 16K: 2M 32M 1G 40 64K: 2M 512M 16G 41 ====== ======== ==== ======== === 42