1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the r8a7745 SoC 4 * 5 * Copyright (C) 2016-2017 Cogent Embedded Inc. 6 */ 7 8#include <dt-bindings/interrupt-controller/irq.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/clock/r8a7745-cpg-mssr.h> 11#include <dt-bindings/power/r8a7745-sysc.h> 12 13/ { 14 compatible = "renesas,r8a7745"; 15 #address-cells = <2>; 16 #size-cells = <2>; 17 18 aliases { 19 i2c0 = &i2c0; 20 i2c1 = &i2c1; 21 i2c2 = &i2c2; 22 i2c3 = &i2c3; 23 i2c4 = &i2c4; 24 i2c5 = &i2c5; 25 i2c6 = &iic0; 26 i2c7 = &iic1; 27 spi0 = &qspi; 28 spi1 = &msiof0; 29 spi2 = &msiof1; 30 spi3 = &msiof2; 31 vin0 = &vin0; 32 vin1 = &vin1; 33 }; 34 35 /* 36 * The external audio clocks are configured as 0 Hz fixed 37 * frequency clocks by default. Boards that provide audio 38 * clocks should override them. 39 */ 40 audio_clka: audio_clka { 41 compatible = "fixed-clock"; 42 #clock-cells = <0>; 43 clock-frequency = <0>; 44 }; 45 audio_clkb: audio_clkb { 46 compatible = "fixed-clock"; 47 #clock-cells = <0>; 48 clock-frequency = <0>; 49 }; 50 audio_clkc: audio_clkc { 51 compatible = "fixed-clock"; 52 #clock-cells = <0>; 53 clock-frequency = <0>; 54 }; 55 56 /* External CAN clock */ 57 can_clk: can { 58 compatible = "fixed-clock"; 59 #clock-cells = <0>; 60 /* This value must be overridden by the board. */ 61 clock-frequency = <0>; 62 }; 63 64 cpus { 65 #address-cells = <1>; 66 #size-cells = <0>; 67 enable-method = "renesas,apmu"; 68 69 cpu0: cpu@0 { 70 device_type = "cpu"; 71 compatible = "arm,cortex-a7"; 72 reg = <0>; 73 clock-frequency = <1000000000>; 74 clocks = <&cpg CPG_CORE R8A7745_CLK_Z2>; 75 power-domains = <&sysc R8A7745_PD_CA7_CPU0>; 76 next-level-cache = <&L2_CA7>; 77 }; 78 79 cpu1: cpu@1 { 80 device_type = "cpu"; 81 compatible = "arm,cortex-a7"; 82 reg = <1>; 83 clock-frequency = <1000000000>; 84 clocks = <&cpg CPG_CORE R8A7745_CLK_Z2>; 85 power-domains = <&sysc R8A7745_PD_CA7_CPU1>; 86 next-level-cache = <&L2_CA7>; 87 }; 88 89 L2_CA7: cache-controller-0 { 90 compatible = "cache"; 91 cache-unified; 92 cache-level = <2>; 93 power-domains = <&sysc R8A7745_PD_CA7_SCU>; 94 }; 95 }; 96 97 /* External root clock */ 98 extal_clk: extal { 99 compatible = "fixed-clock"; 100 #clock-cells = <0>; 101 /* This value must be overridden by the board. */ 102 clock-frequency = <0>; 103 }; 104 105 pmu { 106 compatible = "arm,cortex-a7-pmu"; 107 interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 108 <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 109 interrupt-affinity = <&cpu0>, <&cpu1>; 110 }; 111 112 /* External SCIF clock */ 113 scif_clk: scif { 114 compatible = "fixed-clock"; 115 #clock-cells = <0>; 116 /* This value must be overridden by the board. */ 117 clock-frequency = <0>; 118 }; 119 120 soc { 121 compatible = "simple-bus"; 122 interrupt-parent = <&gic>; 123 124 #address-cells = <2>; 125 #size-cells = <2>; 126 ranges; 127 128 gpio0: gpio@e6050000 { 129 compatible = "renesas,gpio-r8a7745", 130 "renesas,rcar-gen2-gpio"; 131 reg = <0 0xe6050000 0 0x50>; 132 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 133 #gpio-cells = <2>; 134 gpio-controller; 135 gpio-ranges = <&pfc 0 0 32>; 136 #interrupt-cells = <2>; 137 interrupt-controller; 138 clocks = <&cpg CPG_MOD 912>; 139 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 140 resets = <&cpg 912>; 141 }; 142 143 gpio1: gpio@e6051000 { 144 compatible = "renesas,gpio-r8a7745", 145 "renesas,rcar-gen2-gpio"; 146 reg = <0 0xe6051000 0 0x50>; 147 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 148 #gpio-cells = <2>; 149 gpio-controller; 150 gpio-ranges = <&pfc 0 32 26>; 151 #interrupt-cells = <2>; 152 interrupt-controller; 153 clocks = <&cpg CPG_MOD 911>; 154 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 155 resets = <&cpg 911>; 156 }; 157 158 gpio2: gpio@e6052000 { 159 compatible = "renesas,gpio-r8a7745", 160 "renesas,rcar-gen2-gpio"; 161 reg = <0 0xe6052000 0 0x50>; 162 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 163 #gpio-cells = <2>; 164 gpio-controller; 165 gpio-ranges = <&pfc 0 64 32>; 166 #interrupt-cells = <2>; 167 interrupt-controller; 168 clocks = <&cpg CPG_MOD 910>; 169 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 170 resets = <&cpg 910>; 171 }; 172 173 gpio3: gpio@e6053000 { 174 compatible = "renesas,gpio-r8a7745", 175 "renesas,rcar-gen2-gpio"; 176 reg = <0 0xe6053000 0 0x50>; 177 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 178 #gpio-cells = <2>; 179 gpio-controller; 180 gpio-ranges = <&pfc 0 96 32>; 181 #interrupt-cells = <2>; 182 interrupt-controller; 183 clocks = <&cpg CPG_MOD 909>; 184 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 185 resets = <&cpg 909>; 186 }; 187 188 gpio4: gpio@e6054000 { 189 compatible = "renesas,gpio-r8a7745", 190 "renesas,rcar-gen2-gpio"; 191 reg = <0 0xe6054000 0 0x50>; 192 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 193 #gpio-cells = <2>; 194 gpio-controller; 195 gpio-ranges = <&pfc 0 128 32>; 196 #interrupt-cells = <2>; 197 interrupt-controller; 198 clocks = <&cpg CPG_MOD 908>; 199 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 200 resets = <&cpg 908>; 201 }; 202 203 gpio5: gpio@e6055000 { 204 compatible = "renesas,gpio-r8a7745", 205 "renesas,rcar-gen2-gpio"; 206 reg = <0 0xe6055000 0 0x50>; 207 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 208 #gpio-cells = <2>; 209 gpio-controller; 210 gpio-ranges = <&pfc 0 160 28>; 211 #interrupt-cells = <2>; 212 interrupt-controller; 213 clocks = <&cpg CPG_MOD 907>; 214 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 215 resets = <&cpg 907>; 216 }; 217 218 gpio6: gpio@e6055400 { 219 compatible = "renesas,gpio-r8a7745", 220 "renesas,rcar-gen2-gpio"; 221 reg = <0 0xe6055400 0 0x50>; 222 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 223 #gpio-cells = <2>; 224 gpio-controller; 225 gpio-ranges = <&pfc 0 192 26>; 226 #interrupt-cells = <2>; 227 interrupt-controller; 228 clocks = <&cpg CPG_MOD 905>; 229 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 230 resets = <&cpg 905>; 231 }; 232 233 pfc: pin-controller@e6060000 { 234 compatible = "renesas,pfc-r8a7745"; 235 reg = <0 0xe6060000 0 0x11c>; 236 }; 237 238 tpu: pwm@e60f0000 { 239 compatible = "renesas,tpu-r8a7745", "renesas,tpu"; 240 reg = <0 0xe60f0000 0 0x148>; 241 clocks = <&cpg CPG_MOD 304>; 242 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 243 resets = <&cpg 304>; 244 #pwm-cells = <3>; 245 status = "disabled"; 246 }; 247 248 cpg: clock-controller@e6150000 { 249 compatible = "renesas,r8a7745-cpg-mssr"; 250 reg = <0 0xe6150000 0 0x1000>; 251 clocks = <&extal_clk>, <&usb_extal_clk>; 252 clock-names = "extal", "usb_extal"; 253 #clock-cells = <2>; 254 #power-domain-cells = <0>; 255 #reset-cells = <1>; 256 }; 257 258 apmu@e6151000 { 259 compatible = "renesas,r8a7745-apmu", "renesas,apmu"; 260 reg = <0 0xe6151000 0 0x188>; 261 cpus = <&cpu0 &cpu1>; 262 }; 263 264 rst: reset-controller@e6160000 { 265 compatible = "renesas,r8a7745-rst"; 266 reg = <0 0xe6160000 0 0x100>; 267 }; 268 269 rwdt: watchdog@e6020000 { 270 compatible = "renesas,r8a7745-wdt", 271 "renesas,rcar-gen2-wdt"; 272 reg = <0 0xe6020000 0 0x0c>; 273 clocks = <&cpg CPG_MOD 402>; 274 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 275 resets = <&cpg 402>; 276 status = "disabled"; 277 }; 278 279 sysc: system-controller@e6180000 { 280 compatible = "renesas,r8a7745-sysc"; 281 reg = <0 0xe6180000 0 0x200>; 282 #power-domain-cells = <1>; 283 }; 284 285 irqc: interrupt-controller@e61c0000 { 286 compatible = "renesas,irqc-r8a7745", "renesas,irqc"; 287 #interrupt-cells = <2>; 288 interrupt-controller; 289 reg = <0 0xe61c0000 0 0x200>; 290 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 291 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 292 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 293 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 294 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 295 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 296 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 297 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, 298 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 299 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 300 clocks = <&cpg CPG_MOD 407>; 301 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 302 resets = <&cpg 407>; 303 }; 304 305 ipmmu_sy0: iommu@e6280000 { 306 compatible = "renesas,ipmmu-r8a7745", 307 "renesas,ipmmu-vmsa"; 308 reg = <0 0xe6280000 0 0x1000>; 309 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, 310 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; 311 #iommu-cells = <1>; 312 status = "disabled"; 313 }; 314 315 ipmmu_sy1: iommu@e6290000 { 316 compatible = "renesas,ipmmu-r8a7745", 317 "renesas,ipmmu-vmsa"; 318 reg = <0 0xe6290000 0 0x1000>; 319 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 320 #iommu-cells = <1>; 321 status = "disabled"; 322 }; 323 324 ipmmu_ds: iommu@e6740000 { 325 compatible = "renesas,ipmmu-r8a7745", 326 "renesas,ipmmu-vmsa"; 327 reg = <0 0xe6740000 0 0x1000>; 328 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, 329 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; 330 #iommu-cells = <1>; 331 status = "disabled"; 332 }; 333 334 ipmmu_mp: iommu@ec680000 { 335 compatible = "renesas,ipmmu-r8a7745", 336 "renesas,ipmmu-vmsa"; 337 reg = <0 0xec680000 0 0x1000>; 338 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; 339 #iommu-cells = <1>; 340 status = "disabled"; 341 }; 342 343 ipmmu_mx: iommu@fe951000 { 344 compatible = "renesas,ipmmu-r8a7745", 345 "renesas,ipmmu-vmsa"; 346 reg = <0 0xfe951000 0 0x1000>; 347 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, 348 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; 349 #iommu-cells = <1>; 350 status = "disabled"; 351 }; 352 353 ipmmu_gp: iommu@e62a0000 { 354 compatible = "renesas,ipmmu-r8a7745", 355 "renesas,ipmmu-vmsa"; 356 reg = <0 0xe62a0000 0 0x1000>; 357 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 358 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; 359 #iommu-cells = <1>; 360 status = "disabled"; 361 }; 362 363 icram0: sram@e63a0000 { 364 compatible = "mmio-sram"; 365 reg = <0 0xe63a0000 0 0x12000>; 366 }; 367 368 icram1: sram@e63c0000 { 369 compatible = "mmio-sram"; 370 reg = <0 0xe63c0000 0 0x1000>; 371 #address-cells = <1>; 372 #size-cells = <1>; 373 ranges = <0 0 0xe63c0000 0x1000>; 374 375 smp-sram@0 { 376 compatible = "renesas,smp-sram"; 377 reg = <0 0x100>; 378 }; 379 }; 380 381 icram2: sram@e6300000 { 382 compatible = "mmio-sram"; 383 reg = <0 0xe6300000 0 0x40000>; 384 }; 385 i2c0: i2c@e6508000 { 386 #address-cells = <1>; 387 #size-cells = <0>; 388 compatible = "renesas,i2c-r8a7745", 389 "renesas,rcar-gen2-i2c"; 390 reg = <0 0xe6508000 0 0x40>; 391 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 392 clocks = <&cpg CPG_MOD 931>; 393 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 394 resets = <&cpg 931>; 395 i2c-scl-internal-delay-ns = <6>; 396 status = "disabled"; 397 }; 398 399 i2c1: i2c@e6518000 { 400 #address-cells = <1>; 401 #size-cells = <0>; 402 compatible = "renesas,i2c-r8a7745", 403 "renesas,rcar-gen2-i2c"; 404 reg = <0 0xe6518000 0 0x40>; 405 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 406 clocks = <&cpg CPG_MOD 930>; 407 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 408 resets = <&cpg 930>; 409 i2c-scl-internal-delay-ns = <6>; 410 status = "disabled"; 411 }; 412 413 i2c2: i2c@e6530000 { 414 #address-cells = <1>; 415 #size-cells = <0>; 416 compatible = "renesas,i2c-r8a7745", 417 "renesas,rcar-gen2-i2c"; 418 reg = <0 0xe6530000 0 0x40>; 419 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 420 clocks = <&cpg CPG_MOD 929>; 421 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 422 resets = <&cpg 929>; 423 i2c-scl-internal-delay-ns = <6>; 424 status = "disabled"; 425 }; 426 427 i2c3: i2c@e6540000 { 428 #address-cells = <1>; 429 #size-cells = <0>; 430 compatible = "renesas,i2c-r8a7745", 431 "renesas,rcar-gen2-i2c"; 432 reg = <0 0xe6540000 0 0x40>; 433 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 434 clocks = <&cpg CPG_MOD 928>; 435 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 436 resets = <&cpg 928>; 437 i2c-scl-internal-delay-ns = <6>; 438 status = "disabled"; 439 }; 440 441 i2c4: i2c@e6520000 { 442 #address-cells = <1>; 443 #size-cells = <0>; 444 compatible = "renesas,i2c-r8a7745", 445 "renesas,rcar-gen2-i2c"; 446 reg = <0 0xe6520000 0 0x40>; 447 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 448 clocks = <&cpg CPG_MOD 927>; 449 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 450 resets = <&cpg 927>; 451 i2c-scl-internal-delay-ns = <6>; 452 status = "disabled"; 453 }; 454 455 i2c5: i2c@e6528000 { 456 #address-cells = <1>; 457 #size-cells = <0>; 458 compatible = "renesas,i2c-r8a7745", 459 "renesas,rcar-gen2-i2c"; 460 reg = <0 0xe6528000 0 0x40>; 461 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 462 clocks = <&cpg CPG_MOD 925>; 463 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 464 resets = <&cpg 925>; 465 i2c-scl-internal-delay-ns = <6>; 466 status = "disabled"; 467 }; 468 469 iic0: i2c@e6500000 { 470 #address-cells = <1>; 471 #size-cells = <0>; 472 compatible = "renesas,iic-r8a7745", 473 "renesas,rcar-gen2-iic", 474 "renesas,rmobile-iic"; 475 reg = <0 0xe6500000 0 0x425>; 476 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 477 clocks = <&cpg CPG_MOD 318>; 478 dmas = <&dmac0 0x61>, <&dmac0 0x62>, 479 <&dmac1 0x61>, <&dmac1 0x62>; 480 dma-names = "tx", "rx", "tx", "rx"; 481 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 482 resets = <&cpg 318>; 483 status = "disabled"; 484 }; 485 486 iic1: i2c@e6510000 { 487 #address-cells = <1>; 488 #size-cells = <0>; 489 compatible = "renesas,iic-r8a7745", 490 "renesas,rcar-gen2-iic", 491 "renesas,rmobile-iic"; 492 reg = <0 0xe6510000 0 0x425>; 493 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 494 clocks = <&cpg CPG_MOD 323>; 495 dmas = <&dmac0 0x65>, <&dmac0 0x66>, 496 <&dmac1 0x65>, <&dmac1 0x66>; 497 dma-names = "tx", "rx", "tx", "rx"; 498 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 499 resets = <&cpg 323>; 500 status = "disabled"; 501 }; 502 503 hsusb: usb@e6590000 { 504 compatible = "renesas,usbhs-r8a7745", 505 "renesas,rcar-gen2-usbhs"; 506 reg = <0 0xe6590000 0 0x100>; 507 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 508 clocks = <&cpg CPG_MOD 704>; 509 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 510 <&usb_dmac1 0>, <&usb_dmac1 1>; 511 dma-names = "ch0", "ch1", "ch2", "ch3"; 512 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 513 resets = <&cpg 704>; 514 renesas,buswait = <4>; 515 phys = <&usb0 1>; 516 phy-names = "usb"; 517 status = "disabled"; 518 }; 519 520 usbphy: usb-phy@e6590100 { 521 compatible = "renesas,usb-phy-r8a7745", 522 "renesas,rcar-gen2-usb-phy"; 523 reg = <0 0xe6590100 0 0x100>; 524 #address-cells = <1>; 525 #size-cells = <0>; 526 clocks = <&cpg CPG_MOD 704>; 527 clock-names = "usbhs"; 528 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 529 resets = <&cpg 704>; 530 status = "disabled"; 531 532 usb0: usb-channel@0 { 533 reg = <0>; 534 #phy-cells = <1>; 535 }; 536 usb2: usb-channel@2 { 537 reg = <2>; 538 #phy-cells = <1>; 539 }; 540 }; 541 542 usb_dmac0: dma-controller@e65a0000 { 543 compatible = "renesas,r8a7745-usb-dmac", 544 "renesas,usb-dmac"; 545 reg = <0 0xe65a0000 0 0x100>; 546 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 547 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 548 interrupt-names = "ch0", "ch1"; 549 clocks = <&cpg CPG_MOD 330>; 550 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 551 resets = <&cpg 330>; 552 #dma-cells = <1>; 553 dma-channels = <2>; 554 }; 555 556 usb_dmac1: dma-controller@e65b0000 { 557 compatible = "renesas,r8a7745-usb-dmac", 558 "renesas,usb-dmac"; 559 reg = <0 0xe65b0000 0 0x100>; 560 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 561 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 562 interrupt-names = "ch0", "ch1"; 563 clocks = <&cpg CPG_MOD 331>; 564 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 565 resets = <&cpg 331>; 566 #dma-cells = <1>; 567 dma-channels = <2>; 568 }; 569 570 dmac0: dma-controller@e6700000 { 571 compatible = "renesas,dmac-r8a7745", 572 "renesas,rcar-dmac"; 573 reg = <0 0xe6700000 0 0x20000>; 574 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH 575 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 576 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH 577 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 578 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 579 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 580 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 581 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 582 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 583 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 584 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 585 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH 586 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH 587 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 588 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH 589 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; 590 interrupt-names = "error", 591 "ch0", "ch1", "ch2", "ch3", 592 "ch4", "ch5", "ch6", "ch7", 593 "ch8", "ch9", "ch10", "ch11", 594 "ch12", "ch13", "ch14"; 595 clocks = <&cpg CPG_MOD 219>; 596 clock-names = "fck"; 597 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 598 resets = <&cpg 219>; 599 #dma-cells = <1>; 600 dma-channels = <15>; 601 }; 602 603 dmac1: dma-controller@e6720000 { 604 compatible = "renesas,dmac-r8a7745", 605 "renesas,rcar-dmac"; 606 reg = <0 0xe6720000 0 0x20000>; 607 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 608 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 609 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH 610 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 611 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 612 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 613 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 614 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH 615 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 616 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 617 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 618 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 619 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 620 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 621 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 622 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; 623 interrupt-names = "error", 624 "ch0", "ch1", "ch2", "ch3", 625 "ch4", "ch5", "ch6", "ch7", 626 "ch8", "ch9", "ch10", "ch11", 627 "ch12", "ch13", "ch14"; 628 clocks = <&cpg CPG_MOD 218>; 629 clock-names = "fck"; 630 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 631 resets = <&cpg 218>; 632 #dma-cells = <1>; 633 dma-channels = <15>; 634 }; 635 636 avb: ethernet@e6800000 { 637 compatible = "renesas,etheravb-r8a7745", 638 "renesas,etheravb-rcar-gen2"; 639 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; 640 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; 641 clocks = <&cpg CPG_MOD 812>; 642 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 643 resets = <&cpg 812>; 644 #address-cells = <1>; 645 #size-cells = <0>; 646 status = "disabled"; 647 }; 648 649 qspi: spi@e6b10000 { 650 compatible = "renesas,qspi-r8a7745", "renesas,qspi"; 651 reg = <0 0xe6b10000 0 0x2c>; 652 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 653 clocks = <&cpg CPG_MOD 917>; 654 dmas = <&dmac0 0x17>, <&dmac0 0x18>, 655 <&dmac1 0x17>, <&dmac1 0x18>; 656 dma-names = "tx", "rx", "tx", "rx"; 657 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 658 num-cs = <1>; 659 #address-cells = <1>; 660 #size-cells = <0>; 661 resets = <&cpg 917>; 662 status = "disabled"; 663 }; 664 665 scifa0: serial@e6c40000 { 666 compatible = "renesas,scifa-r8a7745", 667 "renesas,rcar-gen2-scifa", "renesas,scifa"; 668 reg = <0 0xe6c40000 0 0x40>; 669 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 670 clocks = <&cpg CPG_MOD 204>; 671 clock-names = "fck"; 672 dmas = <&dmac0 0x21>, <&dmac0 0x22>, 673 <&dmac1 0x21>, <&dmac1 0x22>; 674 dma-names = "tx", "rx", "tx", "rx"; 675 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 676 resets = <&cpg 204>; 677 status = "disabled"; 678 }; 679 680 scifa1: serial@e6c50000 { 681 compatible = "renesas,scifa-r8a7745", 682 "renesas,rcar-gen2-scifa", "renesas,scifa"; 683 reg = <0 0xe6c50000 0 0x40>; 684 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 685 clocks = <&cpg CPG_MOD 203>; 686 clock-names = "fck"; 687 dmas = <&dmac0 0x25>, <&dmac0 0x26>, 688 <&dmac1 0x25>, <&dmac1 0x26>; 689 dma-names = "tx", "rx", "tx", "rx"; 690 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 691 resets = <&cpg 203>; 692 status = "disabled"; 693 }; 694 695 scifa2: serial@e6c60000 { 696 compatible = "renesas,scifa-r8a7745", 697 "renesas,rcar-gen2-scifa", "renesas,scifa"; 698 reg = <0 0xe6c60000 0 0x40>; 699 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; 700 clocks = <&cpg CPG_MOD 202>; 701 clock-names = "fck"; 702 dmas = <&dmac0 0x27>, <&dmac0 0x28>, 703 <&dmac1 0x27>, <&dmac1 0x28>; 704 dma-names = "tx", "rx", "tx", "rx"; 705 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 706 resets = <&cpg 202>; 707 status = "disabled"; 708 }; 709 710 scifa3: serial@e6c70000 { 711 compatible = "renesas,scifa-r8a7745", 712 "renesas,rcar-gen2-scifa", "renesas,scifa"; 713 reg = <0 0xe6c70000 0 0x40>; 714 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 715 clocks = <&cpg CPG_MOD 1106>; 716 clock-names = "fck"; 717 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>, 718 <&dmac1 0x1b>, <&dmac1 0x1c>; 719 dma-names = "tx", "rx", "tx", "rx"; 720 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 721 resets = <&cpg 1106>; 722 status = "disabled"; 723 }; 724 725 scifa4: serial@e6c78000 { 726 compatible = "renesas,scifa-r8a7745", 727 "renesas,rcar-gen2-scifa", "renesas,scifa"; 728 reg = <0 0xe6c78000 0 0x40>; 729 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 730 clocks = <&cpg CPG_MOD 1107>; 731 clock-names = "fck"; 732 dmas = <&dmac0 0x1f>, <&dmac0 0x20>, 733 <&dmac1 0x1f>, <&dmac1 0x20>; 734 dma-names = "tx", "rx", "tx", "rx"; 735 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 736 resets = <&cpg 1107>; 737 status = "disabled"; 738 }; 739 740 scifa5: serial@e6c80000 { 741 compatible = "renesas,scifa-r8a7745", 742 "renesas,rcar-gen2-scifa", "renesas,scifa"; 743 reg = <0 0xe6c80000 0 0x40>; 744 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 745 clocks = <&cpg CPG_MOD 1108>; 746 clock-names = "fck"; 747 dmas = <&dmac0 0x23>, <&dmac0 0x24>, 748 <&dmac1 0x23>, <&dmac1 0x24>; 749 dma-names = "tx", "rx", "tx", "rx"; 750 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 751 resets = <&cpg 1108>; 752 status = "disabled"; 753 }; 754 755 scifb0: serial@e6c20000 { 756 compatible = "renesas,scifb-r8a7745", 757 "renesas,rcar-gen2-scifb", "renesas,scifb"; 758 reg = <0 0xe6c20000 0 0x100>; 759 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 760 clocks = <&cpg CPG_MOD 206>; 761 clock-names = "fck"; 762 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, 763 <&dmac1 0x3d>, <&dmac1 0x3e>; 764 dma-names = "tx", "rx", "tx", "rx"; 765 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 766 resets = <&cpg 206>; 767 status = "disabled"; 768 }; 769 770 scifb1: serial@e6c30000 { 771 compatible = "renesas,scifb-r8a7745", 772 "renesas,rcar-gen2-scifb", "renesas,scifb"; 773 reg = <0 0xe6c30000 0 0x100>; 774 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; 775 clocks = <&cpg CPG_MOD 207>; 776 clock-names = "fck"; 777 dmas = <&dmac0 0x19>, <&dmac0 0x1a>, 778 <&dmac1 0x19>, <&dmac1 0x1a>; 779 dma-names = "tx", "rx", "tx", "rx"; 780 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 781 resets = <&cpg 207>; 782 status = "disabled"; 783 }; 784 785 scifb2: serial@e6ce0000 { 786 compatible = "renesas,scifb-r8a7745", 787 "renesas,rcar-gen2-scifb", "renesas,scifb"; 788 reg = <0 0xe6ce0000 0 0x100>; 789 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 790 clocks = <&cpg CPG_MOD 216>; 791 clock-names = "fck"; 792 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, 793 <&dmac1 0x1d>, <&dmac1 0x1e>; 794 dma-names = "tx", "rx", "tx", "rx"; 795 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 796 resets = <&cpg 216>; 797 status = "disabled"; 798 }; 799 800 scif0: serial@e6e60000 { 801 compatible = "renesas,scif-r8a7745", 802 "renesas,rcar-gen2-scif", "renesas,scif"; 803 reg = <0 0xe6e60000 0 0x40>; 804 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 805 clocks = <&cpg CPG_MOD 721>, 806 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 807 clock-names = "fck", "brg_int", "scif_clk"; 808 dmas = <&dmac0 0x29>, <&dmac0 0x2a>, 809 <&dmac1 0x29>, <&dmac1 0x2a>; 810 dma-names = "tx", "rx", "tx", "rx"; 811 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 812 resets = <&cpg 721>; 813 status = "disabled"; 814 }; 815 816 scif1: serial@e6e68000 { 817 compatible = "renesas,scif-r8a7745", 818 "renesas,rcar-gen2-scif", "renesas,scif"; 819 reg = <0 0xe6e68000 0 0x40>; 820 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 821 clocks = <&cpg CPG_MOD 720>, 822 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 823 clock-names = "fck", "brg_int", "scif_clk"; 824 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, 825 <&dmac1 0x2d>, <&dmac1 0x2e>; 826 dma-names = "tx", "rx", "tx", "rx"; 827 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 828 resets = <&cpg 720>; 829 status = "disabled"; 830 }; 831 832 scif2: serial@e6e58000 { 833 compatible = "renesas,scif-r8a7745", 834 "renesas,rcar-gen2-scif", "renesas,scif"; 835 reg = <0 0xe6e58000 0 0x40>; 836 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 837 clocks = <&cpg CPG_MOD 719>, 838 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 839 clock-names = "fck", "brg_int", "scif_clk"; 840 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, 841 <&dmac1 0x2b>, <&dmac1 0x2c>; 842 dma-names = "tx", "rx", "tx", "rx"; 843 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 844 resets = <&cpg 719>; 845 status = "disabled"; 846 }; 847 848 scif3: serial@e6ea8000 { 849 compatible = "renesas,scif-r8a7745", 850 "renesas,rcar-gen2-scif", "renesas,scif"; 851 reg = <0 0xe6ea8000 0 0x40>; 852 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 853 clocks = <&cpg CPG_MOD 718>, 854 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 855 clock-names = "fck", "brg_int", "scif_clk"; 856 dmas = <&dmac0 0x2f>, <&dmac0 0x30>, 857 <&dmac1 0x2f>, <&dmac1 0x30>; 858 dma-names = "tx", "rx", "tx", "rx"; 859 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 860 resets = <&cpg 718>; 861 status = "disabled"; 862 }; 863 864 scif4: serial@e6ee0000 { 865 compatible = "renesas,scif-r8a7745", 866 "renesas,rcar-gen2-scif", "renesas,scif"; 867 reg = <0 0xe6ee0000 0 0x40>; 868 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 869 clocks = <&cpg CPG_MOD 715>, 870 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 871 clock-names = "fck", "brg_int", "scif_clk"; 872 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>, 873 <&dmac1 0xfb>, <&dmac1 0xfc>; 874 dma-names = "tx", "rx", "tx", "rx"; 875 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 876 resets = <&cpg 715>; 877 status = "disabled"; 878 }; 879 880 scif5: serial@e6ee8000 { 881 compatible = "renesas,scif-r8a7745", 882 "renesas,rcar-gen2-scif", "renesas,scif"; 883 reg = <0 0xe6ee8000 0 0x40>; 884 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 885 clocks = <&cpg CPG_MOD 714>, 886 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 887 clock-names = "fck", "brg_int", "scif_clk"; 888 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>, 889 <&dmac1 0xfd>, <&dmac1 0xfe>; 890 dma-names = "tx", "rx", "tx", "rx"; 891 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 892 resets = <&cpg 714>; 893 status = "disabled"; 894 }; 895 896 hscif0: serial@e62c0000 { 897 compatible = "renesas,hscif-r8a7745", 898 "renesas,rcar-gen2-hscif", "renesas,hscif"; 899 reg = <0 0xe62c0000 0 0x60>; 900 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 901 clocks = <&cpg CPG_MOD 717>, 902 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 903 clock-names = "fck", "brg_int", "scif_clk"; 904 dmas = <&dmac0 0x39>, <&dmac0 0x3a>, 905 <&dmac1 0x39>, <&dmac1 0x3a>; 906 dma-names = "tx", "rx", "tx", "rx"; 907 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 908 resets = <&cpg 717>; 909 status = "disabled"; 910 }; 911 912 hscif1: serial@e62c8000 { 913 compatible = "renesas,hscif-r8a7745", 914 "renesas,rcar-gen2-hscif", "renesas,hscif"; 915 reg = <0 0xe62c8000 0 0x60>; 916 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 917 clocks = <&cpg CPG_MOD 716>, 918 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 919 clock-names = "fck", "brg_int", "scif_clk"; 920 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, 921 <&dmac1 0x4d>, <&dmac1 0x4e>; 922 dma-names = "tx", "rx", "tx", "rx"; 923 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 924 resets = <&cpg 716>; 925 status = "disabled"; 926 }; 927 928 hscif2: serial@e62d0000 { 929 compatible = "renesas,hscif-r8a7745", 930 "renesas,rcar-gen2-hscif", "renesas,hscif"; 931 reg = <0 0xe62d0000 0 0x60>; 932 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 933 clocks = <&cpg CPG_MOD 713>, 934 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 935 clock-names = "fck", "brg_int", "scif_clk"; 936 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, 937 <&dmac1 0x3b>, <&dmac1 0x3c>; 938 dma-names = "tx", "rx", "tx", "rx"; 939 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 940 resets = <&cpg 713>; 941 status = "disabled"; 942 }; 943 944 msiof0: spi@e6e20000 { 945 compatible = "renesas,msiof-r8a7745", 946 "renesas,rcar-gen2-msiof"; 947 reg = <0 0xe6e20000 0 0x0064>; 948 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 949 clocks = <&cpg CPG_MOD 000>; 950 dmas = <&dmac0 0x51>, <&dmac0 0x52>, 951 <&dmac1 0x51>, <&dmac1 0x52>; 952 dma-names = "tx", "rx", "tx", "rx"; 953 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 954 #address-cells = <1>; 955 #size-cells = <0>; 956 resets = <&cpg 000>; 957 status = "disabled"; 958 }; 959 960 msiof1: spi@e6e10000 { 961 compatible = "renesas,msiof-r8a7745", 962 "renesas,rcar-gen2-msiof"; 963 reg = <0 0xe6e10000 0 0x0064>; 964 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 965 clocks = <&cpg CPG_MOD 208>; 966 dmas = <&dmac0 0x55>, <&dmac0 0x56>, 967 <&dmac1 0x55>, <&dmac1 0x56>; 968 dma-names = "tx", "rx", "tx", "rx"; 969 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 970 #address-cells = <1>; 971 #size-cells = <0>; 972 resets = <&cpg 208>; 973 status = "disabled"; 974 }; 975 976 msiof2: spi@e6e00000 { 977 compatible = "renesas,msiof-r8a7745", 978 "renesas,rcar-gen2-msiof"; 979 reg = <0 0xe6e00000 0 0x0064>; 980 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 981 clocks = <&cpg CPG_MOD 205>; 982 dmas = <&dmac0 0x41>, <&dmac0 0x42>, 983 <&dmac1 0x41>, <&dmac1 0x42>; 984 dma-names = "tx", "rx", "tx", "rx"; 985 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 986 #address-cells = <1>; 987 #size-cells = <0>; 988 resets = <&cpg 205>; 989 status = "disabled"; 990 }; 991 992 pwm0: pwm@e6e30000 { 993 compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; 994 reg = <0 0xe6e30000 0 0x8>; 995 clocks = <&cpg CPG_MOD 523>; 996 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 997 resets = <&cpg 523>; 998 #pwm-cells = <2>; 999 status = "disabled"; 1000 }; 1001 1002 pwm1: pwm@e6e31000 { 1003 compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; 1004 reg = <0 0xe6e31000 0 0x8>; 1005 clocks = <&cpg CPG_MOD 523>; 1006 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1007 resets = <&cpg 523>; 1008 #pwm-cells = <2>; 1009 status = "disabled"; 1010 }; 1011 1012 pwm2: pwm@e6e32000 { 1013 compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; 1014 reg = <0 0xe6e32000 0 0x8>; 1015 clocks = <&cpg CPG_MOD 523>; 1016 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1017 resets = <&cpg 523>; 1018 #pwm-cells = <2>; 1019 status = "disabled"; 1020 }; 1021 1022 pwm3: pwm@e6e33000 { 1023 compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; 1024 reg = <0 0xe6e33000 0 0x8>; 1025 clocks = <&cpg CPG_MOD 523>; 1026 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1027 resets = <&cpg 523>; 1028 #pwm-cells = <2>; 1029 status = "disabled"; 1030 }; 1031 1032 pwm4: pwm@e6e34000 { 1033 compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; 1034 reg = <0 0xe6e34000 0 0x8>; 1035 clocks = <&cpg CPG_MOD 523>; 1036 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1037 resets = <&cpg 523>; 1038 #pwm-cells = <2>; 1039 status = "disabled"; 1040 }; 1041 1042 pwm5: pwm@e6e35000 { 1043 compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; 1044 reg = <0 0xe6e35000 0 0x8>; 1045 clocks = <&cpg CPG_MOD 523>; 1046 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1047 resets = <&cpg 523>; 1048 #pwm-cells = <2>; 1049 status = "disabled"; 1050 }; 1051 1052 pwm6: pwm@e6e36000 { 1053 compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; 1054 reg = <0 0xe6e36000 0 0x8>; 1055 clocks = <&cpg CPG_MOD 523>; 1056 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1057 resets = <&cpg 523>; 1058 #pwm-cells = <2>; 1059 status = "disabled"; 1060 }; 1061 1062 can0: can@e6e80000 { 1063 compatible = "renesas,can-r8a7745", 1064 "renesas,rcar-gen2-can"; 1065 reg = <0 0xe6e80000 0 0x1000>; 1066 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1067 clocks = <&cpg CPG_MOD 916>, 1068 <&cpg CPG_CORE R8A7745_CLK_RCAN>, 1069 <&can_clk>; 1070 clock-names = "clkp1", "clkp2", "can_clk"; 1071 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1072 resets = <&cpg 916>; 1073 status = "disabled"; 1074 }; 1075 1076 can1: can@e6e88000 { 1077 compatible = "renesas,can-r8a7745", 1078 "renesas,rcar-gen2-can"; 1079 reg = <0 0xe6e88000 0 0x1000>; 1080 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1081 clocks = <&cpg CPG_MOD 915>, 1082 <&cpg CPG_CORE R8A7745_CLK_RCAN>, 1083 <&can_clk>; 1084 clock-names = "clkp1", "clkp2", "can_clk"; 1085 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1086 resets = <&cpg 915>; 1087 status = "disabled"; 1088 }; 1089 1090 vin0: video@e6ef0000 { 1091 compatible = "renesas,vin-r8a7745", 1092 "renesas,rcar-gen2-vin"; 1093 reg = <0 0xe6ef0000 0 0x1000>; 1094 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1095 clocks = <&cpg CPG_MOD 811>; 1096 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1097 resets = <&cpg 811>; 1098 status = "disabled"; 1099 }; 1100 1101 vin1: video@e6ef1000 { 1102 compatible = "renesas,vin-r8a7745", 1103 "renesas,rcar-gen2-vin"; 1104 reg = <0 0xe6ef1000 0 0x1000>; 1105 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1106 clocks = <&cpg CPG_MOD 810>; 1107 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1108 resets = <&cpg 810>; 1109 status = "disabled"; 1110 }; 1111 1112 rcar_sound: sound@ec500000 { 1113 /* 1114 * #sound-dai-cells is required 1115 * 1116 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1117 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1118 */ 1119 compatible = "renesas,rcar_sound-r8a7745", 1120 "renesas,rcar_sound-gen2"; 1121 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1122 <0 0xec5a0000 0 0x100>, /* ADG */ 1123 <0 0xec540000 0 0x1000>, /* SSIU */ 1124 <0 0xec541000 0 0x280>, /* SSI */ 1125 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */ 1126 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1127 1128 clocks = <&cpg CPG_MOD 1005>, 1129 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1130 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1131 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1132 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1133 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1134 <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>, 1135 <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>, 1136 <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>, 1137 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 1138 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 1139 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1140 <&audio_clka>, <&audio_clkb>, <&audio_clkc>, 1141 <&cpg CPG_CORE R8A7745_CLK_M2>; 1142 clock-names = "ssi-all", 1143 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1144 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1145 "ssi.1", "ssi.0", 1146 "src.6", "src.5", "src.4", "src.3", 1147 "src.2", "src.1", 1148 "ctu.0", "ctu.1", 1149 "mix.0", "mix.1", 1150 "dvc.0", "dvc.1", 1151 "clk_a", "clk_b", "clk_c", "clk_i"; 1152 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1153 resets = <&cpg 1005>, 1154 <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, 1155 <&cpg 1009>, <&cpg 1010>, <&cpg 1011>, 1156 <&cpg 1012>, <&cpg 1013>, <&cpg 1014>, 1157 <&cpg 1015>; 1158 reset-names = "ssi-all", 1159 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1160 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1161 "ssi.1", "ssi.0"; 1162 1163 status = "disabled"; 1164 1165 rcar_sound,dvc { 1166 dvc0: dvc-0 { 1167 dmas = <&audma0 0xbc>; 1168 dma-names = "tx"; 1169 }; 1170 dvc1: dvc-1 { 1171 dmas = <&audma0 0xbe>; 1172 dma-names = "tx"; 1173 }; 1174 }; 1175 1176 rcar_sound,mix { 1177 mix0: mix-0 { }; 1178 mix1: mix-1 { }; 1179 }; 1180 1181 rcar_sound,ctu { 1182 ctu00: ctu-0 { }; 1183 ctu01: ctu-1 { }; 1184 ctu02: ctu-2 { }; 1185 ctu03: ctu-3 { }; 1186 ctu10: ctu-4 { }; 1187 ctu11: ctu-5 { }; 1188 ctu12: ctu-6 { }; 1189 ctu13: ctu-7 { }; 1190 }; 1191 1192 rcar_sound,src { 1193 src-0 { 1194 status = "disabled"; 1195 }; 1196 src1: src-1 { 1197 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1198 dmas = <&audma0 0x87>, <&audma0 0x9c>; 1199 dma-names = "rx", "tx"; 1200 }; 1201 src2: src-2 { 1202 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1203 dmas = <&audma0 0x89>, <&audma0 0x9e>; 1204 dma-names = "rx", "tx"; 1205 }; 1206 src3: src-3 { 1207 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1208 dmas = <&audma0 0x8b>, <&audma0 0xa0>; 1209 dma-names = "rx", "tx"; 1210 }; 1211 src4: src-4 { 1212 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1213 dmas = <&audma0 0x8d>, <&audma0 0xb0>; 1214 dma-names = "rx", "tx"; 1215 }; 1216 src5: src-5 { 1217 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1218 dmas = <&audma0 0x8f>, <&audma0 0xb2>; 1219 dma-names = "rx", "tx"; 1220 }; 1221 src6: src-6 { 1222 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1223 dmas = <&audma0 0x91>, <&audma0 0xb4>; 1224 dma-names = "rx", "tx"; 1225 }; 1226 }; 1227 1228 rcar_sound,ssi { 1229 ssi0: ssi-0 { 1230 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1231 dmas = <&audma0 0x01>, <&audma0 0x02>, 1232 <&audma0 0x15>, <&audma0 0x16>; 1233 dma-names = "rx", "tx", "rxu", "txu"; 1234 }; 1235 ssi1: ssi-1 { 1236 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1237 dmas = <&audma0 0x03>, <&audma0 0x04>, 1238 <&audma0 0x49>, <&audma0 0x4a>; 1239 dma-names = "rx", "tx", "rxu", "txu"; 1240 }; 1241 ssi2: ssi-2 { 1242 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1243 dmas = <&audma0 0x05>, <&audma0 0x06>, 1244 <&audma0 0x63>, <&audma0 0x64>; 1245 dma-names = "rx", "tx", "rxu", "txu"; 1246 }; 1247 ssi3: ssi-3 { 1248 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1249 dmas = <&audma0 0x07>, <&audma0 0x08>, 1250 <&audma0 0x6f>, <&audma0 0x70>; 1251 dma-names = "rx", "tx", "rxu", "txu"; 1252 }; 1253 ssi4: ssi-4 { 1254 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1255 dmas = <&audma0 0x09>, <&audma0 0x0a>, 1256 <&audma0 0x71>, <&audma0 0x72>; 1257 dma-names = "rx", "tx", "rxu", "txu"; 1258 }; 1259 ssi5: ssi-5 { 1260 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1261 dmas = <&audma0 0x0b>, <&audma0 0x0c>, 1262 <&audma0 0x73>, <&audma0 0x74>; 1263 dma-names = "rx", "tx", "rxu", "txu"; 1264 }; 1265 ssi6: ssi-6 { 1266 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1267 dmas = <&audma0 0x0d>, <&audma0 0x0e>, 1268 <&audma0 0x75>, <&audma0 0x76>; 1269 dma-names = "rx", "tx", "rxu", "txu"; 1270 }; 1271 ssi7: ssi-7 { 1272 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1273 dmas = <&audma0 0x0f>, <&audma0 0x10>, 1274 <&audma0 0x79>, <&audma0 0x7a>; 1275 dma-names = "rx", "tx", "rxu", "txu"; 1276 }; 1277 ssi8: ssi-8 { 1278 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1279 dmas = <&audma0 0x11>, <&audma0 0x12>, 1280 <&audma0 0x7b>, <&audma0 0x7c>; 1281 dma-names = "rx", "tx", "rxu", "txu"; 1282 }; 1283 ssi9: ssi-9 { 1284 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1285 dmas = <&audma0 0x13>, <&audma0 0x14>, 1286 <&audma0 0x7d>, <&audma0 0x7e>; 1287 dma-names = "rx", "tx", "rxu", "txu"; 1288 }; 1289 }; 1290 }; 1291 1292 audma0: dma-controller@ec700000 { 1293 compatible = "renesas,dmac-r8a7745", 1294 "renesas,rcar-dmac"; 1295 reg = <0 0xec700000 0 0x10000>; 1296 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH 1297 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH 1298 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH 1299 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH 1300 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH 1301 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH 1302 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH 1303 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH 1304 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH 1305 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH 1306 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH 1307 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH 1308 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH 1309 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; 1310 interrupt-names = "error", 1311 "ch0", "ch1", "ch2", "ch3", 1312 "ch4", "ch5", "ch6", "ch7", 1313 "ch8", "ch9", "ch10", "ch11", 1314 "ch12"; 1315 clocks = <&cpg CPG_MOD 502>; 1316 clock-names = "fck"; 1317 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1318 resets = <&cpg 502>; 1319 #dma-cells = <1>; 1320 dma-channels = <13>; 1321 }; 1322 1323 pci0: pci@ee090000 { 1324 compatible = "renesas,pci-r8a7745", 1325 "renesas,pci-rcar-gen2"; 1326 device_type = "pci"; 1327 reg = <0 0xee090000 0 0xc00>, 1328 <0 0xee080000 0 0x1100>; 1329 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1330 clocks = <&cpg CPG_MOD 703>; 1331 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1332 resets = <&cpg 703>; 1333 status = "disabled"; 1334 1335 bus-range = <0 0>; 1336 #address-cells = <3>; 1337 #size-cells = <2>; 1338 #interrupt-cells = <1>; 1339 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; 1340 interrupt-map-mask = <0xff00 0 0 0x7>; 1341 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 1342 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 1343 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1344 1345 usb@1,0 { 1346 reg = <0x800 0 0 0 0>; 1347 phys = <&usb0 0>; 1348 phy-names = "usb"; 1349 }; 1350 1351 usb@2,0 { 1352 reg = <0x1000 0 0 0 0>; 1353 phys = <&usb0 0>; 1354 phy-names = "usb"; 1355 }; 1356 }; 1357 1358 pci1: pci@ee0d0000 { 1359 compatible = "renesas,pci-r8a7745", 1360 "renesas,pci-rcar-gen2"; 1361 device_type = "pci"; 1362 reg = <0 0xee0d0000 0 0xc00>, 1363 <0 0xee0c0000 0 0x1100>; 1364 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1365 clocks = <&cpg CPG_MOD 703>; 1366 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1367 resets = <&cpg 703>; 1368 status = "disabled"; 1369 1370 bus-range = <1 1>; 1371 #address-cells = <3>; 1372 #size-cells = <2>; 1373 #interrupt-cells = <1>; 1374 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; 1375 interrupt-map-mask = <0xff00 0 0 0x7>; 1376 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 1377 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 1378 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1379 1380 usb@1,0 { 1381 reg = <0x10800 0 0 0 0>; 1382 phys = <&usb2 0>; 1383 phy-names = "usb"; 1384 }; 1385 1386 usb@2,0 { 1387 reg = <0x11000 0 0 0 0>; 1388 phys = <&usb2 0>; 1389 phy-names = "usb"; 1390 }; 1391 }; 1392 1393 sdhi0: sd@ee100000 { 1394 compatible = "renesas,sdhi-r8a7745", 1395 "renesas,rcar-gen2-sdhi"; 1396 reg = <0 0xee100000 0 0x328>; 1397 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1398 clocks = <&cpg CPG_MOD 314>; 1399 dmas = <&dmac0 0xcd>, <&dmac0 0xce>, 1400 <&dmac1 0xcd>, <&dmac1 0xce>; 1401 dma-names = "tx", "rx", "tx", "rx"; 1402 max-frequency = <195000000>; 1403 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1404 resets = <&cpg 314>; 1405 status = "disabled"; 1406 }; 1407 1408 sdhi1: sd@ee140000 { 1409 compatible = "renesas,sdhi-r8a7745", 1410 "renesas,rcar-gen2-sdhi"; 1411 reg = <0 0xee140000 0 0x100>; 1412 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1413 clocks = <&cpg CPG_MOD 312>; 1414 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, 1415 <&dmac1 0xc1>, <&dmac1 0xc2>; 1416 dma-names = "tx", "rx", "tx", "rx"; 1417 max-frequency = <97500000>; 1418 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1419 resets = <&cpg 312>; 1420 status = "disabled"; 1421 }; 1422 1423 sdhi2: sd@ee160000 { 1424 compatible = "renesas,sdhi-r8a7745", 1425 "renesas,rcar-gen2-sdhi"; 1426 reg = <0 0xee160000 0 0x100>; 1427 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1428 clocks = <&cpg CPG_MOD 311>; 1429 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, 1430 <&dmac1 0xd3>, <&dmac1 0xd4>; 1431 dma-names = "tx", "rx", "tx", "rx"; 1432 max-frequency = <97500000>; 1433 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1434 resets = <&cpg 311>; 1435 status = "disabled"; 1436 }; 1437 1438 mmcif0: mmc@ee200000 { 1439 compatible = "renesas,mmcif-r8a7745", 1440 "renesas,sh-mmcif"; 1441 reg = <0 0xee200000 0 0x80>; 1442 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 1443 clocks = <&cpg CPG_MOD 315>; 1444 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, 1445 <&dmac1 0xd1>, <&dmac1 0xd2>; 1446 dma-names = "tx", "rx", "tx", "rx"; 1447 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1448 resets = <&cpg 315>; 1449 reg-io-width = <4>; 1450 max-frequency = <97500000>; 1451 status = "disabled"; 1452 }; 1453 1454 ether: ethernet@ee700000 { 1455 compatible = "renesas,ether-r8a7745", 1456 "renesas,rcar-gen2-ether"; 1457 reg = <0 0xee700000 0 0x400>; 1458 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; 1459 clocks = <&cpg CPG_MOD 813>; 1460 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1461 resets = <&cpg 813>; 1462 phy-mode = "rmii"; 1463 #address-cells = <1>; 1464 #size-cells = <0>; 1465 status = "disabled"; 1466 }; 1467 1468 gic: interrupt-controller@f1001000 { 1469 compatible = "arm,gic-400"; 1470 #interrupt-cells = <3>; 1471 #address-cells = <0>; 1472 interrupt-controller; 1473 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>, 1474 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; 1475 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1476 clocks = <&cpg CPG_MOD 408>; 1477 clock-names = "clk"; 1478 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1479 resets = <&cpg 408>; 1480 }; 1481 1482 vsp@fe928000 { 1483 compatible = "renesas,vsp1"; 1484 reg = <0 0xfe928000 0 0x8000>; 1485 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; 1486 clocks = <&cpg CPG_MOD 131>; 1487 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1488 resets = <&cpg 131>; 1489 }; 1490 1491 vsp@fe930000 { 1492 compatible = "renesas,vsp1"; 1493 reg = <0 0xfe930000 0 0x8000>; 1494 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1495 clocks = <&cpg CPG_MOD 128>; 1496 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1497 resets = <&cpg 128>; 1498 }; 1499 1500 du: display@feb00000 { 1501 compatible = "renesas,du-r8a7745"; 1502 reg = <0 0xfeb00000 0 0x40000>; 1503 reg-names = "du"; 1504 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1505 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1506 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; 1507 clock-names = "du.0", "du.1"; 1508 status = "disabled"; 1509 1510 ports { 1511 #address-cells = <1>; 1512 #size-cells = <0>; 1513 1514 port@0 { 1515 reg = <0>; 1516 du_out_rgb0: endpoint { 1517 }; 1518 }; 1519 port@1 { 1520 reg = <1>; 1521 du_out_rgb1: endpoint { 1522 }; 1523 }; 1524 }; 1525 }; 1526 1527 prr: chipid@ff000044 { 1528 compatible = "renesas,prr"; 1529 reg = <0 0xff000044 0 4>; 1530 }; 1531 1532 cmt0: timer@ffca0000 { 1533 compatible = "renesas,r8a7745-cmt0", 1534 "renesas,rcar-gen2-cmt0"; 1535 reg = <0 0xffca0000 0 0x1004>; 1536 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 1537 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 1538 clocks = <&cpg CPG_MOD 124>; 1539 clock-names = "fck"; 1540 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1541 resets = <&cpg 124>; 1542 status = "disabled"; 1543 }; 1544 1545 cmt1: timer@e6130000 { 1546 compatible = "renesas,r8a7745-cmt1", 1547 "renesas,rcar-gen2-cmt1"; 1548 reg = <0 0xe6130000 0 0x1004>; 1549 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 1550 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 1551 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 1552 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 1553 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 1554 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 1555 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 1556 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 1557 clocks = <&cpg CPG_MOD 329>; 1558 clock-names = "fck"; 1559 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1560 resets = <&cpg 329>; 1561 status = "disabled"; 1562 }; 1563 }; 1564 1565 timer { 1566 compatible = "arm,armv7-timer"; 1567 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1568 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1569 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1570 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1571 }; 1572 1573 /* External USB clock - can be overridden by the board */ 1574 usb_extal_clk: usb_extal { 1575 compatible = "fixed-clock"; 1576 #clock-cells = <0>; 1577 clock-frequency = <48000000>; 1578 }; 1579}; 1580