1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Samsung's S5PV210 SoC device tree source 4 * 5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd. 6 * 7 * Mateusz Krawczuk <m.krawczuk@partner.samsung.com> 8 * Tomasz Figa <t.figa@samsung.com> 9 * 10 * Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210 11 * based board files can include this file and provide values for board specfic 12 * bindings. 13 * 14 * Note: This file does not include device nodes for all the controllers in 15 * S5PV210 SoC. As device tree coverage for S5PV210 increases, additional 16 * nodes can be added to this file. 17 */ 18 19#include <dt-bindings/clock/s5pv210.h> 20#include <dt-bindings/clock/s5pv210-audss.h> 21 22/ { 23 #address-cells = <1>; 24 #size-cells = <1>; 25 26 aliases { 27 csis0 = &csis0; 28 dmc0 = &dmc0; 29 dmc1 = &dmc1; 30 fimc0 = &fimc0; 31 fimc1 = &fimc1; 32 fimc2 = &fimc2; 33 i2c0 = &i2c0; 34 i2c1 = &i2c1; 35 i2c2 = &i2c2; 36 i2s0 = &i2s0; 37 i2s1 = &i2s1; 38 i2s2 = &i2s2; 39 pinctrl0 = &pinctrl0; 40 spi0 = &spi0; 41 spi1 = &spi1; 42 }; 43 44 cpus { 45 #address-cells = <1>; 46 #size-cells = <0>; 47 48 cpu@0 { 49 device_type = "cpu"; 50 compatible = "arm,cortex-a8"; 51 reg = <0>; 52 }; 53 }; 54 55 xxti: oscillator-0 { 56 compatible = "fixed-clock"; 57 clock-frequency = <0>; 58 clock-output-names = "xxti"; 59 #clock-cells = <0>; 60 }; 61 62 xusbxti: oscillator-1 { 63 compatible = "fixed-clock"; 64 clock-frequency = <0>; 65 clock-output-names = "xusbxti"; 66 #clock-cells = <0>; 67 }; 68 69 soc { 70 compatible = "simple-bus"; 71 #address-cells = <1>; 72 #size-cells = <1>; 73 ranges; 74 75 onenand: onenand@b0600000 { 76 compatible = "samsung,s5pv210-onenand"; 77 reg = <0xb0600000 0x2000>, 78 <0xb0000000 0x20000>, 79 <0xb0040000 0x20000>; 80 interrupt-parent = <&vic1>; 81 interrupts = <31>; 82 clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>; 83 clock-names = "bus", "onenand"; 84 #address-cells = <1>; 85 #size-cells = <1>; 86 status = "disabled"; 87 }; 88 89 chipid@e0000000 { 90 compatible = "samsung,s5pv210-chipid"; 91 reg = <0xe0000000 0x1000>; 92 }; 93 94 clocks: clock-controller@e0100000 { 95 compatible = "samsung,s5pv210-clock"; 96 reg = <0xe0100000 0x10000>; 97 clock-names = "xxti", "xusbxti"; 98 clocks = <&xxti>, <&xusbxti>; 99 #clock-cells = <1>; 100 }; 101 102 pmu_syscon: syscon@e0108000 { 103 compatible = "samsung-s5pv210-pmu", "syscon"; 104 reg = <0xe0108000 0x8000>; 105 }; 106 107 pinctrl0: pinctrl@e0200000 { 108 compatible = "samsung,s5pv210-pinctrl"; 109 reg = <0xe0200000 0x1000>; 110 interrupt-parent = <&vic0>; 111 interrupts = <30>; 112 113 wakeup-interrupt-controller { 114 compatible = "samsung,s5pv210-wakeup-eint"; 115 interrupts = <16>; 116 interrupt-parent = <&vic0>; 117 }; 118 }; 119 120 pdma0: dma@e0900000 { 121 compatible = "arm,pl330", "arm,primecell"; 122 reg = <0xe0900000 0x1000>; 123 interrupt-parent = <&vic0>; 124 interrupts = <19>; 125 clocks = <&clocks CLK_PDMA0>; 126 clock-names = "apb_pclk"; 127 #dma-cells = <1>; 128 #dma-channels = <8>; 129 #dma-requests = <32>; 130 }; 131 132 pdma1: dma@e0a00000 { 133 compatible = "arm,pl330", "arm,primecell"; 134 reg = <0xe0a00000 0x1000>; 135 interrupt-parent = <&vic0>; 136 interrupts = <20>; 137 clocks = <&clocks CLK_PDMA1>; 138 clock-names = "apb_pclk"; 139 #dma-cells = <1>; 140 #dma-channels = <8>; 141 #dma-requests = <32>; 142 }; 143 144 spi0: spi@e1300000 { 145 compatible = "samsung,s5pv210-spi"; 146 reg = <0xe1300000 0x1000>; 147 interrupt-parent = <&vic1>; 148 interrupts = <15>; 149 dmas = <&pdma0 7>, <&pdma0 6>; 150 dma-names = "tx", "rx"; 151 clocks = <&clocks SCLK_SPI0>, <&clocks CLK_SPI0>; 152 clock-names = "spi", "spi_busclk0"; 153 pinctrl-names = "default"; 154 pinctrl-0 = <&spi0_bus>; 155 #address-cells = <1>; 156 #size-cells = <0>; 157 status = "disabled"; 158 }; 159 160 spi1: spi@e1400000 { 161 compatible = "samsung,s5pv210-spi"; 162 reg = <0xe1400000 0x1000>; 163 interrupt-parent = <&vic1>; 164 interrupts = <16>; 165 dmas = <&pdma1 7>, <&pdma1 6>; 166 dma-names = "tx", "rx"; 167 clocks = <&clocks SCLK_SPI1>, <&clocks CLK_SPI1>; 168 clock-names = "spi", "spi_busclk0"; 169 pinctrl-names = "default"; 170 pinctrl-0 = <&spi1_bus>; 171 #address-cells = <1>; 172 #size-cells = <0>; 173 status = "disabled"; 174 }; 175 176 keypad: keypad@e1600000 { 177 compatible = "samsung,s5pv210-keypad"; 178 reg = <0xe1600000 0x1000>; 179 interrupt-parent = <&vic2>; 180 interrupts = <25>; 181 clocks = <&clocks CLK_KEYIF>; 182 clock-names = "keypad"; 183 status = "disabled"; 184 }; 185 186 i2c0: i2c@e1800000 { 187 compatible = "samsung,s3c2440-i2c"; 188 reg = <0xe1800000 0x1000>; 189 interrupt-parent = <&vic1>; 190 interrupts = <14>; 191 clocks = <&clocks CLK_I2C0>; 192 clock-names = "i2c"; 193 pinctrl-names = "default"; 194 pinctrl-0 = <&i2c0_bus>; 195 #address-cells = <1>; 196 #size-cells = <0>; 197 status = "disabled"; 198 }; 199 200 i2c2: i2c@e1a00000 { 201 compatible = "samsung,s3c2440-i2c"; 202 reg = <0xe1a00000 0x1000>; 203 interrupt-parent = <&vic1>; 204 interrupts = <19>; 205 clocks = <&clocks CLK_I2C2>; 206 clock-names = "i2c"; 207 pinctrl-0 = <&i2c2_bus>; 208 pinctrl-names = "default"; 209 #address-cells = <1>; 210 #size-cells = <0>; 211 status = "disabled"; 212 }; 213 214 clk_audss: clock-controller@eee10000 { 215 compatible = "samsung,s5pv210-audss-clock"; 216 reg = <0xeee10000 0x1000>; 217 clock-names = "hclk", "xxti", 218 "fout_epll", 219 "sclk_audio0"; 220 clocks = <&clocks DOUT_HCLKP>, <&xxti>, 221 <&clocks FOUT_EPLL>, 222 <&clocks SCLK_AUDIO0>; 223 #clock-cells = <1>; 224 }; 225 226 i2s0: i2s@eee30000 { 227 compatible = "samsung,s5pv210-i2s"; 228 reg = <0xeee30000 0x1000>; 229 interrupt-parent = <&vic2>; 230 interrupts = <16>; 231 dma-names = "rx", "tx", "tx-sec"; 232 dmas = <&pdma1 9>, <&pdma1 10>, <&pdma1 11>; 233 clock-names = "iis", 234 "i2s_opclk0", 235 "i2s_opclk1"; 236 clocks = <&clk_audss CLK_I2S>, 237 <&clk_audss CLK_I2S>, 238 <&clk_audss CLK_DOUT_AUD_BUS>; 239 samsung,idma-addr = <0xc0010000>; 240 pinctrl-names = "default"; 241 pinctrl-0 = <&i2s0_bus>; 242 #sound-dai-cells = <0>; 243 status = "disabled"; 244 }; 245 246 i2s1: i2s@e2100000 { 247 compatible = "samsung,s3c6410-i2s"; 248 reg = <0xe2100000 0x1000>; 249 interrupt-parent = <&vic2>; 250 interrupts = <17>; 251 dma-names = "rx", "tx"; 252 dmas = <&pdma1 12>, <&pdma1 13>; 253 clock-names = "iis", "i2s_opclk0"; 254 clocks = <&clocks CLK_I2S1>, <&clocks SCLK_AUDIO1>; 255 pinctrl-names = "default"; 256 pinctrl-0 = <&i2s1_bus>; 257 #sound-dai-cells = <0>; 258 status = "disabled"; 259 }; 260 261 i2s2: i2s@e2a00000 { 262 compatible = "samsung,s3c6410-i2s"; 263 reg = <0xe2a00000 0x1000>; 264 interrupt-parent = <&vic2>; 265 interrupts = <18>; 266 dma-names = "rx", "tx"; 267 dmas = <&pdma1 14>, <&pdma1 15>; 268 clock-names = "iis", "i2s_opclk0"; 269 clocks = <&clocks CLK_I2S2>, <&clocks SCLK_AUDIO2>; 270 pinctrl-names = "default"; 271 pinctrl-0 = <&i2s2_bus>; 272 #sound-dai-cells = <0>; 273 status = "disabled"; 274 }; 275 276 pwm: pwm@e2500000 { 277 compatible = "samsung,s5pc100-pwm"; 278 reg = <0xe2500000 0x1000>; 279 interrupt-parent = <&vic0>; 280 interrupts = <21>, <22>, <23>, <24>, <25>; 281 clock-names = "timers"; 282 clocks = <&clocks CLK_PWM>; 283 #pwm-cells = <3>; 284 }; 285 286 watchdog: watchdog@e2700000 { 287 compatible = "samsung,s3c6410-wdt"; 288 reg = <0xe2700000 0x1000>; 289 interrupt-parent = <&vic0>; 290 interrupts = <26>; 291 clock-names = "watchdog"; 292 clocks = <&clocks CLK_WDT>; 293 }; 294 295 rtc: rtc@e2800000 { 296 compatible = "samsung,s3c6410-rtc"; 297 reg = <0xe2800000 0x100>; 298 interrupt-parent = <&vic0>; 299 interrupts = <28>, <29>; 300 clocks = <&clocks CLK_RTC>; 301 clock-names = "rtc"; 302 status = "disabled"; 303 }; 304 305 uart0: serial@e2900000 { 306 compatible = "samsung,s5pv210-uart"; 307 reg = <0xe2900000 0x400>; 308 interrupt-parent = <&vic1>; 309 interrupts = <10>; 310 clock-names = "uart", "clk_uart_baud0", 311 "clk_uart_baud1"; 312 clocks = <&clocks CLK_UART0>, <&clocks CLK_UART0>, 313 <&clocks SCLK_UART0>; 314 status = "disabled"; 315 }; 316 317 uart1: serial@e2900400 { 318 compatible = "samsung,s5pv210-uart"; 319 reg = <0xe2900400 0x400>; 320 interrupt-parent = <&vic1>; 321 interrupts = <11>; 322 clock-names = "uart", "clk_uart_baud0", 323 "clk_uart_baud1"; 324 clocks = <&clocks CLK_UART1>, <&clocks CLK_UART1>, 325 <&clocks SCLK_UART1>; 326 status = "disabled"; 327 }; 328 329 uart2: serial@e2900800 { 330 compatible = "samsung,s5pv210-uart"; 331 reg = <0xe2900800 0x400>; 332 interrupt-parent = <&vic1>; 333 interrupts = <12>; 334 clock-names = "uart", "clk_uart_baud0", 335 "clk_uart_baud1"; 336 clocks = <&clocks CLK_UART2>, <&clocks CLK_UART2>, 337 <&clocks SCLK_UART2>; 338 status = "disabled"; 339 }; 340 341 uart3: serial@e2900c00 { 342 compatible = "samsung,s5pv210-uart"; 343 reg = <0xe2900c00 0x400>; 344 interrupt-parent = <&vic1>; 345 interrupts = <13>; 346 clock-names = "uart", "clk_uart_baud0", 347 "clk_uart_baud1"; 348 clocks = <&clocks CLK_UART3>, <&clocks CLK_UART3>, 349 <&clocks SCLK_UART3>; 350 status = "disabled"; 351 }; 352 353 sdhci0: sdhci@eb000000 { 354 compatible = "samsung,s3c6410-sdhci"; 355 reg = <0xeb000000 0x100000>; 356 interrupt-parent = <&vic1>; 357 interrupts = <26>; 358 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; 359 clocks = <&clocks CLK_HSMMC0>, <&clocks CLK_HSMMC0>, 360 <&clocks SCLK_MMC0>; 361 status = "disabled"; 362 }; 363 364 sdhci1: sdhci@eb100000 { 365 compatible = "samsung,s3c6410-sdhci"; 366 reg = <0xeb100000 0x100000>; 367 interrupt-parent = <&vic1>; 368 interrupts = <27>; 369 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; 370 clocks = <&clocks CLK_HSMMC1>, <&clocks CLK_HSMMC1>, 371 <&clocks SCLK_MMC1>; 372 status = "disabled"; 373 }; 374 375 sdhci2: sdhci@eb200000 { 376 compatible = "samsung,s3c6410-sdhci"; 377 reg = <0xeb200000 0x100000>; 378 interrupt-parent = <&vic1>; 379 interrupts = <28>; 380 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; 381 clocks = <&clocks CLK_HSMMC2>, <&clocks CLK_HSMMC2>, 382 <&clocks SCLK_MMC2>; 383 status = "disabled"; 384 }; 385 386 sdhci3: sdhci@eb300000 { 387 compatible = "samsung,s3c6410-sdhci"; 388 reg = <0xeb300000 0x100000>; 389 interrupt-parent = <&vic3>; 390 interrupts = <2>; 391 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.3"; 392 clocks = <&clocks CLK_HSMMC3>, <&clocks CLK_HSMMC3>, 393 <&clocks SCLK_MMC3>; 394 status = "disabled"; 395 }; 396 397 hsotg: hsotg@ec000000 { 398 compatible = "samsung,s3c6400-hsotg"; 399 reg = <0xec000000 0x20000>; 400 interrupt-parent = <&vic1>; 401 interrupts = <24>; 402 clocks = <&clocks CLK_USB_OTG>; 403 clock-names = "otg"; 404 phy-names = "usb2-phy"; 405 phys = <&usbphy 0>; 406 status = "disabled"; 407 }; 408 409 usbphy: usbphy@ec100000 { 410 compatible = "samsung,s5pv210-usb2-phy"; 411 reg = <0xec100000 0x100>; 412 samsung,pmureg-phandle = <&pmu_syscon>; 413 clocks = <&clocks CLK_USB_OTG>, <&xusbxti>; 414 clock-names = "phy", "ref"; 415 #phy-cells = <1>; 416 status = "disabled"; 417 }; 418 419 ehci: ehci@ec200000 { 420 compatible = "samsung,exynos4210-ehci"; 421 reg = <0xec200000 0x100>; 422 interrupts = <23>; 423 interrupt-parent = <&vic1>; 424 clocks = <&clocks CLK_USB_HOST>; 425 clock-names = "usbhost"; 426 #address-cells = <1>; 427 #size-cells = <0>; 428 status = "disabled"; 429 430 port@0 { 431 reg = <0>; 432 phys = <&usbphy 1>; 433 }; 434 }; 435 436 ohci: ohci@ec300000 { 437 compatible = "samsung,exynos4210-ohci"; 438 reg = <0xec300000 0x100>; 439 interrupts = <23>; 440 interrupt-parent = <&vic1>; 441 clocks = <&clocks CLK_USB_HOST>; 442 clock-names = "usbhost"; 443 #address-cells = <1>; 444 #size-cells = <0>; 445 status = "disabled"; 446 447 port@0 { 448 reg = <0>; 449 phys = <&usbphy 1>; 450 }; 451 }; 452 453 mfc: codec@f1700000 { 454 compatible = "samsung,mfc-v5"; 455 reg = <0xf1700000 0x10000>; 456 interrupt-parent = <&vic2>; 457 interrupts = <14>; 458 clocks = <&clocks DOUT_MFC>, <&clocks CLK_MFC>; 459 clock-names = "sclk_mfc", "mfc"; 460 }; 461 462 vic0: interrupt-controller@f2000000 { 463 compatible = "arm,pl192-vic"; 464 interrupt-controller; 465 reg = <0xf2000000 0x1000>; 466 #interrupt-cells = <1>; 467 }; 468 469 vic1: interrupt-controller@f2100000 { 470 compatible = "arm,pl192-vic"; 471 interrupt-controller; 472 reg = <0xf2100000 0x1000>; 473 #interrupt-cells = <1>; 474 }; 475 476 vic2: interrupt-controller@f2200000 { 477 compatible = "arm,pl192-vic"; 478 interrupt-controller; 479 reg = <0xf2200000 0x1000>; 480 #interrupt-cells = <1>; 481 }; 482 483 vic3: interrupt-controller@f2300000 { 484 compatible = "arm,pl192-vic"; 485 interrupt-controller; 486 reg = <0xf2300000 0x1000>; 487 #interrupt-cells = <1>; 488 }; 489 490 fimd: fimd@f8000000 { 491 compatible = "samsung,s5pv210-fimd"; 492 interrupt-parent = <&vic2>; 493 reg = <0xf8000000 0x20000>; 494 interrupt-names = "fifo", "vsync", "lcd_sys"; 495 interrupts = <0>, <1>, <2>; 496 clocks = <&clocks SCLK_FIMD>, <&clocks CLK_FIMD>; 497 clock-names = "sclk_fimd", "fimd"; 498 status = "disabled"; 499 }; 500 501 dmc0: dmc@f0000000 { 502 compatible = "samsung,s5pv210-dmc"; 503 reg = <0xf0000000 0x1000>; 504 }; 505 506 dmc1: dmc@f1400000 { 507 compatible = "samsung,s5pv210-dmc"; 508 reg = <0xf1400000 0x1000>; 509 }; 510 511 g2d: g2d@fa000000 { 512 compatible = "samsung,s5pv210-g2d"; 513 reg = <0xfa000000 0x1000>; 514 interrupt-parent = <&vic2>; 515 interrupts = <9>; 516 clocks = <&clocks DOUT_G2D>, <&clocks CLK_G2D>; 517 clock-names = "sclk_fimg2d", "fimg2d"; 518 }; 519 520 mdma1: mdma@fa200000 { 521 compatible = "arm,pl330", "arm,primecell"; 522 reg = <0xfa200000 0x1000>; 523 interrupt-parent = <&vic0>; 524 interrupts = <18>; 525 clocks = <&clocks CLK_MDMA>; 526 clock-names = "apb_pclk"; 527 #dma-cells = <1>; 528 #dma-channels = <8>; 529 #dma-requests = <1>; 530 }; 531 532 rotator: rotator@fa300000 { 533 compatible = "samsung,s5pv210-rotator"; 534 reg = <0xfa300000 0x1000>; 535 interrupt-parent = <&vic2>; 536 interrupts = <4>; 537 clocks = <&clocks CLK_ROTATOR>; 538 clock-names = "rotator"; 539 }; 540 541 i2c1: i2c@fab00000 { 542 compatible = "samsung,s3c2440-i2c"; 543 reg = <0xfab00000 0x1000>; 544 interrupt-parent = <&vic2>; 545 interrupts = <13>; 546 clocks = <&clocks CLK_I2C1>; 547 clock-names = "i2c"; 548 pinctrl-names = "default"; 549 pinctrl-0 = <&i2c1_bus>; 550 #address-cells = <1>; 551 #size-cells = <0>; 552 status = "disabled"; 553 }; 554 555 camera: camera { 556 compatible = "samsung,fimc", "simple-bus"; 557 pinctrl-names = "default"; 558 pinctrl-0 = <>; 559 clocks = <&clocks SCLK_CAM0>, <&clocks SCLK_CAM1>; 560 clock-names = "sclk_cam0", "sclk_cam1"; 561 #address-cells = <1>; 562 #size-cells = <1>; 563 #clock-cells = <1>; 564 clock-output-names = "cam_a_clkout", "cam_b_clkout"; 565 ranges; 566 567 csis0: csis@fa600000 { 568 compatible = "samsung,s5pv210-csis"; 569 reg = <0xfa600000 0x4000>; 570 interrupt-parent = <&vic2>; 571 interrupts = <29>; 572 clocks = <&clocks CLK_CSIS>, 573 <&clocks SCLK_CSIS>; 574 clock-names = "csis", 575 "sclk_csis"; 576 bus-width = <4>; 577 status = "disabled"; 578 #address-cells = <1>; 579 #size-cells = <0>; 580 }; 581 582 fimc0: fimc@fb200000 { 583 compatible = "samsung,s5pv210-fimc"; 584 reg = <0xfb200000 0x1000>; 585 interrupts = <5>; 586 interrupt-parent = <&vic2>; 587 clocks = <&clocks CLK_FIMC0>, 588 <&clocks SCLK_FIMC0>; 589 clock-names = "fimc", 590 "sclk_fimc"; 591 samsung,pix-limits = <4224 8192 1920 4224>; 592 samsung,mainscaler-ext; 593 samsung,cam-if; 594 }; 595 596 fimc1: fimc@fb300000 { 597 compatible = "samsung,s5pv210-fimc"; 598 reg = <0xfb300000 0x1000>; 599 interrupt-parent = <&vic2>; 600 interrupts = <6>; 601 clocks = <&clocks CLK_FIMC1>, 602 <&clocks SCLK_FIMC1>; 603 clock-names = "fimc", 604 "sclk_fimc"; 605 samsung,pix-limits = <4224 8192 1920 4224>; 606 samsung,mainscaler-ext; 607 samsung,cam-if; 608 }; 609 610 fimc2: fimc@fb400000 { 611 compatible = "samsung,s5pv210-fimc"; 612 reg = <0xfb400000 0x1000>; 613 interrupt-parent = <&vic2>; 614 interrupts = <7>; 615 clocks = <&clocks CLK_FIMC2>, 616 <&clocks SCLK_FIMC2>; 617 clock-names = "fimc", 618 "sclk_fimc"; 619 samsung,pix-limits = <4224 8192 1920 4224>; 620 samsung,mainscaler-ext; 621 samsung,lcd-wb; 622 }; 623 }; 624 625 jpeg_codec: jpeg-codec@fb600000 { 626 compatible = "samsung,s5pv210-jpeg"; 627 reg = <0xfb600000 0x1000>; 628 interrupt-parent = <&vic2>; 629 interrupts = <8>; 630 clocks = <&clocks CLK_JPEG>; 631 clock-names = "jpeg"; 632 }; 633 }; 634}; 635 636#include "s5pv210-pinctrl.dtsi" 637