1 // SPDX-License-Identifier: GPL-2.0
2 //
3 // SAMSUNG EXYNOS Flattened Device Tree enabled machine
4 //
5 // Copyright (c) 2010-2014 Samsung Electronics Co., Ltd.
6 // http://www.samsung.com
7
8 #include <linux/init.h>
9 #include <linux/io.h>
10 #include <linux/of.h>
11 #include <linux/of_address.h>
12 #include <linux/of_fdt.h>
13 #include <linux/platform_device.h>
14 #include <linux/irqchip.h>
15 #include <linux/soc/samsung/exynos-regs-pmu.h>
16
17 #include <asm/cacheflush.h>
18 #include <asm/hardware/cache-l2x0.h>
19 #include <asm/mach/arch.h>
20 #include <asm/mach/map.h>
21
22 #include <mach/map.h>
23 #include <plat/cpu.h>
24
25 #include "common.h"
26
27 static struct platform_device exynos_cpuidle = {
28 .name = "exynos_cpuidle",
29 #ifdef CONFIG_ARM_EXYNOS_CPUIDLE
30 .dev.platform_data = exynos_enter_aftr,
31 #endif
32 .id = -1,
33 };
34
35 void __iomem *sysram_base_addr __ro_after_init;
36 phys_addr_t sysram_base_phys __ro_after_init;
37 void __iomem *sysram_ns_base_addr __ro_after_init;
38
exynos_sysram_init(void)39 void __init exynos_sysram_init(void)
40 {
41 struct device_node *node;
42
43 for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram") {
44 if (!of_device_is_available(node))
45 continue;
46 sysram_base_addr = of_iomap(node, 0);
47 sysram_base_phys = of_translate_address(node,
48 of_get_address(node, 0, NULL, NULL));
49 of_node_put(node);
50 break;
51 }
52
53 for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram-ns") {
54 if (!of_device_is_available(node))
55 continue;
56 sysram_ns_base_addr = of_iomap(node, 0);
57 of_node_put(node);
58 break;
59 }
60 }
61
exynos_fdt_map_chipid(unsigned long node,const char * uname,int depth,void * data)62 static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
63 int depth, void *data)
64 {
65 struct map_desc iodesc;
66 const __be32 *reg;
67 int len;
68
69 if (!of_flat_dt_is_compatible(node, "samsung,exynos4210-chipid"))
70 return 0;
71
72 reg = of_get_flat_dt_prop(node, "reg", &len);
73 if (reg == NULL || len != (sizeof(unsigned long) * 2))
74 return 0;
75
76 iodesc.pfn = __phys_to_pfn(be32_to_cpu(reg[0]));
77 iodesc.length = be32_to_cpu(reg[1]) - 1;
78 iodesc.virtual = (unsigned long)S5P_VA_CHIPID;
79 iodesc.type = MT_DEVICE;
80 iotable_init(&iodesc, 1);
81 return 1;
82 }
83
exynos_init_io(void)84 static void __init exynos_init_io(void)
85 {
86 debug_ll_io_init();
87
88 of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
89
90 /* detect cpu id and rev. */
91 s5p_init_cpu(S5P_VA_CHIPID);
92 }
93
94 /*
95 * Set or clear the USE_DELAYED_RESET_ASSERTION option. Used by smp code
96 * and suspend.
97 *
98 * This is necessary only on Exynos4 SoCs. When system is running
99 * USE_DELAYED_RESET_ASSERTION should be set so the ARM CLK clock down
100 * feature could properly detect global idle state when secondary CPU is
101 * powered down.
102 *
103 * However this should not be set when such system is going into suspend.
104 */
exynos_set_delayed_reset_assertion(bool enable)105 void exynos_set_delayed_reset_assertion(bool enable)
106 {
107 if (of_machine_is_compatible("samsung,exynos4")) {
108 unsigned int tmp, core_id;
109
110 for (core_id = 0; core_id < num_possible_cpus(); core_id++) {
111 tmp = pmu_raw_readl(EXYNOS_ARM_CORE_OPTION(core_id));
112 if (enable)
113 tmp |= S5P_USE_DELAYED_RESET_ASSERTION;
114 else
115 tmp &= ~(S5P_USE_DELAYED_RESET_ASSERTION);
116 pmu_raw_writel(tmp, EXYNOS_ARM_CORE_OPTION(core_id));
117 }
118 }
119 }
120
121 /*
122 * Apparently, these SoCs are not able to wake-up from suspend using
123 * the PMU. Too bad. Should they suddenly become capable of such a
124 * feat, the matches below should be moved to suspend.c.
125 */
126 static const struct of_device_id exynos_dt_pmu_match[] = {
127 { .compatible = "samsung,exynos5260-pmu" },
128 { .compatible = "samsung,exynos5410-pmu" },
129 { /*sentinel*/ },
130 };
131
exynos_map_pmu(void)132 static void exynos_map_pmu(void)
133 {
134 struct device_node *np;
135
136 np = of_find_matching_node(NULL, exynos_dt_pmu_match);
137 if (np)
138 pmu_base_addr = of_iomap(np, 0);
139 of_node_put(np);
140 }
141
exynos_init_irq(void)142 static void __init exynos_init_irq(void)
143 {
144 irqchip_init();
145 /*
146 * Since platsmp.c needs pmu base address by the time
147 * DT is not unflatten so we can't use DT APIs before
148 * init_irq
149 */
150 exynos_map_pmu();
151 }
152
exynos_dt_machine_init(void)153 static void __init exynos_dt_machine_init(void)
154 {
155 /*
156 * This is called from smp_prepare_cpus if we've built for SMP, but
157 * we still need to set it up for PM and firmware ops if not.
158 */
159 if (!IS_ENABLED(CONFIG_SMP))
160 exynos_sysram_init();
161
162 #if defined(CONFIG_SMP) && defined(CONFIG_ARM_EXYNOS_CPUIDLE)
163 if (of_machine_is_compatible("samsung,exynos4210") ||
164 of_machine_is_compatible("samsung,exynos3250"))
165 exynos_cpuidle.dev.platform_data = &cpuidle_coupled_exynos_data;
166 #endif
167 if (of_machine_is_compatible("samsung,exynos4210") ||
168 (of_machine_is_compatible("samsung,exynos4412") &&
169 (of_machine_is_compatible("samsung,trats2") ||
170 of_machine_is_compatible("samsung,midas"))) ||
171 of_machine_is_compatible("samsung,exynos3250") ||
172 of_machine_is_compatible("samsung,exynos5250"))
173 platform_device_register(&exynos_cpuidle);
174 }
175
176 static char const *const exynos_dt_compat[] __initconst = {
177 "samsung,exynos3",
178 "samsung,exynos3250",
179 "samsung,exynos4",
180 "samsung,exynos4210",
181 "samsung,exynos4412",
182 "samsung,exynos5",
183 "samsung,exynos5250",
184 "samsung,exynos5260",
185 "samsung,exynos5420",
186 NULL
187 };
188
exynos_dt_fixup(void)189 static void __init exynos_dt_fixup(void)
190 {
191 /*
192 * Some versions of uboot pass garbage entries in the memory node,
193 * use the old CONFIG_ARM_NR_BANKS
194 */
195 of_fdt_limit_memory(8);
196 }
197
198 DT_MACHINE_START(EXYNOS_DT, "SAMSUNG EXYNOS (Flattened Device Tree)")
199 .l2c_aux_val = 0x3c400001,
200 .l2c_aux_mask = 0xc20fffff,
201 .smp = smp_ops(exynos_smp_ops),
202 .map_io = exynos_init_io,
203 .init_early = exynos_firmware_init,
204 .init_irq = exynos_init_irq,
205 .init_machine = exynos_dt_machine_init,
206 .init_late = exynos_pm_init,
207 .dt_compat = exynos_dt_compat,
208 .dt_fixup = exynos_dt_fixup,
209 MACHINE_END
210