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1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
4  * Copyright (C) 2010 Freescale Semiconductor, Inc.
5  */
6 
7 #include <linux/platform_device.h>
8 #include <linux/io.h>
9 #include <linux/platform_data/usb-ehci-mxc.h>
10 
11 #include "ehci.h"
12 #include "hardware.h"
13 
14 #define USBCTRL_OTGBASE_OFFSET	0x600
15 
16 #define MX27_OTG_SIC_SHIFT	29
17 #define MX27_OTG_SIC_MASK	(0x3 << MX27_OTG_SIC_SHIFT)
18 #define MX27_OTG_PM_BIT		(1 << 24)
19 
20 #define MX27_H2_SIC_SHIFT	21
21 #define MX27_H2_SIC_MASK	(0x3 << MX27_H2_SIC_SHIFT)
22 #define MX27_H2_PM_BIT		(1 << 16)
23 #define MX27_H2_DT_BIT		(1 << 5)
24 
25 #define MX27_H1_SIC_SHIFT	13
26 #define MX27_H1_SIC_MASK	(0x3 << MX27_H1_SIC_SHIFT)
27 #define MX27_H1_PM_BIT		(1 << 8)
28 #define MX27_H1_DT_BIT		(1 << 4)
29 
mx27_initialize_usb_hw(int port,unsigned int flags)30 int mx27_initialize_usb_hw(int port, unsigned int flags)
31 {
32 	unsigned int v;
33 
34 	v = readl(MX27_IO_ADDRESS(MX27_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
35 
36 	switch (port) {
37 	case 0:	/* OTG port */
38 		v &= ~(MX27_OTG_SIC_MASK | MX27_OTG_PM_BIT);
39 		v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX27_OTG_SIC_SHIFT;
40 
41 		if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
42 			v |= MX27_OTG_PM_BIT;
43 		break;
44 	case 1: /* H1 port */
45 		v &= ~(MX27_H1_SIC_MASK | MX27_H1_PM_BIT | MX27_H1_DT_BIT);
46 		v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX27_H1_SIC_SHIFT;
47 
48 		if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
49 			v |= MX27_H1_PM_BIT;
50 
51 		if (!(flags & MXC_EHCI_TTL_ENABLED))
52 			v |= MX27_H1_DT_BIT;
53 
54 		break;
55 	case 2:	/* H2 port */
56 		v &= ~(MX27_H2_SIC_MASK | MX27_H2_PM_BIT | MX27_H2_DT_BIT);
57 		v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX27_H2_SIC_SHIFT;
58 
59 		if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
60 			v |= MX27_H2_PM_BIT;
61 
62 		if (!(flags & MXC_EHCI_TTL_ENABLED))
63 			v |= MX27_H2_DT_BIT;
64 
65 		break;
66 	default:
67 		return -EINVAL;
68 	}
69 
70 	writel(v, MX27_IO_ADDRESS(MX27_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
71 
72 	return 0;
73 }
74 
75