1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH 4 */ 5 6#include <dt-bindings/pwm/pwm.h> 7#include "rk3399.dtsi" 8#include "rk3399-opp.dtsi" 9 10/ { 11 leds { 12 compatible = "gpio-leds"; 13 pinctrl-names = "default"; 14 pinctrl-0 = <&led_pin_module>; 15 16 module-led { 17 label = "module_led"; 18 gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_HIGH>; 19 linux,default-trigger = "heartbeat"; 20 panic-indicator; 21 }; 22 }; 23 24 /* 25 * Overwrite the opp-table for CPUB as this board uses a different 26 * regulator (FAN53555) that only allows 10mV steps and therefore 27 * can't reach the operation point target voltages from rk3399-opp.dtsi 28 */ 29 /delete-node/ opp-table1; 30 cluster1_opp: opp-table1 { 31 compatible = "operating-points-v2"; 32 opp-shared; 33 34 opp00 { 35 opp-hz = /bits/ 64 <408000000>; 36 opp-microvolt = <800000>; 37 clock-latency-ns = <40000>; 38 }; 39 opp01 { 40 opp-hz = /bits/ 64 <600000000>; 41 opp-microvolt = <800000>; 42 }; 43 opp02 { 44 opp-hz = /bits/ 64 <816000000>; 45 opp-microvolt = <830000>; 46 opp-suspend; 47 }; 48 opp03 { 49 opp-hz = /bits/ 64 <1008000000>; 50 opp-microvolt = <880000>; 51 }; 52 opp04 { 53 opp-hz = /bits/ 64 <1200000000>; 54 opp-microvolt = <950000>; 55 }; 56 opp05 { 57 opp-hz = /bits/ 64 <1416000000>; 58 opp-microvolt = <1030000>; 59 }; 60 opp06 { 61 opp-hz = /bits/ 64 <1608000000>; 62 opp-microvolt = <1100000>; 63 }; 64 opp07 { 65 opp-hz = /bits/ 64 <1800000000>; 66 opp-microvolt = <1200000>; 67 }; 68 opp08 { 69 opp-hz = /bits/ 64 <1992000000>; 70 opp-microvolt = <1230000>; 71 turbo-mode; 72 }; 73 }; 74 75 clkin_gmac: external-gmac-clock { 76 compatible = "fixed-clock"; 77 clock-frequency = <125000000>; 78 clock-output-names = "clkin_gmac"; 79 #clock-cells = <0>; 80 }; 81 82 vcc1v2_phy: vcc1v2-phy { 83 compatible = "regulator-fixed"; 84 regulator-name = "vcc1v2_phy"; 85 regulator-always-on; 86 regulator-boot-on; 87 regulator-min-microvolt = <1200000>; 88 regulator-max-microvolt = <1200000>; 89 vin-supply = <&vcc5v0_sys>; 90 }; 91 92 vcc3v3_sys: vcc3v3-sys { 93 compatible = "regulator-fixed"; 94 regulator-name = "vcc3v3_sys"; 95 regulator-always-on; 96 regulator-boot-on; 97 regulator-min-microvolt = <3300000>; 98 regulator-max-microvolt = <3300000>; 99 vin-supply = <&vcc5v0_sys>; 100 }; 101 102 vcc5v0_host: vcc5v0-host-regulator { 103 compatible = "regulator-fixed"; 104 gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>; 105 pinctrl-names = "default"; 106 pinctrl-0 = <&vcc5v0_host_en>; 107 regulator-name = "vcc5v0_host"; 108 regulator-always-on; 109 vin-supply = <&vcc5v0_sys>; 110 }; 111 112 vcc5v0_sys: vcc5v0-sys { 113 compatible = "regulator-fixed"; 114 regulator-name = "vcc5v0_sys"; 115 regulator-always-on; 116 regulator-boot-on; 117 regulator-min-microvolt = <5000000>; 118 regulator-max-microvolt = <5000000>; 119 }; 120}; 121 122&cpu_b0 { 123 cpu-supply = <&vdd_cpu_b>; 124}; 125 126&cpu_b1 { 127 cpu-supply = <&vdd_cpu_b>; 128}; 129 130&cpu_l0 { 131 cpu-supply = <&vdd_cpu_l>; 132}; 133 134&cpu_l1 { 135 cpu-supply = <&vdd_cpu_l>; 136}; 137 138&cpu_l2 { 139 cpu-supply = <&vdd_cpu_l>; 140}; 141 142&cpu_l3 { 143 cpu-supply = <&vdd_cpu_l>; 144}; 145 146&emmc_phy { 147 status = "okay"; 148 drive-impedance-ohm = <33>; 149}; 150 151&gmac { 152 assigned-clocks = <&cru SCLK_RMII_SRC>; 153 assigned-clock-parents = <&clkin_gmac>; 154 clock_in_out = "input"; 155 phy-supply = <&vcc1v2_phy>; 156 phy-mode = "rgmii"; 157 pinctrl-names = "default"; 158 pinctrl-0 = <&rgmii_pins>; 159 snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>; 160 snps,reset-active-low; 161 snps,reset-delays-us = <0 10000 50000>; 162 tx_delay = <0x10>; 163 rx_delay = <0x10>; 164 status = "okay"; 165}; 166 167&i2c0 { 168 status = "okay"; 169 i2c-scl-rising-time-ns = <168>; 170 i2c-scl-falling-time-ns = <4>; 171 clock-frequency = <400000>; 172 173 rk808: pmic@1b { 174 compatible = "rockchip,rk808"; 175 reg = <0x1b>; 176 interrupt-parent = <&gpio1>; 177 interrupts = <22 IRQ_TYPE_LEVEL_LOW>; 178 #clock-cells = <1>; 179 clock-output-names = "xin32k", "rk808-clkout2"; 180 pinctrl-names = "default"; 181 pinctrl-0 = <&pmic_int_l>; 182 rockchip,system-power-controller; 183 wakeup-source; 184 185 vcc1-supply = <&vcc5v0_sys>; 186 vcc2-supply = <&vcc5v0_sys>; 187 vcc3-supply = <&vcc5v0_sys>; 188 vcc4-supply = <&vcc5v0_sys>; 189 vcc6-supply = <&vcc5v0_sys>; 190 vcc7-supply = <&vcc5v0_sys>; 191 vcc8-supply = <&vcc3v3_sys>; 192 vcc9-supply = <&vcc5v0_sys>; 193 vcc10-supply = <&vcc5v0_sys>; 194 vcc11-supply = <&vcc5v0_sys>; 195 vcc12-supply = <&vcc3v3_sys>; 196 vddio-supply = <&vcc1v8_pmu>; 197 198 regulators { 199 vdd_center: DCDC_REG1 { 200 regulator-name = "vdd_center"; 201 regulator-min-microvolt = <750000>; 202 regulator-max-microvolt = <1350000>; 203 regulator-ramp-delay = <6001>; 204 regulator-always-on; 205 regulator-boot-on; 206 regulator-state-mem { 207 regulator-off-in-suspend; 208 }; 209 }; 210 211 vdd_cpu_l: DCDC_REG2 { 212 regulator-name = "vdd_cpu_l"; 213 regulator-min-microvolt = <750000>; 214 regulator-max-microvolt = <1350000>; 215 regulator-ramp-delay = <6001>; 216 regulator-always-on; 217 regulator-boot-on; 218 regulator-state-mem { 219 regulator-off-in-suspend; 220 }; 221 }; 222 223 vcc_ddr: DCDC_REG3 { 224 regulator-name = "vcc_ddr"; 225 regulator-always-on; 226 regulator-boot-on; 227 regulator-state-mem { 228 regulator-on-in-suspend; 229 }; 230 }; 231 232 vcc_1v8: DCDC_REG4 { 233 regulator-name = "vcc_1v8"; 234 regulator-min-microvolt = <1800000>; 235 regulator-max-microvolt = <1800000>; 236 regulator-always-on; 237 regulator-boot-on; 238 regulator-state-mem { 239 regulator-on-in-suspend; 240 regulator-suspend-microvolt = <1800000>; 241 }; 242 }; 243 244 vcc_ldo1: LDO_REG1 { 245 regulator-name = "vcc_ldo1"; 246 regulator-min-microvolt = <1800000>; 247 regulator-max-microvolt = <1800000>; 248 regulator-boot-on; 249 regulator-state-mem { 250 regulator-off-in-suspend; 251 }; 252 }; 253 254 vcc1v8_hdmi: LDO_REG2 { 255 regulator-name = "vcc1v8_hdmi"; 256 regulator-min-microvolt = <1800000>; 257 regulator-max-microvolt = <1800000>; 258 regulator-always-on; 259 regulator-boot-on; 260 regulator-state-mem { 261 regulator-off-in-suspend; 262 }; 263 }; 264 265 vcc1v8_pmu: LDO_REG3 { 266 regulator-name = "vcc1v8_pmu"; 267 regulator-min-microvolt = <1800000>; 268 regulator-max-microvolt = <1800000>; 269 regulator-always-on; 270 regulator-boot-on; 271 regulator-state-mem { 272 regulator-on-in-suspend; 273 regulator-suspend-microvolt = <1800000>; 274 }; 275 }; 276 277 vcc_sd: LDO_REG4 { 278 regulator-name = "vcc_sd"; 279 regulator-min-microvolt = <1800000>; 280 regulator-max-microvolt = <3000000>; 281 regulator-always-on; 282 regulator-boot-on; 283 regulator-state-mem { 284 regulator-on-in-suspend; 285 regulator-suspend-microvolt = <3000000>; 286 }; 287 }; 288 289 vcc_ldo5: LDO_REG5 { 290 regulator-name = "vcc_ldo5"; 291 regulator-min-microvolt = <3000000>; 292 regulator-max-microvolt = <3000000>; 293 regulator-boot-on; 294 regulator-state-mem { 295 regulator-off-in-suspend; 296 }; 297 }; 298 299 vcc_ldo6: LDO_REG6 { 300 regulator-name = "vcc_ldo6"; 301 regulator-min-microvolt = <1500000>; 302 regulator-max-microvolt = <1500000>; 303 regulator-boot-on; 304 regulator-state-mem { 305 regulator-off-in-suspend; 306 }; 307 }; 308 309 vcc0v9_hdmi: LDO_REG7 { 310 regulator-name = "vcc0v9_hdmi"; 311 regulator-min-microvolt = <900000>; 312 regulator-max-microvolt = <900000>; 313 regulator-always-on; 314 regulator-boot-on; 315 regulator-state-mem { 316 regulator-off-in-suspend; 317 }; 318 }; 319 320 vcc_efuse: LDO_REG8 { 321 regulator-name = "vcc_efuse"; 322 regulator-min-microvolt = <1800000>; 323 regulator-max-microvolt = <1800000>; 324 regulator-always-on; 325 regulator-boot-on; 326 regulator-state-mem { 327 regulator-off-in-suspend; 328 }; 329 }; 330 331 vcc3v3_s3: SWITCH_REG1 { 332 regulator-name = "vcc3v3_s3"; 333 regulator-always-on; 334 regulator-boot-on; 335 regulator-state-mem { 336 regulator-off-in-suspend; 337 }; 338 }; 339 340 vcc3v3_s0: SWITCH_REG2 { 341 regulator-name = "vcc3v3_s0"; 342 regulator-always-on; 343 regulator-boot-on; 344 regulator-state-mem { 345 regulator-off-in-suspend; 346 }; 347 }; 348 }; 349 }; 350 351 vdd_gpu: regulator@60 { 352 compatible = "fcs,fan53555"; 353 reg = <0x60>; 354 fcs,suspend-voltage-selector = <1>; 355 regulator-name = "vdd_gpu"; 356 regulator-min-microvolt = <600000>; 357 regulator-max-microvolt = <1230000>; 358 regulator-ramp-delay = <1000>; 359 regulator-always-on; 360 regulator-boot-on; 361 vin-supply = <&vcc5v0_sys>; 362 }; 363}; 364 365&i2c7 { 366 status = "okay"; 367 clock-frequency = <400000>; 368 369 fan: fan@18 { 370 compatible = "ti,amc6821"; 371 reg = <0x18>; 372 #cooling-cells = <2>; 373 }; 374 375 rtc_twi: rtc@6f { 376 compatible = "isil,isl1208"; 377 reg = <0x6f>; 378 }; 379}; 380 381&i2c8 { 382 status = "okay"; 383 clock-frequency = <400000>; 384 385 vdd_cpu_b: regulator@60 { 386 compatible = "fcs,fan53555"; 387 reg = <0x60>; 388 vin-supply = <&vcc5v0_sys>; 389 regulator-name = "vdd_cpu_b"; 390 regulator-min-microvolt = <600000>; 391 regulator-max-microvolt = <1230000>; 392 regulator-ramp-delay = <1000>; 393 fcs,suspend-voltage-selector = <1>; 394 regulator-always-on; 395 regulator-boot-on; 396 }; 397}; 398 399&i2s0 { 400 pinctrl-0 = <&i2s0_2ch_bus>; 401 rockchip,playback-channels = <2>; 402 rockchip,capture-channels = <2>; 403 status = "okay"; 404}; 405 406/* 407 * As Q7 does not specify neither a global nor a RX clock for I2S these 408 * signals are not used. Furthermore I2S0_LRCK_RX is used as GPIO. 409 * Therefore we have to redefine the i2s0_2ch_bus definition to prevent 410 * conflicts. 411 */ 412&i2s0_2ch_bus { 413 rockchip,pins = 414 <3 RK_PD0 1 &pcfg_pull_none>, 415 <3 RK_PD2 1 &pcfg_pull_none>, 416 <3 RK_PD3 1 &pcfg_pull_none>, 417 <3 RK_PD7 1 &pcfg_pull_none>; 418}; 419 420&io_domains { 421 status = "okay"; 422 bt656-supply = <&vcc_1v8>; 423 audio-supply = <&vcc_1v8>; 424 sdmmc-supply = <&vcc_sd>; 425 gpio1830-supply = <&vcc_1v8>; 426}; 427 428&pmu_io_domains { 429 status = "okay"; 430 pmu1830-supply = <&vcc_1v8>; 431}; 432 433&pwm2 { 434 status = "okay"; 435}; 436 437&pinctrl { 438 i2c8 { 439 i2c8_xfer_a: i2c8-xfer { 440 rockchip,pins = 441 <1 RK_PC4 1 &pcfg_pull_up>, 442 <1 RK_PC5 1 &pcfg_pull_up>; 443 }; 444 }; 445 446 leds { 447 led_pin_module: led-module-gpio { 448 rockchip,pins = 449 <2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; 450 }; 451 }; 452 453 pmic { 454 pmic_int_l: pmic-int-l { 455 rockchip,pins = 456 <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; 457 }; 458 }; 459 460 usb2 { 461 vcc5v0_host_en: vcc5v0-host-en { 462 rockchip,pins = 463 <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; 464 }; 465 }; 466}; 467 468&sdhci { 469 /* 470 * Signal integrity isn't great at 200MHz but 100MHz has proven stable 471 * enough. 472 */ 473 max-frequency = <100000000>; 474 475 bus-width = <8>; 476 mmc-hs400-1_8v; 477 mmc-hs400-enhanced-strobe; 478 non-removable; 479 status = "okay"; 480}; 481 482&sdmmc { 483 vqmmc = <&vcc_sd>; 484}; 485 486&spi1 { 487 status = "okay"; 488 489 norflash: flash@0 { 490 compatible = "jedec,spi-nor"; 491 reg = <0>; 492 spi-max-frequency = <50000000>; 493 }; 494}; 495 496&tcphy1 { 497 status = "okay"; 498}; 499 500&tsadc { 501 rockchip,hw-tshut-mode = <1>; 502 rockchip,hw-tshut-polarity = <1>; 503 status = "okay"; 504}; 505 506&u2phy1 { 507 status = "okay"; 508 509 u2phy1_otg: otg-port { 510 status = "okay"; 511 }; 512 513 u2phy1_host: host-port { 514 phy-supply = <&vcc5v0_host>; 515 status = "okay"; 516 }; 517}; 518 519&usbdrd3_1 { 520 status = "okay"; 521}; 522 523&usbdrd_dwc3_1 { 524 status = "okay"; 525 dr_mode = "host"; 526}; 527 528&usb_host1_ehci { 529 status = "okay"; 530}; 531 532&usb_host1_ohci { 533 status = "okay"; 534}; 535