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1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
4 */
5
6/dts-v1/;
7#include "rk3399-sapphire.dtsi"
8
9/ {
10	model = "Excavator-RK3399 Board";
11	compatible = "rockchip,rk3399-sapphire-excavator", "rockchip,rk3399";
12
13	adc-keys {
14		compatible = "adc-keys";
15		io-channels = <&saradc 1>;
16		io-channel-names = "buttons";
17		keyup-threshold-microvolt = <1800000>;
18		poll-interval = <100>;
19
20		button-up {
21			label = "Volume Up";
22			linux,code = <KEY_VOLUMEUP>;
23			press-threshold-microvolt = <100000>;
24		};
25
26		button-down {
27			label = "Volume Down";
28			linux,code = <KEY_VOLUMEDOWN>;
29			press-threshold-microvolt = <300000>;
30		};
31
32		back {
33			label = "Back";
34			linux,code = <KEY_BACK>;
35			press-threshold-microvolt = <985000>;
36		};
37
38		menu {
39			label = "Menu";
40			linux,code = <KEY_MENU>;
41			press-threshold-microvolt = <1314000>;
42		};
43	};
44
45	backlight: backlight {
46		compatible = "pwm-backlight";
47		brightness-levels = <
48			  0   1   2   3   4   5   6   7
49			  8   9  10  11  12  13  14  15
50			 16  17  18  19  20  21  22  23
51			 24  25  26  27  28  29  30  31
52			 32  33  34  35  36  37  38  39
53			 40  41  42  43  44  45  46  47
54			 48  49  50  51  52  53  54  55
55			 56  57  58  59  60  61  62  63
56			 64  65  66  67  68  69  70  71
57			 72  73  74  75  76  77  78  79
58			 80  81  82  83  84  85  86  87
59			 88  89  90  91  92  93  94  95
60			 96  97  98  99 100 101 102 103
61			104 105 106 107 108 109 110 111
62			112 113 114 115 116 117 118 119
63			120 121 122 123 124 125 126 127
64			128 129 130 131 132 133 134 135
65			136 137 138 139 140 141 142 143
66			144 145 146 147 148 149 150 151
67			152 153 154 155 156 157 158 159
68			160 161 162 163 164 165 166 167
69			168 169 170 171 172 173 174 175
70			176 177 178 179 180 181 182 183
71			184 185 186 187 188 189 190 191
72			192 193 194 195 196 197 198 199
73			200 201 202 203 204 205 206 207
74			208 209 210 211 212 213 214 215
75			216 217 218 219 220 221 222 223
76			224 225 226 227 228 229 230 231
77			232 233 234 235 236 237 238 239
78			240 241 242 243 244 245 246 247
79			248 249 250 251 252 253 254 255>;
80		default-brightness-level = <200>;
81		enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
82		pwms = <&pwm0 0 25000 0>;
83		status = "okay";
84	};
85
86	edp_panel: edp-panel {
87		compatible ="lg,lp079qx1-sp0v", "simple-panel";
88		backlight = <&backlight>;
89		enable-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
90		pinctrl-names = "default";
91		pinctrl-0 = <&lcd_panel_reset>;
92		power-supply = <&vcc3v3_s0>;
93
94		port {
95			panel_in_edp: endpoint {
96				remote-endpoint = <&edp_out_panel>;
97			};
98		};
99	};
100
101	rt5651-sound {
102		compatible = "simple-audio-card";
103		simple-audio-card,name = "realtek,rt5651-codec";
104		simple-audio-card,format = "i2s";
105		simple-audio-card,mclk-fs = <256>;
106		simple-audio-card,widgets =
107			"Microphone", "Mic Jack",
108			"Headphone", "Headphone Jack";
109		simple-audio-card,routing =
110			"Mic Jack", "MICBIAS1",
111			"IN1P", "Mic Jack",
112			"Headphone Jack", "HPOL",
113			"Headphone Jack", "HPOR";
114		simple-audio-card,cpu {
115			sound-dai = <&i2s0>;
116		};
117		simple-audio-card,codec {
118			sound-dai = <&rt5651>;
119		};
120	};
121
122	sdio_pwrseq: sdio-pwrseq {
123		compatible = "mmc-pwrseq-simple";
124		clocks = <&rk808 1>;
125		clock-names = "ext_clock";
126		pinctrl-names = "default";
127		pinctrl-0 = <&wifi_enable_h>;
128
129		/*
130		 * On the module itself this is one of these (depending
131		 * on the actual card populated):
132		 * - SDIO_RESET_L_WL_REG_ON
133		 * - PDN (power down when low)
134		 */
135		reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
136	};
137};
138
139&edp {
140	status = "okay";
141
142	ports {
143		edp_out: port@1 {
144			reg = <1>;
145			#address-cells = <1>;
146			#size-cells = <0>;
147
148			edp_out_panel: endpoint@0 {
149				reg = <0>;
150				remote-endpoint = <&panel_in_edp>;
151			};
152		};
153	};
154};
155
156&i2c1 {
157	i2c-scl-rising-time-ns = <300>;
158	i2c-scl-falling-time-ns = <15>;
159	status = "okay";
160
161	rt5651: rt5651@1a {
162		compatible = "rockchip,rt5651";
163		reg = <0x1a>;
164		clocks = <&cru SCLK_I2S_8CH_OUT>;
165		clock-names = "mclk";
166		hp-det-gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_LOW>;
167		spk-con-gpio = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
168		#sound-dai-cells = <0>;
169	};
170};
171
172&i2c4 {
173	i2c-scl-rising-time-ns = <600>;
174	i2c-scl-falling-time-ns = <20>;
175	status = "okay";
176
177	accelerometer@68 {
178		compatible = "invensense,mpu6500";
179		reg = <0x68>;
180		interrupt-parent = <&gpio1>;
181		interrupts = <RK_PC6 IRQ_TYPE_EDGE_RISING>;
182	};
183};
184
185&i2s0 {
186	rockchip,playback-channels = <8>;
187	rockchip,capture-channels = <8>;
188	status = "okay";
189};
190
191&pcie_phy {
192	status = "okay";
193};
194
195&pcie0 {
196	ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>;
197	num-lanes = <4>;
198	pinctrl-names = "default";
199	pinctrl-0 = <&pcie_clkreqn_cpm>;
200	status = "okay";
201};
202
203&pinctrl {
204	sdio-pwrseq {
205		wifi_enable_h: wifi-enable-h {
206			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
207		};
208	};
209
210	lcd-panel {
211		lcd_panel_reset: lcd-panel-reset {
212			rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
213		};
214	};
215};
216
217&sdio0 {
218	bus-width = <4>;
219	cap-sd-highspeed;
220	cap-sdio-irq;
221	clock-frequency = <50000000>;
222	keep-power-in-suspend;
223	max-frequency = <50000000>;
224	mmc-pwrseq = <&sdio_pwrseq>;
225	non-removable;
226	pinctrl-names = "default";
227	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
228	sd-uhs-sdr104;
229	status = "okay";
230};
231
232&spdif {
233	i2c-scl-rising-time-ns = <450>;
234	i2c-scl-falling-time-ns = <15>;
235	status = "okay";
236};
237