1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (C) 2013-2014, Linaro Ltd.
4 * Author: Al Stone <al.stone@linaro.org>
5 * Author: Graeme Gregory <graeme.gregory@linaro.org>
6 * Author: Hanjun Guo <hanjun.guo@linaro.org>
7 */
8
9 #ifndef _ASM_ACPI_H
10 #define _ASM_ACPI_H
11
12 #include <linux/efi.h>
13 #include <linux/memblock.h>
14 #include <linux/psci.h>
15 #include <linux/stddef.h>
16
17 #include <asm/cputype.h>
18 #include <asm/io.h>
19 #include <asm/ptrace.h>
20 #include <asm/smp_plat.h>
21 #include <asm/tlbflush.h>
22
23 /* Macros for consistency checks of the GICC subtable of MADT */
24
25 /*
26 * MADT GICC minimum length refers to the MADT GICC structure table length as
27 * defined in the earliest ACPI version supported on arm64, ie ACPI 5.1.
28 *
29 * The efficiency_class member was added to the
30 * struct acpi_madt_generic_interrupt to represent the MADT GICC structure
31 * "Processor Power Efficiency Class" field, added in ACPI 6.0 whose offset
32 * is therefore used to delimit the MADT GICC structure minimum length
33 * appropriately.
34 */
35 #define ACPI_MADT_GICC_MIN_LENGTH offsetof( \
36 struct acpi_madt_generic_interrupt, efficiency_class)
37
38 #define BAD_MADT_GICC_ENTRY(entry, end) \
39 (!(entry) || (entry)->header.length < ACPI_MADT_GICC_MIN_LENGTH || \
40 (unsigned long)(entry) + (entry)->header.length > (end))
41
42 #define ACPI_MADT_GICC_SPE (offsetof(struct acpi_madt_generic_interrupt, \
43 spe_interrupt) + sizeof(u16))
44
45 /* Basic configuration for ACPI */
46 #ifdef CONFIG_ACPI
47 pgprot_t __acpi_get_mem_attribute(phys_addr_t addr);
48
49 /* ACPI table mapping after acpi_permanent_mmap is set */
acpi_os_ioremap(acpi_physical_address phys,acpi_size size)50 static inline void __iomem *acpi_os_ioremap(acpi_physical_address phys,
51 acpi_size size)
52 {
53 /* For normal memory we already have a cacheable mapping. */
54 if (memblock_is_map_memory(phys))
55 return (void __iomem *)__phys_to_virt(phys);
56
57 /*
58 * We should still honor the memory's attribute here because
59 * crash dump kernel possibly excludes some ACPI (reclaim)
60 * regions from memblock list.
61 */
62 return __ioremap(phys, size, __acpi_get_mem_attribute(phys));
63 }
64 #define acpi_os_ioremap acpi_os_ioremap
65
66 typedef u64 phys_cpuid_t;
67 #define PHYS_CPUID_INVALID INVALID_HWID
68
69 #define acpi_strict 1 /* No out-of-spec workarounds on ARM64 */
70 extern int acpi_disabled;
71 extern int acpi_noirq;
72 extern int acpi_pci_disabled;
73
disable_acpi(void)74 static inline void disable_acpi(void)
75 {
76 acpi_disabled = 1;
77 acpi_pci_disabled = 1;
78 acpi_noirq = 1;
79 }
80
enable_acpi(void)81 static inline void enable_acpi(void)
82 {
83 acpi_disabled = 0;
84 acpi_pci_disabled = 0;
85 acpi_noirq = 0;
86 }
87
88 /*
89 * The ACPI processor driver for ACPI core code needs this macro
90 * to find out this cpu was already mapped (mapping from CPU hardware
91 * ID to CPU logical ID) or not.
92 */
93 #define cpu_physical_id(cpu) cpu_logical_map(cpu)
94
95 /*
96 * It's used from ACPI core in kdump to boot UP system with SMP kernel,
97 * with this check the ACPI core will not override the CPU index
98 * obtained from GICC with 0 and not print some error message as well.
99 * Since MADT must provide at least one GICC structure for GIC
100 * initialization, CPU will be always available in MADT on ARM64.
101 */
acpi_has_cpu_in_madt(void)102 static inline bool acpi_has_cpu_in_madt(void)
103 {
104 return true;
105 }
106
107 struct acpi_madt_generic_interrupt *acpi_cpu_get_madt_gicc(int cpu);
get_acpi_id_for_cpu(unsigned int cpu)108 static inline u32 get_acpi_id_for_cpu(unsigned int cpu)
109 {
110 return acpi_cpu_get_madt_gicc(cpu)->uid;
111 }
112
arch_fix_phys_package_id(int num,u32 slot)113 static inline void arch_fix_phys_package_id(int num, u32 slot) { }
114 void __init acpi_init_cpus(void);
115 int apei_claim_sea(struct pt_regs *regs);
116 #else
acpi_init_cpus(void)117 static inline void acpi_init_cpus(void) { }
apei_claim_sea(struct pt_regs * regs)118 static inline int apei_claim_sea(struct pt_regs *regs) { return -ENOENT; }
119 #endif /* CONFIG_ACPI */
120
121 #ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
122 bool acpi_parking_protocol_valid(int cpu);
123 void __init
124 acpi_set_mailbox_entry(int cpu, struct acpi_madt_generic_interrupt *processor);
125 #else
acpi_parking_protocol_valid(int cpu)126 static inline bool acpi_parking_protocol_valid(int cpu) { return false; }
127 static inline void
acpi_set_mailbox_entry(int cpu,struct acpi_madt_generic_interrupt * processor)128 acpi_set_mailbox_entry(int cpu, struct acpi_madt_generic_interrupt *processor)
129 {}
130 #endif
131
acpi_get_enable_method(int cpu)132 static inline const char *acpi_get_enable_method(int cpu)
133 {
134 if (acpi_psci_present())
135 return "psci";
136
137 if (acpi_parking_protocol_valid(cpu))
138 return "parking-protocol";
139
140 return NULL;
141 }
142
143 #ifdef CONFIG_ACPI_APEI
144 /*
145 * acpi_disable_cmcff is used in drivers/acpi/apei/hest.c for disabling
146 * IA-32 Architecture Corrected Machine Check (CMC) Firmware-First mode
147 * with a kernel command line parameter "acpi=nocmcoff". But we don't
148 * have this IA-32 specific feature on ARM64, this definition is only
149 * for compatibility.
150 */
151 #define acpi_disable_cmcff 1
arch_apei_get_mem_attribute(phys_addr_t addr)152 static inline pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr)
153 {
154 return __acpi_get_mem_attribute(addr);
155 }
156 #endif /* CONFIG_ACPI_APEI */
157
158 #ifdef CONFIG_ACPI_NUMA
159 int arm64_acpi_numa_init(void);
160 int acpi_numa_get_nid(unsigned int cpu);
161 void acpi_map_cpus_to_nodes(void);
162 #else
arm64_acpi_numa_init(void)163 static inline int arm64_acpi_numa_init(void) { return -ENOSYS; }
acpi_numa_get_nid(unsigned int cpu)164 static inline int acpi_numa_get_nid(unsigned int cpu) { return NUMA_NO_NODE; }
acpi_map_cpus_to_nodes(void)165 static inline void acpi_map_cpus_to_nodes(void) { }
166 #endif /* CONFIG_ACPI_NUMA */
167
168 #define ACPI_TABLE_UPGRADE_MAX_PHYS MEMBLOCK_ALLOC_ACCESSIBLE
169
170 #endif /*_ASM_ACPI_H*/
171