1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
3
4 #include <linux/console.h>
5 #include <linux/memblock.h>
6 #include <linux/initrd.h>
7 #include <linux/of.h>
8 #include <linux/of_fdt.h>
9 #include <linux/start_kernel.h>
10 #include <linux/dma-contiguous.h>
11 #include <linux/screen_info.h>
12 #include <asm/sections.h>
13 #include <asm/mmu_context.h>
14 #include <asm/pgalloc.h>
15
16 #ifdef CONFIG_DUMMY_CONSOLE
17 struct screen_info screen_info = {
18 .orig_video_lines = 30,
19 .orig_video_cols = 80,
20 .orig_video_mode = 0,
21 .orig_video_ega_bx = 0,
22 .orig_video_isVGA = 1,
23 .orig_video_points = 8
24 };
25 #endif
26
csky_memblock_init(void)27 static void __init csky_memblock_init(void)
28 {
29 unsigned long zone_size[MAX_NR_ZONES];
30 signed long size;
31
32 memblock_reserve(__pa(_stext), _end - _stext);
33 #ifdef CONFIG_BLK_DEV_INITRD
34 memblock_reserve(__pa(initrd_start), initrd_end - initrd_start);
35 #endif
36
37 early_init_fdt_reserve_self();
38 early_init_fdt_scan_reserved_mem();
39
40 memblock_dump_all();
41
42 memset(zone_size, 0, sizeof(zone_size));
43
44 min_low_pfn = PFN_UP(memblock_start_of_DRAM());
45 max_low_pfn = max_pfn = PFN_DOWN(memblock_end_of_DRAM());
46
47 size = max_pfn - min_low_pfn;
48
49 if (size <= PFN_DOWN(SSEG_SIZE - PHYS_OFFSET_OFFSET))
50 zone_size[ZONE_NORMAL] = size;
51 else if (size < PFN_DOWN(LOWMEM_LIMIT - PHYS_OFFSET_OFFSET)) {
52 zone_size[ZONE_NORMAL] =
53 PFN_DOWN(SSEG_SIZE - PHYS_OFFSET_OFFSET);
54 max_low_pfn = min_low_pfn + zone_size[ZONE_NORMAL];
55 } else {
56 zone_size[ZONE_NORMAL] =
57 PFN_DOWN(LOWMEM_LIMIT - PHYS_OFFSET_OFFSET);
58 max_low_pfn = min_low_pfn + zone_size[ZONE_NORMAL];
59 write_mmu_msa1(read_mmu_msa0() + SSEG_SIZE);
60 }
61
62 #ifdef CONFIG_HIGHMEM
63 zone_size[ZONE_HIGHMEM] = max_pfn - max_low_pfn;
64
65 highstart_pfn = max_low_pfn;
66 highend_pfn = max_pfn;
67 #endif
68 memblock_set_current_limit(PFN_PHYS(max_low_pfn));
69
70 dma_contiguous_reserve(0);
71
72 free_area_init_node(0, zone_size, min_low_pfn, NULL);
73 }
74
setup_arch(char ** cmdline_p)75 void __init setup_arch(char **cmdline_p)
76 {
77 *cmdline_p = boot_command_line;
78
79 console_verbose();
80
81 pr_info("Phys. mem: %ldMB\n",
82 (unsigned long) memblock_phys_mem_size()/1024/1024);
83
84 init_mm.start_code = (unsigned long) _stext;
85 init_mm.end_code = (unsigned long) _etext;
86 init_mm.end_data = (unsigned long) _edata;
87 init_mm.brk = (unsigned long) _end;
88
89 parse_early_param();
90
91 csky_memblock_init();
92
93 unflatten_and_copy_device_tree();
94
95 #ifdef CONFIG_SMP
96 setup_smp();
97 #endif
98
99 sparse_init();
100
101 #ifdef CONFIG_HIGHMEM
102 kmap_init();
103 #endif
104
105 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
106 conswitchp = &dummy_con;
107 #endif
108 }
109
110 unsigned long va_pa_offset;
111 EXPORT_SYMBOL(va_pa_offset);
112
csky_start(unsigned int unused,void * dtb_start)113 asmlinkage __visible void __init csky_start(unsigned int unused,
114 void *dtb_start)
115 {
116 /* Clean up bss section */
117 memset(__bss_start, 0, __bss_stop - __bss_start);
118
119 va_pa_offset = read_mmu_msa0() & ~(SSEG_SIZE - 1);
120
121 pre_trap_init();
122 pre_mmu_init();
123
124 if (dtb_start == NULL)
125 early_init_dt_scan(__dtb_start);
126 else
127 early_init_dt_scan(dtb_start);
128
129 start_kernel();
130
131 asm volatile("br .\n");
132 }
133