1 // SPDX-License-Identifier: GPL-2.0+
2 //
3 // Security related flags and so on.
4 //
5 // Copyright 2018, Michael Ellerman, IBM Corporation.
6
7 #include <linux/cpu.h>
8 #include <linux/kernel.h>
9 #include <linux/device.h>
10 #include <linux/seq_buf.h>
11
12 #include <asm/asm-prototypes.h>
13 #include <asm/code-patching.h>
14 #include <asm/debugfs.h>
15 #include <asm/security_features.h>
16 #include <asm/setup.h>
17
18
19 u64 powerpc_security_features __read_mostly = SEC_FTR_DEFAULT;
20
21 enum count_cache_flush_type {
22 COUNT_CACHE_FLUSH_NONE = 0x1,
23 COUNT_CACHE_FLUSH_SW = 0x2,
24 COUNT_CACHE_FLUSH_HW = 0x4,
25 };
26 static enum count_cache_flush_type count_cache_flush_type = COUNT_CACHE_FLUSH_NONE;
27 static bool link_stack_flush_enabled;
28
29 bool barrier_nospec_enabled;
30 static bool no_nospec;
31 static bool btb_flush_enabled;
32 #if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3S_64)
33 static bool no_spectrev2;
34 #endif
35
enable_barrier_nospec(bool enable)36 static void enable_barrier_nospec(bool enable)
37 {
38 barrier_nospec_enabled = enable;
39 do_barrier_nospec_fixups(enable);
40 }
41
setup_barrier_nospec(void)42 void setup_barrier_nospec(void)
43 {
44 bool enable;
45
46 /*
47 * It would make sense to check SEC_FTR_SPEC_BAR_ORI31 below as well.
48 * But there's a good reason not to. The two flags we check below are
49 * both are enabled by default in the kernel, so if the hcall is not
50 * functional they will be enabled.
51 * On a system where the host firmware has been updated (so the ori
52 * functions as a barrier), but on which the hypervisor (KVM/Qemu) has
53 * not been updated, we would like to enable the barrier. Dropping the
54 * check for SEC_FTR_SPEC_BAR_ORI31 achieves that. The only downside is
55 * we potentially enable the barrier on systems where the host firmware
56 * is not updated, but that's harmless as it's a no-op.
57 */
58 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
59 security_ftr_enabled(SEC_FTR_BNDS_CHK_SPEC_BAR);
60
61 if (!no_nospec && !cpu_mitigations_off())
62 enable_barrier_nospec(enable);
63 }
64
handle_nospectre_v1(char * p)65 static int __init handle_nospectre_v1(char *p)
66 {
67 no_nospec = true;
68
69 return 0;
70 }
71 early_param("nospectre_v1", handle_nospectre_v1);
72
73 #ifdef CONFIG_DEBUG_FS
barrier_nospec_set(void * data,u64 val)74 static int barrier_nospec_set(void *data, u64 val)
75 {
76 switch (val) {
77 case 0:
78 case 1:
79 break;
80 default:
81 return -EINVAL;
82 }
83
84 if (!!val == !!barrier_nospec_enabled)
85 return 0;
86
87 enable_barrier_nospec(!!val);
88
89 return 0;
90 }
91
barrier_nospec_get(void * data,u64 * val)92 static int barrier_nospec_get(void *data, u64 *val)
93 {
94 *val = barrier_nospec_enabled ? 1 : 0;
95 return 0;
96 }
97
98 DEFINE_SIMPLE_ATTRIBUTE(fops_barrier_nospec,
99 barrier_nospec_get, barrier_nospec_set, "%llu\n");
100
barrier_nospec_debugfs_init(void)101 static __init int barrier_nospec_debugfs_init(void)
102 {
103 debugfs_create_file("barrier_nospec", 0600, powerpc_debugfs_root, NULL,
104 &fops_barrier_nospec);
105 return 0;
106 }
107 device_initcall(barrier_nospec_debugfs_init);
108
security_feature_debugfs_init(void)109 static __init int security_feature_debugfs_init(void)
110 {
111 debugfs_create_x64("security_features", 0400, powerpc_debugfs_root,
112 &powerpc_security_features);
113 return 0;
114 }
115 device_initcall(security_feature_debugfs_init);
116 #endif /* CONFIG_DEBUG_FS */
117
118 #if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3S_64)
handle_nospectre_v2(char * p)119 static int __init handle_nospectre_v2(char *p)
120 {
121 no_spectrev2 = true;
122
123 return 0;
124 }
125 early_param("nospectre_v2", handle_nospectre_v2);
126 #endif /* CONFIG_PPC_FSL_BOOK3E || CONFIG_PPC_BOOK3S_64 */
127
128 #ifdef CONFIG_PPC_FSL_BOOK3E
setup_spectre_v2(void)129 void setup_spectre_v2(void)
130 {
131 if (no_spectrev2 || cpu_mitigations_off())
132 do_btb_flush_fixups();
133 else
134 btb_flush_enabled = true;
135 }
136 #endif /* CONFIG_PPC_FSL_BOOK3E */
137
138 #ifdef CONFIG_PPC_BOOK3S_64
cpu_show_meltdown(struct device * dev,struct device_attribute * attr,char * buf)139 ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr, char *buf)
140 {
141 bool thread_priv;
142
143 thread_priv = security_ftr_enabled(SEC_FTR_L1D_THREAD_PRIV);
144
145 if (rfi_flush) {
146 struct seq_buf s;
147 seq_buf_init(&s, buf, PAGE_SIZE - 1);
148
149 seq_buf_printf(&s, "Mitigation: RFI Flush");
150 if (thread_priv)
151 seq_buf_printf(&s, ", L1D private per thread");
152
153 seq_buf_printf(&s, "\n");
154
155 return s.len;
156 }
157
158 if (thread_priv)
159 return sprintf(buf, "Vulnerable: L1D private per thread\n");
160
161 if (!security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) &&
162 !security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR))
163 return sprintf(buf, "Not affected\n");
164
165 return sprintf(buf, "Vulnerable\n");
166 }
167
cpu_show_l1tf(struct device * dev,struct device_attribute * attr,char * buf)168 ssize_t cpu_show_l1tf(struct device *dev, struct device_attribute *attr, char *buf)
169 {
170 return cpu_show_meltdown(dev, attr, buf);
171 }
172 #endif
173
cpu_show_spectre_v1(struct device * dev,struct device_attribute * attr,char * buf)174 ssize_t cpu_show_spectre_v1(struct device *dev, struct device_attribute *attr, char *buf)
175 {
176 struct seq_buf s;
177
178 seq_buf_init(&s, buf, PAGE_SIZE - 1);
179
180 if (security_ftr_enabled(SEC_FTR_BNDS_CHK_SPEC_BAR)) {
181 if (barrier_nospec_enabled)
182 seq_buf_printf(&s, "Mitigation: __user pointer sanitization");
183 else
184 seq_buf_printf(&s, "Vulnerable");
185
186 if (security_ftr_enabled(SEC_FTR_SPEC_BAR_ORI31))
187 seq_buf_printf(&s, ", ori31 speculation barrier enabled");
188
189 seq_buf_printf(&s, "\n");
190 } else
191 seq_buf_printf(&s, "Not affected\n");
192
193 return s.len;
194 }
195
cpu_show_spectre_v2(struct device * dev,struct device_attribute * attr,char * buf)196 ssize_t cpu_show_spectre_v2(struct device *dev, struct device_attribute *attr, char *buf)
197 {
198 struct seq_buf s;
199 bool bcs, ccd;
200
201 seq_buf_init(&s, buf, PAGE_SIZE - 1);
202
203 bcs = security_ftr_enabled(SEC_FTR_BCCTRL_SERIALISED);
204 ccd = security_ftr_enabled(SEC_FTR_COUNT_CACHE_DISABLED);
205
206 if (bcs || ccd) {
207 seq_buf_printf(&s, "Mitigation: ");
208
209 if (bcs)
210 seq_buf_printf(&s, "Indirect branch serialisation (kernel only)");
211
212 if (bcs && ccd)
213 seq_buf_printf(&s, ", ");
214
215 if (ccd)
216 seq_buf_printf(&s, "Indirect branch cache disabled");
217
218 if (link_stack_flush_enabled)
219 seq_buf_printf(&s, ", Software link stack flush");
220
221 } else if (count_cache_flush_type != COUNT_CACHE_FLUSH_NONE) {
222 seq_buf_printf(&s, "Mitigation: Software count cache flush");
223
224 if (count_cache_flush_type == COUNT_CACHE_FLUSH_HW)
225 seq_buf_printf(&s, " (hardware accelerated)");
226
227 if (link_stack_flush_enabled)
228 seq_buf_printf(&s, ", Software link stack flush");
229
230 } else if (btb_flush_enabled) {
231 seq_buf_printf(&s, "Mitigation: Branch predictor state flush");
232 } else {
233 seq_buf_printf(&s, "Vulnerable");
234 }
235
236 seq_buf_printf(&s, "\n");
237
238 return s.len;
239 }
240
241 #ifdef CONFIG_PPC_BOOK3S_64
242 /*
243 * Store-forwarding barrier support.
244 */
245
246 static enum stf_barrier_type stf_enabled_flush_types;
247 static bool no_stf_barrier;
248 bool stf_barrier;
249
handle_no_stf_barrier(char * p)250 static int __init handle_no_stf_barrier(char *p)
251 {
252 pr_info("stf-barrier: disabled on command line.");
253 no_stf_barrier = true;
254 return 0;
255 }
256
257 early_param("no_stf_barrier", handle_no_stf_barrier);
258
stf_barrier_type_get(void)259 enum stf_barrier_type stf_barrier_type_get(void)
260 {
261 return stf_enabled_flush_types;
262 }
263
264 /* This is the generic flag used by other architectures */
handle_ssbd(char * p)265 static int __init handle_ssbd(char *p)
266 {
267 if (!p || strncmp(p, "auto", 5) == 0 || strncmp(p, "on", 2) == 0 ) {
268 /* Until firmware tells us, we have the barrier with auto */
269 return 0;
270 } else if (strncmp(p, "off", 3) == 0) {
271 handle_no_stf_barrier(NULL);
272 return 0;
273 } else
274 return 1;
275
276 return 0;
277 }
278 early_param("spec_store_bypass_disable", handle_ssbd);
279
280 /* This is the generic flag used by other architectures */
handle_no_ssbd(char * p)281 static int __init handle_no_ssbd(char *p)
282 {
283 handle_no_stf_barrier(NULL);
284 return 0;
285 }
286 early_param("nospec_store_bypass_disable", handle_no_ssbd);
287
stf_barrier_enable(bool enable)288 static void stf_barrier_enable(bool enable)
289 {
290 if (enable)
291 do_stf_barrier_fixups(stf_enabled_flush_types);
292 else
293 do_stf_barrier_fixups(STF_BARRIER_NONE);
294
295 stf_barrier = enable;
296 }
297
setup_stf_barrier(void)298 void setup_stf_barrier(void)
299 {
300 enum stf_barrier_type type;
301 bool enable, hv;
302
303 hv = cpu_has_feature(CPU_FTR_HVMODE);
304
305 /* Default to fallback in case fw-features are not available */
306 if (cpu_has_feature(CPU_FTR_ARCH_300))
307 type = STF_BARRIER_EIEIO;
308 else if (cpu_has_feature(CPU_FTR_ARCH_207S))
309 type = STF_BARRIER_SYNC_ORI;
310 else if (cpu_has_feature(CPU_FTR_ARCH_206))
311 type = STF_BARRIER_FALLBACK;
312 else
313 type = STF_BARRIER_NONE;
314
315 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
316 (security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR) ||
317 (security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) && hv));
318
319 if (type == STF_BARRIER_FALLBACK) {
320 pr_info("stf-barrier: fallback barrier available\n");
321 } else if (type == STF_BARRIER_SYNC_ORI) {
322 pr_info("stf-barrier: hwsync barrier available\n");
323 } else if (type == STF_BARRIER_EIEIO) {
324 pr_info("stf-barrier: eieio barrier available\n");
325 }
326
327 stf_enabled_flush_types = type;
328
329 if (!no_stf_barrier && !cpu_mitigations_off())
330 stf_barrier_enable(enable);
331 }
332
cpu_show_spec_store_bypass(struct device * dev,struct device_attribute * attr,char * buf)333 ssize_t cpu_show_spec_store_bypass(struct device *dev, struct device_attribute *attr, char *buf)
334 {
335 if (stf_barrier && stf_enabled_flush_types != STF_BARRIER_NONE) {
336 const char *type;
337 switch (stf_enabled_flush_types) {
338 case STF_BARRIER_EIEIO:
339 type = "eieio";
340 break;
341 case STF_BARRIER_SYNC_ORI:
342 type = "hwsync";
343 break;
344 case STF_BARRIER_FALLBACK:
345 type = "fallback";
346 break;
347 default:
348 type = "unknown";
349 }
350 return sprintf(buf, "Mitigation: Kernel entry/exit barrier (%s)\n", type);
351 }
352
353 if (!security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) &&
354 !security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR))
355 return sprintf(buf, "Not affected\n");
356
357 return sprintf(buf, "Vulnerable\n");
358 }
359
360 #ifdef CONFIG_DEBUG_FS
stf_barrier_set(void * data,u64 val)361 static int stf_barrier_set(void *data, u64 val)
362 {
363 bool enable;
364
365 if (val == 1)
366 enable = true;
367 else if (val == 0)
368 enable = false;
369 else
370 return -EINVAL;
371
372 /* Only do anything if we're changing state */
373 if (enable != stf_barrier)
374 stf_barrier_enable(enable);
375
376 return 0;
377 }
378
stf_barrier_get(void * data,u64 * val)379 static int stf_barrier_get(void *data, u64 *val)
380 {
381 *val = stf_barrier ? 1 : 0;
382 return 0;
383 }
384
385 DEFINE_SIMPLE_ATTRIBUTE(fops_stf_barrier, stf_barrier_get, stf_barrier_set, "%llu\n");
386
stf_barrier_debugfs_init(void)387 static __init int stf_barrier_debugfs_init(void)
388 {
389 debugfs_create_file("stf_barrier", 0600, powerpc_debugfs_root, NULL, &fops_stf_barrier);
390 return 0;
391 }
392 device_initcall(stf_barrier_debugfs_init);
393 #endif /* CONFIG_DEBUG_FS */
394
no_count_cache_flush(void)395 static void no_count_cache_flush(void)
396 {
397 count_cache_flush_type = COUNT_CACHE_FLUSH_NONE;
398 pr_info("count-cache-flush: software flush disabled.\n");
399 }
400
toggle_count_cache_flush(bool enable)401 static void toggle_count_cache_flush(bool enable)
402 {
403 if (!security_ftr_enabled(SEC_FTR_FLUSH_COUNT_CACHE) &&
404 !security_ftr_enabled(SEC_FTR_FLUSH_LINK_STACK))
405 enable = false;
406
407 if (!enable) {
408 patch_instruction_site(&patch__call_flush_count_cache, PPC_INST_NOP);
409 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
410 patch_instruction_site(&patch__call_kvm_flush_link_stack, PPC_INST_NOP);
411 #endif
412 pr_info("link-stack-flush: software flush disabled.\n");
413 link_stack_flush_enabled = false;
414 no_count_cache_flush();
415 return;
416 }
417
418 // This enables the branch from _switch to flush_count_cache
419 patch_branch_site(&patch__call_flush_count_cache,
420 (u64)&flush_count_cache, BRANCH_SET_LINK);
421
422 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
423 // This enables the branch from guest_exit_cont to kvm_flush_link_stack
424 patch_branch_site(&patch__call_kvm_flush_link_stack,
425 (u64)&kvm_flush_link_stack, BRANCH_SET_LINK);
426 #endif
427
428 pr_info("link-stack-flush: software flush enabled.\n");
429 link_stack_flush_enabled = true;
430
431 // If we just need to flush the link stack, patch an early return
432 if (!security_ftr_enabled(SEC_FTR_FLUSH_COUNT_CACHE)) {
433 patch_instruction_site(&patch__flush_link_stack_return, PPC_INST_BLR);
434 no_count_cache_flush();
435 return;
436 }
437
438 if (!security_ftr_enabled(SEC_FTR_BCCTR_FLUSH_ASSIST)) {
439 count_cache_flush_type = COUNT_CACHE_FLUSH_SW;
440 pr_info("count-cache-flush: full software flush sequence enabled.\n");
441 return;
442 }
443
444 patch_instruction_site(&patch__flush_count_cache_return, PPC_INST_BLR);
445 count_cache_flush_type = COUNT_CACHE_FLUSH_HW;
446 pr_info("count-cache-flush: hardware assisted flush sequence enabled\n");
447 }
448
setup_count_cache_flush(void)449 void setup_count_cache_flush(void)
450 {
451 bool enable = true;
452
453 if (no_spectrev2 || cpu_mitigations_off()) {
454 if (security_ftr_enabled(SEC_FTR_BCCTRL_SERIALISED) ||
455 security_ftr_enabled(SEC_FTR_COUNT_CACHE_DISABLED))
456 pr_warn("Spectre v2 mitigations not fully under software control, can't disable\n");
457
458 enable = false;
459 }
460
461 /*
462 * There's no firmware feature flag/hypervisor bit to tell us we need to
463 * flush the link stack on context switch. So we set it here if we see
464 * either of the Spectre v2 mitigations that aim to protect userspace.
465 */
466 if (security_ftr_enabled(SEC_FTR_COUNT_CACHE_DISABLED) ||
467 security_ftr_enabled(SEC_FTR_FLUSH_COUNT_CACHE))
468 security_ftr_set(SEC_FTR_FLUSH_LINK_STACK);
469
470 toggle_count_cache_flush(enable);
471 }
472
473 #ifdef CONFIG_DEBUG_FS
count_cache_flush_set(void * data,u64 val)474 static int count_cache_flush_set(void *data, u64 val)
475 {
476 bool enable;
477
478 if (val == 1)
479 enable = true;
480 else if (val == 0)
481 enable = false;
482 else
483 return -EINVAL;
484
485 toggle_count_cache_flush(enable);
486
487 return 0;
488 }
489
count_cache_flush_get(void * data,u64 * val)490 static int count_cache_flush_get(void *data, u64 *val)
491 {
492 if (count_cache_flush_type == COUNT_CACHE_FLUSH_NONE)
493 *val = 0;
494 else
495 *val = 1;
496
497 return 0;
498 }
499
500 DEFINE_SIMPLE_ATTRIBUTE(fops_count_cache_flush, count_cache_flush_get,
501 count_cache_flush_set, "%llu\n");
502
count_cache_flush_debugfs_init(void)503 static __init int count_cache_flush_debugfs_init(void)
504 {
505 debugfs_create_file("count_cache_flush", 0600, powerpc_debugfs_root,
506 NULL, &fops_count_cache_flush);
507 return 0;
508 }
509 device_initcall(count_cache_flush_debugfs_init);
510 #endif /* CONFIG_DEBUG_FS */
511 #endif /* CONFIG_PPC_BOOK3S_64 */
512