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1 #include <linux/gfp.h>
2 #include <linux/initrd.h>
3 #include <linux/ioport.h>
4 #include <linux/swap.h>
5 #include <linux/memblock.h>
6 #include <linux/swapfile.h>
7 #include <linux/swapops.h>
8 #include <linux/kmemleak.h>
9 #include <linux/sched/task.h>
10 #include <linux/sched/mm.h>
11 
12 #include <asm/set_memory.h>
13 #include <asm/cpu_device_id.h>
14 #include <asm/e820/api.h>
15 #include <asm/init.h>
16 #include <asm/page.h>
17 #include <asm/page_types.h>
18 #include <asm/sections.h>
19 #include <asm/setup.h>
20 #include <asm/tlbflush.h>
21 #include <asm/tlb.h>
22 #include <asm/proto.h>
23 #include <asm/dma.h>		/* for MAX_DMA_PFN */
24 #include <asm/microcode.h>
25 #include <asm/kaslr.h>
26 #include <asm/hypervisor.h>
27 #include <asm/cpufeature.h>
28 #include <asm/pti.h>
29 #include <asm/text-patching.h>
30 #include <asm/paravirt.h>
31 
32 /*
33  * We need to define the tracepoints somewhere, and tlb.c
34  * is only compied when SMP=y.
35  */
36 #define CREATE_TRACE_POINTS
37 #include <trace/events/tlb.h>
38 
39 #include "mm_internal.h"
40 
41 /*
42  * Tables translating between page_cache_type_t and pte encoding.
43  *
44  * The default values are defined statically as minimal supported mode;
45  * WC and WT fall back to UC-.  pat_init() updates these values to support
46  * more cache modes, WC and WT, when it is safe to do so.  See pat_init()
47  * for the details.  Note, __early_ioremap() used during early boot-time
48  * takes pgprot_t (pte encoding) and does not use these tables.
49  *
50  *   Index into __cachemode2pte_tbl[] is the cachemode.
51  *
52  *   Index into __pte2cachemode_tbl[] are the caching attribute bits of the pte
53  *   (_PAGE_PWT, _PAGE_PCD, _PAGE_PAT) at index bit positions 0, 1, 2.
54  */
55 uint16_t __cachemode2pte_tbl[_PAGE_CACHE_MODE_NUM] = {
56 	[_PAGE_CACHE_MODE_WB      ]	= 0         | 0        ,
57 	[_PAGE_CACHE_MODE_WC      ]	= 0         | _PAGE_PCD,
58 	[_PAGE_CACHE_MODE_UC_MINUS]	= 0         | _PAGE_PCD,
59 	[_PAGE_CACHE_MODE_UC      ]	= _PAGE_PWT | _PAGE_PCD,
60 	[_PAGE_CACHE_MODE_WT      ]	= 0         | _PAGE_PCD,
61 	[_PAGE_CACHE_MODE_WP      ]	= 0         | _PAGE_PCD,
62 };
63 EXPORT_SYMBOL(__cachemode2pte_tbl);
64 
65 uint8_t __pte2cachemode_tbl[8] = {
66 	[__pte2cm_idx( 0        | 0         | 0        )] = _PAGE_CACHE_MODE_WB,
67 	[__pte2cm_idx(_PAGE_PWT | 0         | 0        )] = _PAGE_CACHE_MODE_UC_MINUS,
68 	[__pte2cm_idx( 0        | _PAGE_PCD | 0        )] = _PAGE_CACHE_MODE_UC_MINUS,
69 	[__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | 0        )] = _PAGE_CACHE_MODE_UC,
70 	[__pte2cm_idx( 0        | 0         | _PAGE_PAT)] = _PAGE_CACHE_MODE_WB,
71 	[__pte2cm_idx(_PAGE_PWT | 0         | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS,
72 	[__pte2cm_idx(0         | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS,
73 	[__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC,
74 };
75 EXPORT_SYMBOL(__pte2cachemode_tbl);
76 
77 static unsigned long __initdata pgt_buf_start;
78 static unsigned long __initdata pgt_buf_end;
79 static unsigned long __initdata pgt_buf_top;
80 
81 static unsigned long min_pfn_mapped;
82 
83 static bool __initdata can_use_brk_pgt = true;
84 
85 /*
86  * Pages returned are already directly mapped.
87  *
88  * Changing that is likely to break Xen, see commit:
89  *
90  *    279b706 x86,xen: introduce x86_init.mapping.pagetable_reserve
91  *
92  * for detailed information.
93  */
alloc_low_pages(unsigned int num)94 __ref void *alloc_low_pages(unsigned int num)
95 {
96 	unsigned long pfn;
97 	int i;
98 
99 	if (after_bootmem) {
100 		unsigned int order;
101 
102 		order = get_order((unsigned long)num << PAGE_SHIFT);
103 		return (void *)__get_free_pages(GFP_ATOMIC | __GFP_ZERO, order);
104 	}
105 
106 	if ((pgt_buf_end + num) > pgt_buf_top || !can_use_brk_pgt) {
107 		unsigned long ret = 0;
108 
109 		if (min_pfn_mapped < max_pfn_mapped) {
110 			ret = memblock_find_in_range(
111 					min_pfn_mapped << PAGE_SHIFT,
112 					max_pfn_mapped << PAGE_SHIFT,
113 					PAGE_SIZE * num , PAGE_SIZE);
114 		}
115 		if (ret)
116 			memblock_reserve(ret, PAGE_SIZE * num);
117 		else if (can_use_brk_pgt)
118 			ret = __pa(extend_brk(PAGE_SIZE * num, PAGE_SIZE));
119 
120 		if (!ret)
121 			panic("alloc_low_pages: can not alloc memory");
122 
123 		pfn = ret >> PAGE_SHIFT;
124 	} else {
125 		pfn = pgt_buf_end;
126 		pgt_buf_end += num;
127 	}
128 
129 	for (i = 0; i < num; i++) {
130 		void *adr;
131 
132 		adr = __va((pfn + i) << PAGE_SHIFT);
133 		clear_page(adr);
134 	}
135 
136 	return __va(pfn << PAGE_SHIFT);
137 }
138 
139 /*
140  * By default need 3 4k for initial PMD_SIZE,  3 4k for 0-ISA_END_ADDRESS.
141  * With KASLR memory randomization, depending on the machine e820 memory
142  * and the PUD alignment. We may need twice more pages when KASLR memory
143  * randomization is enabled.
144  */
145 #ifndef CONFIG_RANDOMIZE_MEMORY
146 #define INIT_PGD_PAGE_COUNT      6
147 #else
148 #define INIT_PGD_PAGE_COUNT      12
149 #endif
150 #define INIT_PGT_BUF_SIZE	(INIT_PGD_PAGE_COUNT * PAGE_SIZE)
151 RESERVE_BRK(early_pgt_alloc, INIT_PGT_BUF_SIZE);
early_alloc_pgt_buf(void)152 void  __init early_alloc_pgt_buf(void)
153 {
154 	unsigned long tables = INIT_PGT_BUF_SIZE;
155 	phys_addr_t base;
156 
157 	base = __pa(extend_brk(tables, PAGE_SIZE));
158 
159 	pgt_buf_start = base >> PAGE_SHIFT;
160 	pgt_buf_end = pgt_buf_start;
161 	pgt_buf_top = pgt_buf_start + (tables >> PAGE_SHIFT);
162 }
163 
164 int after_bootmem;
165 
166 early_param_on_off("gbpages", "nogbpages", direct_gbpages, CONFIG_X86_DIRECT_GBPAGES);
167 
168 struct map_range {
169 	unsigned long start;
170 	unsigned long end;
171 	unsigned page_size_mask;
172 };
173 
174 static int page_size_mask;
175 
probe_page_size_mask(void)176 static void __init probe_page_size_mask(void)
177 {
178 	/*
179 	 * For pagealloc debugging, identity mapping will use small pages.
180 	 * This will simplify cpa(), which otherwise needs to support splitting
181 	 * large pages into small in interrupt context, etc.
182 	 */
183 	if (boot_cpu_has(X86_FEATURE_PSE) && !debug_pagealloc_enabled())
184 		page_size_mask |= 1 << PG_LEVEL_2M;
185 	else
186 		direct_gbpages = 0;
187 
188 	/* Enable PSE if available */
189 	if (boot_cpu_has(X86_FEATURE_PSE))
190 		cr4_set_bits_and_update_boot(X86_CR4_PSE);
191 
192 	/* Enable PGE if available */
193 	__supported_pte_mask &= ~_PAGE_GLOBAL;
194 	if (boot_cpu_has(X86_FEATURE_PGE)) {
195 		cr4_set_bits_and_update_boot(X86_CR4_PGE);
196 		__supported_pte_mask |= _PAGE_GLOBAL;
197 	}
198 
199 	/* By the default is everything supported: */
200 	__default_kernel_pte_mask = __supported_pte_mask;
201 	/* Except when with PTI where the kernel is mostly non-Global: */
202 	if (cpu_feature_enabled(X86_FEATURE_PTI))
203 		__default_kernel_pte_mask &= ~_PAGE_GLOBAL;
204 
205 	/* Enable 1 GB linear kernel mappings if available: */
206 	if (direct_gbpages && boot_cpu_has(X86_FEATURE_GBPAGES)) {
207 		printk(KERN_INFO "Using GB pages for direct mapping\n");
208 		page_size_mask |= 1 << PG_LEVEL_1G;
209 	} else {
210 		direct_gbpages = 0;
211 	}
212 }
213 
214 #define INTEL_MATCH(_model) { .vendor  = X86_VENDOR_INTEL,	\
215 			      .family  = 6,			\
216 			      .model = _model,			\
217 			    }
218 /*
219  * INVLPG may not properly flush Global entries
220  * on these CPUs when PCIDs are enabled.
221  */
222 static const struct x86_cpu_id invlpg_miss_ids[] = {
223 	INTEL_MATCH(INTEL_FAM6_ALDERLAKE   ),
224 	INTEL_MATCH(INTEL_FAM6_ALDERLAKE_L ),
225 	INTEL_MATCH(INTEL_FAM6_ALDERLAKE_N ),
226 	INTEL_MATCH(INTEL_FAM6_RAPTORLAKE  ),
227 	INTEL_MATCH(INTEL_FAM6_RAPTORLAKE_P),
228 	INTEL_MATCH(INTEL_FAM6_RAPTORLAKE_S),
229 	{}
230 };
231 
setup_pcid(void)232 static void setup_pcid(void)
233 {
234 	if (!IS_ENABLED(CONFIG_X86_64))
235 		return;
236 
237 	if (!boot_cpu_has(X86_FEATURE_PCID))
238 		return;
239 
240 	if (x86_match_cpu(invlpg_miss_ids)) {
241 		pr_info("Incomplete global flushes, disabling PCID");
242 		setup_clear_cpu_cap(X86_FEATURE_PCID);
243 		return;
244 	}
245 
246 	if (boot_cpu_has(X86_FEATURE_PGE)) {
247 		/*
248 		 * This can't be cr4_set_bits_and_update_boot() -- the
249 		 * trampoline code can't handle CR4.PCIDE and it wouldn't
250 		 * do any good anyway.  Despite the name,
251 		 * cr4_set_bits_and_update_boot() doesn't actually cause
252 		 * the bits in question to remain set all the way through
253 		 * the secondary boot asm.
254 		 *
255 		 * Instead, we brute-force it and set CR4.PCIDE manually in
256 		 * start_secondary().
257 		 */
258 		cr4_set_bits(X86_CR4_PCIDE);
259 
260 		/*
261 		 * INVPCID's single-context modes (2/3) only work if we set
262 		 * X86_CR4_PCIDE, *and* we INVPCID support.  It's unusable
263 		 * on systems that have X86_CR4_PCIDE clear, or that have
264 		 * no INVPCID support at all.
265 		 */
266 		if (boot_cpu_has(X86_FEATURE_INVPCID))
267 			setup_force_cpu_cap(X86_FEATURE_INVPCID_SINGLE);
268 	} else {
269 		/*
270 		 * flush_tlb_all(), as currently implemented, won't work if
271 		 * PCID is on but PGE is not.  Since that combination
272 		 * doesn't exist on real hardware, there's no reason to try
273 		 * to fully support it, but it's polite to avoid corrupting
274 		 * data if we're on an improperly configured VM.
275 		 */
276 		setup_clear_cpu_cap(X86_FEATURE_PCID);
277 	}
278 }
279 
280 #ifdef CONFIG_X86_32
281 #define NR_RANGE_MR 3
282 #else /* CONFIG_X86_64 */
283 #define NR_RANGE_MR 5
284 #endif
285 
save_mr(struct map_range * mr,int nr_range,unsigned long start_pfn,unsigned long end_pfn,unsigned long page_size_mask)286 static int __meminit save_mr(struct map_range *mr, int nr_range,
287 			     unsigned long start_pfn, unsigned long end_pfn,
288 			     unsigned long page_size_mask)
289 {
290 	if (start_pfn < end_pfn) {
291 		if (nr_range >= NR_RANGE_MR)
292 			panic("run out of range for init_memory_mapping\n");
293 		mr[nr_range].start = start_pfn<<PAGE_SHIFT;
294 		mr[nr_range].end   = end_pfn<<PAGE_SHIFT;
295 		mr[nr_range].page_size_mask = page_size_mask;
296 		nr_range++;
297 	}
298 
299 	return nr_range;
300 }
301 
302 /*
303  * adjust the page_size_mask for small range to go with
304  *	big page size instead small one if nearby are ram too.
305  */
adjust_range_page_size_mask(struct map_range * mr,int nr_range)306 static void __ref adjust_range_page_size_mask(struct map_range *mr,
307 							 int nr_range)
308 {
309 	int i;
310 
311 	for (i = 0; i < nr_range; i++) {
312 		if ((page_size_mask & (1<<PG_LEVEL_2M)) &&
313 		    !(mr[i].page_size_mask & (1<<PG_LEVEL_2M))) {
314 			unsigned long start = round_down(mr[i].start, PMD_SIZE);
315 			unsigned long end = round_up(mr[i].end, PMD_SIZE);
316 
317 #ifdef CONFIG_X86_32
318 			if ((end >> PAGE_SHIFT) > max_low_pfn)
319 				continue;
320 #endif
321 
322 			if (memblock_is_region_memory(start, end - start))
323 				mr[i].page_size_mask |= 1<<PG_LEVEL_2M;
324 		}
325 		if ((page_size_mask & (1<<PG_LEVEL_1G)) &&
326 		    !(mr[i].page_size_mask & (1<<PG_LEVEL_1G))) {
327 			unsigned long start = round_down(mr[i].start, PUD_SIZE);
328 			unsigned long end = round_up(mr[i].end, PUD_SIZE);
329 
330 			if (memblock_is_region_memory(start, end - start))
331 				mr[i].page_size_mask |= 1<<PG_LEVEL_1G;
332 		}
333 	}
334 }
335 
page_size_string(struct map_range * mr)336 static const char *page_size_string(struct map_range *mr)
337 {
338 	static const char str_1g[] = "1G";
339 	static const char str_2m[] = "2M";
340 	static const char str_4m[] = "4M";
341 	static const char str_4k[] = "4k";
342 
343 	if (mr->page_size_mask & (1<<PG_LEVEL_1G))
344 		return str_1g;
345 	/*
346 	 * 32-bit without PAE has a 4M large page size.
347 	 * PG_LEVEL_2M is misnamed, but we can at least
348 	 * print out the right size in the string.
349 	 */
350 	if (IS_ENABLED(CONFIG_X86_32) &&
351 	    !IS_ENABLED(CONFIG_X86_PAE) &&
352 	    mr->page_size_mask & (1<<PG_LEVEL_2M))
353 		return str_4m;
354 
355 	if (mr->page_size_mask & (1<<PG_LEVEL_2M))
356 		return str_2m;
357 
358 	return str_4k;
359 }
360 
split_mem_range(struct map_range * mr,int nr_range,unsigned long start,unsigned long end)361 static int __meminit split_mem_range(struct map_range *mr, int nr_range,
362 				     unsigned long start,
363 				     unsigned long end)
364 {
365 	unsigned long start_pfn, end_pfn, limit_pfn;
366 	unsigned long pfn;
367 	int i;
368 
369 	limit_pfn = PFN_DOWN(end);
370 
371 	/* head if not big page alignment ? */
372 	pfn = start_pfn = PFN_DOWN(start);
373 #ifdef CONFIG_X86_32
374 	/*
375 	 * Don't use a large page for the first 2/4MB of memory
376 	 * because there are often fixed size MTRRs in there
377 	 * and overlapping MTRRs into large pages can cause
378 	 * slowdowns.
379 	 */
380 	if (pfn == 0)
381 		end_pfn = PFN_DOWN(PMD_SIZE);
382 	else
383 		end_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
384 #else /* CONFIG_X86_64 */
385 	end_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
386 #endif
387 	if (end_pfn > limit_pfn)
388 		end_pfn = limit_pfn;
389 	if (start_pfn < end_pfn) {
390 		nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 0);
391 		pfn = end_pfn;
392 	}
393 
394 	/* big page (2M) range */
395 	start_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
396 #ifdef CONFIG_X86_32
397 	end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE));
398 #else /* CONFIG_X86_64 */
399 	end_pfn = round_up(pfn, PFN_DOWN(PUD_SIZE));
400 	if (end_pfn > round_down(limit_pfn, PFN_DOWN(PMD_SIZE)))
401 		end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE));
402 #endif
403 
404 	if (start_pfn < end_pfn) {
405 		nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
406 				page_size_mask & (1<<PG_LEVEL_2M));
407 		pfn = end_pfn;
408 	}
409 
410 #ifdef CONFIG_X86_64
411 	/* big page (1G) range */
412 	start_pfn = round_up(pfn, PFN_DOWN(PUD_SIZE));
413 	end_pfn = round_down(limit_pfn, PFN_DOWN(PUD_SIZE));
414 	if (start_pfn < end_pfn) {
415 		nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
416 				page_size_mask &
417 				 ((1<<PG_LEVEL_2M)|(1<<PG_LEVEL_1G)));
418 		pfn = end_pfn;
419 	}
420 
421 	/* tail is not big page (1G) alignment */
422 	start_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
423 	end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE));
424 	if (start_pfn < end_pfn) {
425 		nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
426 				page_size_mask & (1<<PG_LEVEL_2M));
427 		pfn = end_pfn;
428 	}
429 #endif
430 
431 	/* tail is not big page (2M) alignment */
432 	start_pfn = pfn;
433 	end_pfn = limit_pfn;
434 	nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 0);
435 
436 	if (!after_bootmem)
437 		adjust_range_page_size_mask(mr, nr_range);
438 
439 	/* try to merge same page size and continuous */
440 	for (i = 0; nr_range > 1 && i < nr_range - 1; i++) {
441 		unsigned long old_start;
442 		if (mr[i].end != mr[i+1].start ||
443 		    mr[i].page_size_mask != mr[i+1].page_size_mask)
444 			continue;
445 		/* move it */
446 		old_start = mr[i].start;
447 		memmove(&mr[i], &mr[i+1],
448 			(nr_range - 1 - i) * sizeof(struct map_range));
449 		mr[i--].start = old_start;
450 		nr_range--;
451 	}
452 
453 	for (i = 0; i < nr_range; i++)
454 		pr_debug(" [mem %#010lx-%#010lx] page %s\n",
455 				mr[i].start, mr[i].end - 1,
456 				page_size_string(&mr[i]));
457 
458 	return nr_range;
459 }
460 
461 struct range pfn_mapped[E820_MAX_ENTRIES];
462 int nr_pfn_mapped;
463 
add_pfn_range_mapped(unsigned long start_pfn,unsigned long end_pfn)464 static void add_pfn_range_mapped(unsigned long start_pfn, unsigned long end_pfn)
465 {
466 	nr_pfn_mapped = add_range_with_merge(pfn_mapped, E820_MAX_ENTRIES,
467 					     nr_pfn_mapped, start_pfn, end_pfn);
468 	nr_pfn_mapped = clean_sort_range(pfn_mapped, E820_MAX_ENTRIES);
469 
470 	max_pfn_mapped = max(max_pfn_mapped, end_pfn);
471 
472 	if (start_pfn < (1UL<<(32-PAGE_SHIFT)))
473 		max_low_pfn_mapped = max(max_low_pfn_mapped,
474 					 min(end_pfn, 1UL<<(32-PAGE_SHIFT)));
475 }
476 
pfn_range_is_mapped(unsigned long start_pfn,unsigned long end_pfn)477 bool pfn_range_is_mapped(unsigned long start_pfn, unsigned long end_pfn)
478 {
479 	int i;
480 
481 	for (i = 0; i < nr_pfn_mapped; i++)
482 		if ((start_pfn >= pfn_mapped[i].start) &&
483 		    (end_pfn <= pfn_mapped[i].end))
484 			return true;
485 
486 	return false;
487 }
488 
489 /*
490  * Setup the direct mapping of the physical memory at PAGE_OFFSET.
491  * This runs before bootmem is initialized and gets pages directly from
492  * the physical memory. To access them they are temporarily mapped.
493  */
init_memory_mapping(unsigned long start,unsigned long end)494 unsigned long __ref init_memory_mapping(unsigned long start,
495 					       unsigned long end)
496 {
497 	struct map_range mr[NR_RANGE_MR];
498 	unsigned long ret = 0;
499 	int nr_range, i;
500 
501 	pr_debug("init_memory_mapping: [mem %#010lx-%#010lx]\n",
502 	       start, end - 1);
503 
504 	memset(mr, 0, sizeof(mr));
505 	nr_range = split_mem_range(mr, 0, start, end);
506 
507 	for (i = 0; i < nr_range; i++)
508 		ret = kernel_physical_mapping_init(mr[i].start, mr[i].end,
509 						   mr[i].page_size_mask);
510 
511 	add_pfn_range_mapped(start >> PAGE_SHIFT, ret >> PAGE_SHIFT);
512 
513 	return ret >> PAGE_SHIFT;
514 }
515 
516 /*
517  * We need to iterate through the E820 memory map and create direct mappings
518  * for only E820_TYPE_RAM and E820_KERN_RESERVED regions. We cannot simply
519  * create direct mappings for all pfns from [0 to max_low_pfn) and
520  * [4GB to max_pfn) because of possible memory holes in high addresses
521  * that cannot be marked as UC by fixed/variable range MTRRs.
522  * Depending on the alignment of E820 ranges, this may possibly result
523  * in using smaller size (i.e. 4K instead of 2M or 1G) page tables.
524  *
525  * init_mem_mapping() calls init_range_memory_mapping() with big range.
526  * That range would have hole in the middle or ends, and only ram parts
527  * will be mapped in init_range_memory_mapping().
528  */
init_range_memory_mapping(unsigned long r_start,unsigned long r_end)529 static unsigned long __init init_range_memory_mapping(
530 					   unsigned long r_start,
531 					   unsigned long r_end)
532 {
533 	unsigned long start_pfn, end_pfn;
534 	unsigned long mapped_ram_size = 0;
535 	int i;
536 
537 	for_each_mem_pfn_range(i, MAX_NUMNODES, &start_pfn, &end_pfn, NULL) {
538 		u64 start = clamp_val(PFN_PHYS(start_pfn), r_start, r_end);
539 		u64 end = clamp_val(PFN_PHYS(end_pfn), r_start, r_end);
540 		if (start >= end)
541 			continue;
542 
543 		/*
544 		 * if it is overlapping with brk pgt, we need to
545 		 * alloc pgt buf from memblock instead.
546 		 */
547 		can_use_brk_pgt = max(start, (u64)pgt_buf_end<<PAGE_SHIFT) >=
548 				    min(end, (u64)pgt_buf_top<<PAGE_SHIFT);
549 		init_memory_mapping(start, end);
550 		mapped_ram_size += end - start;
551 		can_use_brk_pgt = true;
552 	}
553 
554 	return mapped_ram_size;
555 }
556 
get_new_step_size(unsigned long step_size)557 static unsigned long __init get_new_step_size(unsigned long step_size)
558 {
559 	/*
560 	 * Initial mapped size is PMD_SIZE (2M).
561 	 * We can not set step_size to be PUD_SIZE (1G) yet.
562 	 * In worse case, when we cross the 1G boundary, and
563 	 * PG_LEVEL_2M is not set, we will need 1+1+512 pages (2M + 8k)
564 	 * to map 1G range with PTE. Hence we use one less than the
565 	 * difference of page table level shifts.
566 	 *
567 	 * Don't need to worry about overflow in the top-down case, on 32bit,
568 	 * when step_size is 0, round_down() returns 0 for start, and that
569 	 * turns it into 0x100000000ULL.
570 	 * In the bottom-up case, round_up(x, 0) returns 0 though too, which
571 	 * needs to be taken into consideration by the code below.
572 	 */
573 	return step_size << (PMD_SHIFT - PAGE_SHIFT - 1);
574 }
575 
576 /**
577  * memory_map_top_down - Map [map_start, map_end) top down
578  * @map_start: start address of the target memory range
579  * @map_end: end address of the target memory range
580  *
581  * This function will setup direct mapping for memory range
582  * [map_start, map_end) in top-down. That said, the page tables
583  * will be allocated at the end of the memory, and we map the
584  * memory in top-down.
585  */
memory_map_top_down(unsigned long map_start,unsigned long map_end)586 static void __init memory_map_top_down(unsigned long map_start,
587 				       unsigned long map_end)
588 {
589 	unsigned long real_end, start, last_start;
590 	unsigned long step_size;
591 	unsigned long addr;
592 	unsigned long mapped_ram_size = 0;
593 
594 	/* xen has big range in reserved near end of ram, skip it at first.*/
595 	addr = memblock_find_in_range(map_start, map_end, PMD_SIZE, PMD_SIZE);
596 	real_end = addr + PMD_SIZE;
597 
598 	/* step_size need to be small so pgt_buf from BRK could cover it */
599 	step_size = PMD_SIZE;
600 	max_pfn_mapped = 0; /* will get exact value next */
601 	min_pfn_mapped = real_end >> PAGE_SHIFT;
602 	last_start = start = real_end;
603 
604 	/*
605 	 * We start from the top (end of memory) and go to the bottom.
606 	 * The memblock_find_in_range() gets us a block of RAM from the
607 	 * end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages
608 	 * for page table.
609 	 */
610 	while (last_start > map_start) {
611 		if (last_start > step_size) {
612 			start = round_down(last_start - 1, step_size);
613 			if (start < map_start)
614 				start = map_start;
615 		} else
616 			start = map_start;
617 		mapped_ram_size += init_range_memory_mapping(start,
618 							last_start);
619 		last_start = start;
620 		min_pfn_mapped = last_start >> PAGE_SHIFT;
621 		if (mapped_ram_size >= step_size)
622 			step_size = get_new_step_size(step_size);
623 	}
624 
625 	if (real_end < map_end)
626 		init_range_memory_mapping(real_end, map_end);
627 }
628 
629 /**
630  * memory_map_bottom_up - Map [map_start, map_end) bottom up
631  * @map_start: start address of the target memory range
632  * @map_end: end address of the target memory range
633  *
634  * This function will setup direct mapping for memory range
635  * [map_start, map_end) in bottom-up. Since we have limited the
636  * bottom-up allocation above the kernel, the page tables will
637  * be allocated just above the kernel and we map the memory
638  * in [map_start, map_end) in bottom-up.
639  */
memory_map_bottom_up(unsigned long map_start,unsigned long map_end)640 static void __init memory_map_bottom_up(unsigned long map_start,
641 					unsigned long map_end)
642 {
643 	unsigned long next, start;
644 	unsigned long mapped_ram_size = 0;
645 	/* step_size need to be small so pgt_buf from BRK could cover it */
646 	unsigned long step_size = PMD_SIZE;
647 
648 	start = map_start;
649 	min_pfn_mapped = start >> PAGE_SHIFT;
650 
651 	/*
652 	 * We start from the bottom (@map_start) and go to the top (@map_end).
653 	 * The memblock_find_in_range() gets us a block of RAM from the
654 	 * end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages
655 	 * for page table.
656 	 */
657 	while (start < map_end) {
658 		if (step_size && map_end - start > step_size) {
659 			next = round_up(start + 1, step_size);
660 			if (next > map_end)
661 				next = map_end;
662 		} else {
663 			next = map_end;
664 		}
665 
666 		mapped_ram_size += init_range_memory_mapping(start, next);
667 		start = next;
668 
669 		if (mapped_ram_size >= step_size)
670 			step_size = get_new_step_size(step_size);
671 	}
672 }
673 
init_mem_mapping(void)674 void __init init_mem_mapping(void)
675 {
676 	unsigned long end;
677 
678 	pti_check_boottime_disable();
679 	probe_page_size_mask();
680 	setup_pcid();
681 
682 #ifdef CONFIG_X86_64
683 	end = max_pfn << PAGE_SHIFT;
684 #else
685 	end = max_low_pfn << PAGE_SHIFT;
686 #endif
687 
688 	/* the ISA range is always mapped regardless of memory holes */
689 	init_memory_mapping(0, ISA_END_ADDRESS);
690 
691 	/* Init the trampoline, possibly with KASLR memory offset */
692 	init_trampoline();
693 
694 	/*
695 	 * If the allocation is in bottom-up direction, we setup direct mapping
696 	 * in bottom-up, otherwise we setup direct mapping in top-down.
697 	 */
698 	if (memblock_bottom_up()) {
699 		unsigned long kernel_end = __pa_symbol(_end);
700 
701 		/*
702 		 * we need two separate calls here. This is because we want to
703 		 * allocate page tables above the kernel. So we first map
704 		 * [kernel_end, end) to make memory above the kernel be mapped
705 		 * as soon as possible. And then use page tables allocated above
706 		 * the kernel to map [ISA_END_ADDRESS, kernel_end).
707 		 */
708 		memory_map_bottom_up(kernel_end, end);
709 		memory_map_bottom_up(ISA_END_ADDRESS, kernel_end);
710 	} else {
711 		memory_map_top_down(ISA_END_ADDRESS, end);
712 	}
713 
714 #ifdef CONFIG_X86_64
715 	if (max_pfn > max_low_pfn) {
716 		/* can we preseve max_low_pfn ?*/
717 		max_low_pfn = max_pfn;
718 	}
719 #else
720 	early_ioremap_page_table_range_init();
721 #endif
722 
723 	load_cr3(swapper_pg_dir);
724 	__flush_tlb_all();
725 
726 	x86_init.hyper.init_mem_mapping();
727 
728 	early_memtest(0, max_pfn_mapped << PAGE_SHIFT);
729 }
730 
731 /*
732  * Initialize an mm_struct to be used during poking and a pointer to be used
733  * during patching.
734  */
poking_init(void)735 void __init poking_init(void)
736 {
737 	spinlock_t *ptl;
738 	pte_t *ptep;
739 
740 	poking_mm = mm_alloc();
741 	BUG_ON(!poking_mm);
742 
743 	/* Xen PV guests need the PGD to be pinned. */
744 	paravirt_arch_dup_mmap(NULL, poking_mm);
745 
746 	/*
747 	 * Randomize the poking address, but make sure that the following page
748 	 * will be mapped at the same PMD. We need 2 pages, so find space for 3,
749 	 * and adjust the address if the PMD ends after the first one.
750 	 */
751 	poking_addr = TASK_UNMAPPED_BASE;
752 	if (IS_ENABLED(CONFIG_RANDOMIZE_BASE))
753 		poking_addr += (kaslr_get_random_long("Poking") & PAGE_MASK) %
754 			(TASK_SIZE - TASK_UNMAPPED_BASE - 3 * PAGE_SIZE);
755 
756 	if (((poking_addr + PAGE_SIZE) & ~PMD_MASK) == 0)
757 		poking_addr += PAGE_SIZE;
758 
759 	/*
760 	 * We need to trigger the allocation of the page-tables that will be
761 	 * needed for poking now. Later, poking may be performed in an atomic
762 	 * section, which might cause allocation to fail.
763 	 */
764 	ptep = get_locked_pte(poking_mm, poking_addr, &ptl);
765 	BUG_ON(!ptep);
766 	pte_unmap_unlock(ptep, ptl);
767 }
768 
769 /*
770  * devmem_is_allowed() checks to see if /dev/mem access to a certain address
771  * is valid. The argument is a physical page number.
772  *
773  * On x86, access has to be given to the first megabyte of RAM because that
774  * area traditionally contains BIOS code and data regions used by X, dosemu,
775  * and similar apps. Since they map the entire memory range, the whole range
776  * must be allowed (for mapping), but any areas that would otherwise be
777  * disallowed are flagged as being "zero filled" instead of rejected.
778  * Access has to be given to non-kernel-ram areas as well, these contain the
779  * PCI mmio resources as well as potential bios/acpi data regions.
780  */
devmem_is_allowed(unsigned long pagenr)781 int devmem_is_allowed(unsigned long pagenr)
782 {
783 	if (region_intersects(PFN_PHYS(pagenr), PAGE_SIZE,
784 				IORESOURCE_SYSTEM_RAM, IORES_DESC_NONE)
785 			!= REGION_DISJOINT) {
786 		/*
787 		 * For disallowed memory regions in the low 1MB range,
788 		 * request that the page be shown as all zeros.
789 		 */
790 		if (pagenr < 256)
791 			return 2;
792 
793 		return 0;
794 	}
795 
796 	/*
797 	 * This must follow RAM test, since System RAM is considered a
798 	 * restricted resource under CONFIG_STRICT_IOMEM.
799 	 */
800 	if (iomem_is_exclusive(pagenr << PAGE_SHIFT)) {
801 		/* Low 1MB bypasses iomem restrictions. */
802 		if (pagenr < 256)
803 			return 1;
804 
805 		return 0;
806 	}
807 
808 	return 1;
809 }
810 
free_init_pages(const char * what,unsigned long begin,unsigned long end)811 void free_init_pages(const char *what, unsigned long begin, unsigned long end)
812 {
813 	unsigned long begin_aligned, end_aligned;
814 
815 	/* Make sure boundaries are page aligned */
816 	begin_aligned = PAGE_ALIGN(begin);
817 	end_aligned   = end & PAGE_MASK;
818 
819 	if (WARN_ON(begin_aligned != begin || end_aligned != end)) {
820 		begin = begin_aligned;
821 		end   = end_aligned;
822 	}
823 
824 	if (begin >= end)
825 		return;
826 
827 	/*
828 	 * If debugging page accesses then do not free this memory but
829 	 * mark them not present - any buggy init-section access will
830 	 * create a kernel page fault:
831 	 */
832 	if (debug_pagealloc_enabled()) {
833 		pr_info("debug: unmapping init [mem %#010lx-%#010lx]\n",
834 			begin, end - 1);
835 		/*
836 		 * Inform kmemleak about the hole in the memory since the
837 		 * corresponding pages will be unmapped.
838 		 */
839 		kmemleak_free_part((void *)begin, end - begin);
840 		set_memory_np(begin, (end - begin) >> PAGE_SHIFT);
841 	} else {
842 		/*
843 		 * We just marked the kernel text read only above, now that
844 		 * we are going to free part of that, we need to make that
845 		 * writeable and non-executable first.
846 		 */
847 		set_memory_nx(begin, (end - begin) >> PAGE_SHIFT);
848 		set_memory_rw(begin, (end - begin) >> PAGE_SHIFT);
849 
850 		free_reserved_area((void *)begin, (void *)end,
851 				   POISON_FREE_INITMEM, what);
852 	}
853 }
854 
855 /*
856  * begin/end can be in the direct map or the "high kernel mapping"
857  * used for the kernel image only.  free_init_pages() will do the
858  * right thing for either kind of address.
859  */
free_kernel_image_pages(void * begin,void * end)860 void free_kernel_image_pages(void *begin, void *end)
861 {
862 	unsigned long begin_ul = (unsigned long)begin;
863 	unsigned long end_ul = (unsigned long)end;
864 	unsigned long len_pages = (end_ul - begin_ul) >> PAGE_SHIFT;
865 
866 
867 	free_init_pages("unused kernel image", begin_ul, end_ul);
868 
869 	/*
870 	 * PTI maps some of the kernel into userspace.  For performance,
871 	 * this includes some kernel areas that do not contain secrets.
872 	 * Those areas might be adjacent to the parts of the kernel image
873 	 * being freed, which may contain secrets.  Remove the "high kernel
874 	 * image mapping" for these freed areas, ensuring they are not even
875 	 * potentially vulnerable to Meltdown regardless of the specific
876 	 * optimizations PTI is currently using.
877 	 *
878 	 * The "noalias" prevents unmapping the direct map alias which is
879 	 * needed to access the freed pages.
880 	 *
881 	 * This is only valid for 64bit kernels. 32bit has only one mapping
882 	 * which can't be treated in this way for obvious reasons.
883 	 */
884 	if (IS_ENABLED(CONFIG_X86_64) && cpu_feature_enabled(X86_FEATURE_PTI))
885 		set_memory_np_noalias(begin_ul, len_pages);
886 }
887 
mem_encrypt_free_decrypted_mem(void)888 void __weak mem_encrypt_free_decrypted_mem(void) { }
889 
free_initmem(void)890 void __ref free_initmem(void)
891 {
892 	e820__reallocate_tables();
893 
894 	mem_encrypt_free_decrypted_mem();
895 
896 	free_kernel_image_pages(&__init_begin, &__init_end);
897 }
898 
899 #ifdef CONFIG_BLK_DEV_INITRD
free_initrd_mem(unsigned long start,unsigned long end)900 void __init free_initrd_mem(unsigned long start, unsigned long end)
901 {
902 	/*
903 	 * end could be not aligned, and We can not align that,
904 	 * decompresser could be confused by aligned initrd_end
905 	 * We already reserve the end partial page before in
906 	 *   - i386_start_kernel()
907 	 *   - x86_64_start_kernel()
908 	 *   - relocate_initrd()
909 	 * So here We can do PAGE_ALIGN() safely to get partial page to be freed
910 	 */
911 	free_init_pages("initrd", start, PAGE_ALIGN(end));
912 }
913 #endif
914 
915 /*
916  * Calculate the precise size of the DMA zone (first 16 MB of RAM),
917  * and pass it to the MM layer - to help it set zone watermarks more
918  * accurately.
919  *
920  * Done on 64-bit systems only for the time being, although 32-bit systems
921  * might benefit from this as well.
922  */
memblock_find_dma_reserve(void)923 void __init memblock_find_dma_reserve(void)
924 {
925 #ifdef CONFIG_X86_64
926 	u64 nr_pages = 0, nr_free_pages = 0;
927 	unsigned long start_pfn, end_pfn;
928 	phys_addr_t start_addr, end_addr;
929 	int i;
930 	u64 u;
931 
932 	/*
933 	 * Iterate over all memory ranges (free and reserved ones alike),
934 	 * to calculate the total number of pages in the first 16 MB of RAM:
935 	 */
936 	nr_pages = 0;
937 	for_each_mem_pfn_range(i, MAX_NUMNODES, &start_pfn, &end_pfn, NULL) {
938 		start_pfn = min(start_pfn, MAX_DMA_PFN);
939 		end_pfn   = min(end_pfn,   MAX_DMA_PFN);
940 
941 		nr_pages += end_pfn - start_pfn;
942 	}
943 
944 	/*
945 	 * Iterate over free memory ranges to calculate the number of free
946 	 * pages in the DMA zone, while not counting potential partial
947 	 * pages at the beginning or the end of the range:
948 	 */
949 	nr_free_pages = 0;
950 	for_each_free_mem_range(u, NUMA_NO_NODE, MEMBLOCK_NONE, &start_addr, &end_addr, NULL) {
951 		start_pfn = min_t(unsigned long, PFN_UP(start_addr), MAX_DMA_PFN);
952 		end_pfn   = min_t(unsigned long, PFN_DOWN(end_addr), MAX_DMA_PFN);
953 
954 		if (start_pfn < end_pfn)
955 			nr_free_pages += end_pfn - start_pfn;
956 	}
957 
958 	set_dma_reserve(nr_pages - nr_free_pages);
959 #endif
960 }
961 
zone_sizes_init(void)962 void __init zone_sizes_init(void)
963 {
964 	unsigned long max_zone_pfns[MAX_NR_ZONES];
965 
966 	memset(max_zone_pfns, 0, sizeof(max_zone_pfns));
967 
968 #ifdef CONFIG_ZONE_DMA
969 	max_zone_pfns[ZONE_DMA]		= min(MAX_DMA_PFN, max_low_pfn);
970 #endif
971 #ifdef CONFIG_ZONE_DMA32
972 	max_zone_pfns[ZONE_DMA32]	= min(MAX_DMA32_PFN, max_low_pfn);
973 #endif
974 	max_zone_pfns[ZONE_NORMAL]	= max_low_pfn;
975 #ifdef CONFIG_HIGHMEM
976 	max_zone_pfns[ZONE_HIGHMEM]	= max_pfn;
977 #endif
978 
979 	free_area_init_nodes(max_zone_pfns);
980 }
981 
982 __visible DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate) = {
983 	.loaded_mm = &init_mm,
984 	.next_asid = 1,
985 	.cr4 = ~0UL,	/* fail hard if we screw up cr4 shadow initialization */
986 };
987 EXPORT_PER_CPU_SYMBOL(cpu_tlbstate);
988 
update_cache_mode_entry(unsigned entry,enum page_cache_mode cache)989 void update_cache_mode_entry(unsigned entry, enum page_cache_mode cache)
990 {
991 	/* entry 0 MUST be WB (hardwired to speed up translations) */
992 	BUG_ON(!entry && cache != _PAGE_CACHE_MODE_WB);
993 
994 	__cachemode2pte_tbl[cache] = __cm_idx2pte(entry);
995 	__pte2cachemode_tbl[entry] = cache;
996 }
997 
998 #ifdef CONFIG_SWAP
max_swapfile_size(void)999 unsigned long max_swapfile_size(void)
1000 {
1001 	unsigned long pages;
1002 
1003 	pages = generic_max_swapfile_size();
1004 
1005 	if (boot_cpu_has_bug(X86_BUG_L1TF) && l1tf_mitigation != L1TF_MITIGATION_OFF) {
1006 		/* Limit the swap file size to MAX_PA/2 for L1TF workaround */
1007 		unsigned long long l1tf_limit = l1tf_pfn_limit();
1008 		/*
1009 		 * We encode swap offsets also with 3 bits below those for pfn
1010 		 * which makes the usable limit higher.
1011 		 */
1012 #if CONFIG_PGTABLE_LEVELS > 2
1013 		l1tf_limit <<= PAGE_SHIFT - SWP_OFFSET_FIRST_BIT;
1014 #endif
1015 		pages = min_t(unsigned long long, l1tf_limit, pages);
1016 	}
1017 	return pages;
1018 }
1019 #endif
1020