1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2005, 2006 IBM Corporation
4 * Copyright (C) 2014, 2015 Intel Corporation
5 *
6 * Authors:
7 * Leendert van Doorn <leendert@watson.ibm.com>
8 * Kylene Hall <kjhall@us.ibm.com>
9 *
10 * Maintained by: <tpmdd-devel@lists.sourceforge.net>
11 *
12 * Device driver for TCG/TCPA TPM (trusted platform module).
13 * Specifications at www.trustedcomputinggroup.org
14 *
15 * This device driver implements the TPM interface as defined in
16 * the TCG TPM Interface Spec version 1.2, revision 1.0.
17 */
18 #include <linux/init.h>
19 #include <linux/module.h>
20 #include <linux/moduleparam.h>
21 #include <linux/pnp.h>
22 #include <linux/slab.h>
23 #include <linux/interrupt.h>
24 #include <linux/wait.h>
25 #include <linux/acpi.h>
26 #include <linux/freezer.h>
27 #include "tpm.h"
28 #include "tpm_tis_core.h"
29
30 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value);
31
wait_for_tpm_stat_cond(struct tpm_chip * chip,u8 mask,bool check_cancel,bool * canceled)32 static bool wait_for_tpm_stat_cond(struct tpm_chip *chip, u8 mask,
33 bool check_cancel, bool *canceled)
34 {
35 u8 status = chip->ops->status(chip);
36
37 *canceled = false;
38 if ((status & mask) == mask)
39 return true;
40 if (check_cancel && chip->ops->req_canceled(chip, status)) {
41 *canceled = true;
42 return true;
43 }
44 return false;
45 }
46
wait_for_tpm_stat(struct tpm_chip * chip,u8 mask,unsigned long timeout,wait_queue_head_t * queue,bool check_cancel)47 static int wait_for_tpm_stat(struct tpm_chip *chip, u8 mask,
48 unsigned long timeout, wait_queue_head_t *queue,
49 bool check_cancel)
50 {
51 unsigned long stop;
52 long rc;
53 u8 status;
54 bool canceled = false;
55
56 /* check current status */
57 status = chip->ops->status(chip);
58 if ((status & mask) == mask)
59 return 0;
60
61 stop = jiffies + timeout;
62
63 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
64 again:
65 timeout = stop - jiffies;
66 if ((long)timeout <= 0)
67 return -ETIME;
68 rc = wait_event_interruptible_timeout(*queue,
69 wait_for_tpm_stat_cond(chip, mask, check_cancel,
70 &canceled),
71 timeout);
72 if (rc > 0) {
73 if (canceled)
74 return -ECANCELED;
75 return 0;
76 }
77 if (rc == -ERESTARTSYS && freezing(current)) {
78 clear_thread_flag(TIF_SIGPENDING);
79 goto again;
80 }
81 } else {
82 do {
83 usleep_range(TPM_TIMEOUT_USECS_MIN,
84 TPM_TIMEOUT_USECS_MAX);
85 status = chip->ops->status(chip);
86 if ((status & mask) == mask)
87 return 0;
88 } while (time_before(jiffies, stop));
89 }
90 return -ETIME;
91 }
92
93 /* Before we attempt to access the TPM we must see that the valid bit is set.
94 * The specification says that this bit is 0 at reset and remains 0 until the
95 * 'TPM has gone through its self test and initialization and has established
96 * correct values in the other bits.'
97 */
wait_startup(struct tpm_chip * chip,int l)98 static int wait_startup(struct tpm_chip *chip, int l)
99 {
100 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
101 unsigned long stop = jiffies + chip->timeout_a;
102
103 do {
104 int rc;
105 u8 access;
106
107 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
108 if (rc < 0)
109 return rc;
110
111 if (access & TPM_ACCESS_VALID)
112 return 0;
113 tpm_msleep(TPM_TIMEOUT);
114 } while (time_before(jiffies, stop));
115 return -1;
116 }
117
check_locality(struct tpm_chip * chip,int l)118 static bool check_locality(struct tpm_chip *chip, int l)
119 {
120 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
121 int rc;
122 u8 access;
123
124 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
125 if (rc < 0)
126 return false;
127
128 if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID
129 | TPM_ACCESS_REQUEST_USE)) ==
130 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) {
131 priv->locality = l;
132 return true;
133 }
134
135 return false;
136 }
137
release_locality(struct tpm_chip * chip,int l)138 static int release_locality(struct tpm_chip *chip, int l)
139 {
140 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
141
142 tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY);
143
144 return 0;
145 }
146
request_locality(struct tpm_chip * chip,int l)147 static int request_locality(struct tpm_chip *chip, int l)
148 {
149 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
150 unsigned long stop, timeout;
151 long rc;
152
153 if (check_locality(chip, l))
154 return l;
155
156 rc = tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE);
157 if (rc < 0)
158 return rc;
159
160 stop = jiffies + chip->timeout_a;
161
162 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
163 again:
164 timeout = stop - jiffies;
165 if ((long)timeout <= 0)
166 return -1;
167 rc = wait_event_interruptible_timeout(priv->int_queue,
168 (check_locality
169 (chip, l)),
170 timeout);
171 if (rc > 0)
172 return l;
173 if (rc == -ERESTARTSYS && freezing(current)) {
174 clear_thread_flag(TIF_SIGPENDING);
175 goto again;
176 }
177 } else {
178 /* wait for burstcount */
179 do {
180 if (check_locality(chip, l))
181 return l;
182 tpm_msleep(TPM_TIMEOUT);
183 } while (time_before(jiffies, stop));
184 }
185 return -1;
186 }
187
tpm_tis_status(struct tpm_chip * chip)188 static u8 tpm_tis_status(struct tpm_chip *chip)
189 {
190 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
191 int rc;
192 u8 status;
193
194 rc = tpm_tis_read8(priv, TPM_STS(priv->locality), &status);
195 if (rc < 0)
196 return 0;
197
198 return status;
199 }
200
tpm_tis_ready(struct tpm_chip * chip)201 static void tpm_tis_ready(struct tpm_chip *chip)
202 {
203 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
204
205 /* this causes the current command to be aborted */
206 tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_COMMAND_READY);
207 }
208
get_burstcount(struct tpm_chip * chip)209 static int get_burstcount(struct tpm_chip *chip)
210 {
211 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
212 unsigned long stop;
213 int burstcnt, rc;
214 u32 value;
215
216 /* wait for burstcount */
217 if (chip->flags & TPM_CHIP_FLAG_TPM2)
218 stop = jiffies + chip->timeout_a;
219 else
220 stop = jiffies + chip->timeout_d;
221 do {
222 rc = tpm_tis_read32(priv, TPM_STS(priv->locality), &value);
223 if (rc < 0)
224 return rc;
225
226 burstcnt = (value >> 8) & 0xFFFF;
227 if (burstcnt)
228 return burstcnt;
229 usleep_range(TPM_TIMEOUT_USECS_MIN, TPM_TIMEOUT_USECS_MAX);
230 } while (time_before(jiffies, stop));
231 return -EBUSY;
232 }
233
recv_data(struct tpm_chip * chip,u8 * buf,size_t count)234 static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
235 {
236 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
237 int size = 0, burstcnt, rc;
238
239 while (size < count) {
240 rc = wait_for_tpm_stat(chip,
241 TPM_STS_DATA_AVAIL | TPM_STS_VALID,
242 chip->timeout_c,
243 &priv->read_queue, true);
244 if (rc < 0)
245 return rc;
246 burstcnt = get_burstcount(chip);
247 if (burstcnt < 0) {
248 dev_err(&chip->dev, "Unable to read burstcount\n");
249 return burstcnt;
250 }
251 burstcnt = min_t(int, burstcnt, count - size);
252
253 rc = tpm_tis_read_bytes(priv, TPM_DATA_FIFO(priv->locality),
254 burstcnt, buf + size);
255 if (rc < 0)
256 return rc;
257
258 size += burstcnt;
259 }
260 return size;
261 }
262
tpm_tis_recv(struct tpm_chip * chip,u8 * buf,size_t count)263 static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
264 {
265 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
266 int size = 0;
267 int status;
268 u32 expected;
269 int rc;
270
271 if (count < TPM_HEADER_SIZE) {
272 size = -EIO;
273 goto out;
274 }
275
276 size = recv_data(chip, buf, TPM_HEADER_SIZE);
277 /* read first 10 bytes, including tag, paramsize, and result */
278 if (size < TPM_HEADER_SIZE) {
279 dev_err(&chip->dev, "Unable to read header\n");
280 goto out;
281 }
282
283 expected = be32_to_cpu(*(__be32 *) (buf + 2));
284 if (expected > count || expected < TPM_HEADER_SIZE) {
285 size = -EIO;
286 goto out;
287 }
288
289 rc = recv_data(chip, &buf[TPM_HEADER_SIZE],
290 expected - TPM_HEADER_SIZE);
291 if (rc < 0) {
292 size = rc;
293 goto out;
294 }
295 size += rc;
296 if (size < expected) {
297 dev_err(&chip->dev, "Unable to read remainder of result\n");
298 size = -ETIME;
299 goto out;
300 }
301
302 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
303 &priv->int_queue, false) < 0) {
304 size = -ETIME;
305 goto out;
306 }
307 status = tpm_tis_status(chip);
308 if (status & TPM_STS_DATA_AVAIL) { /* retry? */
309 dev_err(&chip->dev, "Error left over data\n");
310 size = -EIO;
311 goto out;
312 }
313
314 out:
315 tpm_tis_ready(chip);
316 return size;
317 }
318
319 /*
320 * If interrupts are used (signaled by an irq set in the vendor structure)
321 * tpm.c can skip polling for the data to be available as the interrupt is
322 * waited for here
323 */
tpm_tis_send_data(struct tpm_chip * chip,const u8 * buf,size_t len)324 static int tpm_tis_send_data(struct tpm_chip *chip, const u8 *buf, size_t len)
325 {
326 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
327 int rc, status, burstcnt;
328 size_t count = 0;
329 bool itpm = priv->flags & TPM_TIS_ITPM_WORKAROUND;
330
331 status = tpm_tis_status(chip);
332 if ((status & TPM_STS_COMMAND_READY) == 0) {
333 tpm_tis_ready(chip);
334 if (wait_for_tpm_stat
335 (chip, TPM_STS_COMMAND_READY, chip->timeout_b,
336 &priv->int_queue, false) < 0) {
337 rc = -ETIME;
338 goto out_err;
339 }
340 }
341
342 while (count < len - 1) {
343 burstcnt = get_burstcount(chip);
344 if (burstcnt < 0) {
345 dev_err(&chip->dev, "Unable to read burstcount\n");
346 rc = burstcnt;
347 goto out_err;
348 }
349 burstcnt = min_t(int, burstcnt, len - count - 1);
350 rc = tpm_tis_write_bytes(priv, TPM_DATA_FIFO(priv->locality),
351 burstcnt, buf + count);
352 if (rc < 0)
353 goto out_err;
354
355 count += burstcnt;
356
357 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
358 &priv->int_queue, false) < 0) {
359 rc = -ETIME;
360 goto out_err;
361 }
362 status = tpm_tis_status(chip);
363 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
364 rc = -EIO;
365 goto out_err;
366 }
367 }
368
369 /* write last byte */
370 rc = tpm_tis_write8(priv, TPM_DATA_FIFO(priv->locality), buf[count]);
371 if (rc < 0)
372 goto out_err;
373
374 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
375 &priv->int_queue, false) < 0) {
376 rc = -ETIME;
377 goto out_err;
378 }
379 status = tpm_tis_status(chip);
380 if (!itpm && (status & TPM_STS_DATA_EXPECT) != 0) {
381 rc = -EIO;
382 goto out_err;
383 }
384
385 return 0;
386
387 out_err:
388 tpm_tis_ready(chip);
389 return rc;
390 }
391
disable_interrupts(struct tpm_chip * chip)392 static void disable_interrupts(struct tpm_chip *chip)
393 {
394 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
395 u32 intmask;
396 int rc;
397
398 if (priv->irq == 0)
399 return;
400
401 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
402 if (rc < 0)
403 intmask = 0;
404
405 intmask &= ~TPM_GLOBAL_INT_ENABLE;
406 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
407
408 devm_free_irq(chip->dev.parent, priv->irq, chip);
409 priv->irq = 0;
410 chip->flags &= ~TPM_CHIP_FLAG_IRQ;
411 }
412
413 /*
414 * If interrupts are used (signaled by an irq set in the vendor structure)
415 * tpm.c can skip polling for the data to be available as the interrupt is
416 * waited for here
417 */
tpm_tis_send_main(struct tpm_chip * chip,const u8 * buf,size_t len)418 static int tpm_tis_send_main(struct tpm_chip *chip, const u8 *buf, size_t len)
419 {
420 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
421 int rc;
422 u32 ordinal;
423 unsigned long dur;
424 unsigned int try;
425
426 for (try = 0; try < TPM_RETRY; try++) {
427 rc = tpm_tis_send_data(chip, buf, len);
428 if (rc >= 0)
429 /* Data transfer done successfully */
430 break;
431 else if (rc != -EIO)
432 /* Data transfer failed, not recoverable */
433 return rc;
434 }
435
436 /* go and do it */
437 rc = tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_GO);
438 if (rc < 0)
439 goto out_err;
440
441 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
442 ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
443
444 dur = tpm_calc_ordinal_duration(chip, ordinal);
445 if (wait_for_tpm_stat
446 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur,
447 &priv->read_queue, false) < 0) {
448 rc = -ETIME;
449 goto out_err;
450 }
451 }
452 return 0;
453 out_err:
454 tpm_tis_ready(chip);
455 return rc;
456 }
457
tpm_tis_send(struct tpm_chip * chip,u8 * buf,size_t len)458 static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
459 {
460 int rc, irq;
461 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
462
463 if (!(chip->flags & TPM_CHIP_FLAG_IRQ) || priv->irq_tested)
464 return tpm_tis_send_main(chip, buf, len);
465
466 /* Verify receipt of the expected IRQ */
467 irq = priv->irq;
468 priv->irq = 0;
469 chip->flags &= ~TPM_CHIP_FLAG_IRQ;
470 rc = tpm_tis_send_main(chip, buf, len);
471 priv->irq = irq;
472 chip->flags |= TPM_CHIP_FLAG_IRQ;
473 if (!priv->irq_tested)
474 tpm_msleep(1);
475 if (!priv->irq_tested)
476 disable_interrupts(chip);
477 priv->irq_tested = true;
478 return rc;
479 }
480
481 struct tis_vendor_timeout_override {
482 u32 did_vid;
483 unsigned long timeout_us[4];
484 };
485
486 static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
487 /* Atmel 3204 */
488 { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000),
489 (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } },
490 };
491
tpm_tis_update_timeouts(struct tpm_chip * chip,unsigned long * timeout_cap)492 static void tpm_tis_update_timeouts(struct tpm_chip *chip,
493 unsigned long *timeout_cap)
494 {
495 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
496 int i, rc;
497 u32 did_vid;
498
499 chip->timeout_adjusted = false;
500
501 if (chip->ops->clk_enable != NULL)
502 chip->ops->clk_enable(chip, true);
503
504 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid);
505 if (rc < 0) {
506 dev_warn(&chip->dev, "%s: failed to read did_vid: %d\n",
507 __func__, rc);
508 goto out;
509 }
510
511 for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
512 if (vendor_timeout_overrides[i].did_vid != did_vid)
513 continue;
514 memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us,
515 sizeof(vendor_timeout_overrides[i].timeout_us));
516 chip->timeout_adjusted = true;
517 }
518
519 out:
520 if (chip->ops->clk_enable != NULL)
521 chip->ops->clk_enable(chip, false);
522
523 return;
524 }
525
526 /*
527 * Early probing for iTPM with STS_DATA_EXPECT flaw.
528 * Try sending command without itpm flag set and if that
529 * fails, repeat with itpm flag set.
530 */
probe_itpm(struct tpm_chip * chip)531 static int probe_itpm(struct tpm_chip *chip)
532 {
533 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
534 int rc = 0;
535 static const u8 cmd_getticks[] = {
536 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
537 0x00, 0x00, 0x00, 0xf1
538 };
539 size_t len = sizeof(cmd_getticks);
540 u16 vendor;
541
542 if (priv->flags & TPM_TIS_ITPM_WORKAROUND)
543 return 0;
544
545 rc = tpm_tis_read16(priv, TPM_DID_VID(0), &vendor);
546 if (rc < 0)
547 return rc;
548
549 /* probe only iTPMS */
550 if (vendor != TPM_VID_INTEL)
551 return 0;
552
553 if (request_locality(chip, 0) != 0)
554 return -EBUSY;
555
556 rc = tpm_tis_send_data(chip, cmd_getticks, len);
557 if (rc == 0)
558 goto out;
559
560 tpm_tis_ready(chip);
561
562 priv->flags |= TPM_TIS_ITPM_WORKAROUND;
563
564 rc = tpm_tis_send_data(chip, cmd_getticks, len);
565 if (rc == 0)
566 dev_info(&chip->dev, "Detected an iTPM.\n");
567 else {
568 priv->flags &= ~TPM_TIS_ITPM_WORKAROUND;
569 rc = -EFAULT;
570 }
571
572 out:
573 tpm_tis_ready(chip);
574 release_locality(chip, priv->locality);
575
576 return rc;
577 }
578
tpm_tis_req_canceled(struct tpm_chip * chip,u8 status)579 static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status)
580 {
581 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
582
583 switch (priv->manufacturer_id) {
584 case TPM_VID_WINBOND:
585 return ((status == TPM_STS_VALID) ||
586 (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)));
587 case TPM_VID_STM:
588 return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY));
589 default:
590 return (status == TPM_STS_COMMAND_READY);
591 }
592 }
593
tis_int_handler(int dummy,void * dev_id)594 static irqreturn_t tis_int_handler(int dummy, void *dev_id)
595 {
596 struct tpm_chip *chip = dev_id;
597 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
598 u32 interrupt;
599 int i, rc;
600
601 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
602 if (rc < 0)
603 return IRQ_NONE;
604
605 if (interrupt == 0)
606 return IRQ_NONE;
607
608 priv->irq_tested = true;
609 if (interrupt & TPM_INTF_DATA_AVAIL_INT)
610 wake_up_interruptible(&priv->read_queue);
611 if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT)
612 for (i = 0; i < 5; i++)
613 if (check_locality(chip, i))
614 break;
615 if (interrupt &
616 (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
617 TPM_INTF_CMD_READY_INT))
618 wake_up_interruptible(&priv->int_queue);
619
620 /* Clear interrupts handled with TPM_EOI */
621 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), interrupt);
622 if (rc < 0)
623 return IRQ_NONE;
624
625 tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
626 return IRQ_HANDLED;
627 }
628
tpm_tis_gen_interrupt(struct tpm_chip * chip)629 static void tpm_tis_gen_interrupt(struct tpm_chip *chip)
630 {
631 const char *desc = "attempting to generate an interrupt";
632 u32 cap2;
633 cap_t cap;
634 int ret;
635
636 ret = request_locality(chip, 0);
637 if (ret < 0)
638 return;
639
640 if (chip->flags & TPM_CHIP_FLAG_TPM2)
641 ret = tpm2_get_tpm_pt(chip, 0x100, &cap2, desc);
642 else
643 ret = tpm1_getcap(chip, TPM_CAP_PROP_TIS_TIMEOUT, &cap, desc, 0);
644
645 release_locality(chip, 0);
646 }
647
648 /* Register the IRQ and issue a command that will cause an interrupt. If an
649 * irq is seen then leave the chip setup for IRQ operation, otherwise reverse
650 * everything and leave in polling mode. Returns 0 on success.
651 */
tpm_tis_probe_irq_single(struct tpm_chip * chip,u32 intmask,int flags,int irq)652 static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
653 int flags, int irq)
654 {
655 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
656 u8 original_int_vec;
657 int rc;
658 u32 int_status;
659
660 if (devm_request_irq(chip->dev.parent, irq, tis_int_handler, flags,
661 dev_name(&chip->dev), chip) != 0) {
662 dev_info(&chip->dev, "Unable to request irq: %d for probe\n",
663 irq);
664 return -1;
665 }
666 priv->irq = irq;
667
668 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
669 &original_int_vec);
670 if (rc < 0)
671 return rc;
672
673 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), irq);
674 if (rc < 0)
675 goto restore_irqs;
676
677 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &int_status);
678 if (rc < 0)
679 goto restore_irqs;
680
681 /* Clear all existing */
682 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), int_status);
683 if (rc < 0)
684 goto restore_irqs;
685 /* Turn on */
686 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality),
687 intmask | TPM_GLOBAL_INT_ENABLE);
688 if (rc < 0)
689 goto restore_irqs;
690
691 priv->irq_tested = false;
692
693 /* Generate an interrupt by having the core call through to
694 * tpm_tis_send
695 */
696 tpm_tis_gen_interrupt(chip);
697
698 restore_irqs:
699 /* tpm_tis_send will either confirm the interrupt is working or it
700 * will call disable_irq which undoes all of the above.
701 */
702 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
703 tpm_tis_write8(priv, original_int_vec,
704 TPM_INT_VECTOR(priv->locality));
705 return -1;
706 }
707
708 return 0;
709 }
710
711 /* Try to find the IRQ the TPM is using. This is for legacy x86 systems that
712 * do not have ACPI/etc. We typically expect the interrupt to be declared if
713 * present.
714 */
tpm_tis_probe_irq(struct tpm_chip * chip,u32 intmask)715 static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
716 {
717 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
718 u8 original_int_vec;
719 int i, rc;
720
721 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
722 &original_int_vec);
723 if (rc < 0)
724 return;
725
726 if (!original_int_vec) {
727 if (IS_ENABLED(CONFIG_X86))
728 for (i = 3; i <= 15; i++)
729 if (!tpm_tis_probe_irq_single(chip, intmask, 0,
730 i))
731 return;
732 } else if (!tpm_tis_probe_irq_single(chip, intmask, 0,
733 original_int_vec))
734 return;
735 }
736
tpm_tis_remove(struct tpm_chip * chip)737 void tpm_tis_remove(struct tpm_chip *chip)
738 {
739 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
740 u32 reg = TPM_INT_ENABLE(priv->locality);
741 u32 interrupt;
742 int rc;
743
744 tpm_tis_clkrun_enable(chip, true);
745
746 rc = tpm_tis_read32(priv, reg, &interrupt);
747 if (rc < 0)
748 interrupt = 0;
749
750 tpm_tis_write32(priv, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt);
751
752 tpm_tis_clkrun_enable(chip, false);
753
754 if (priv->ilb_base_addr)
755 iounmap(priv->ilb_base_addr);
756 }
757 EXPORT_SYMBOL_GPL(tpm_tis_remove);
758
759 /**
760 * tpm_tis_clkrun_enable() - Keep clkrun protocol disabled for entire duration
761 * of a single TPM command
762 * @chip: TPM chip to use
763 * @value: 1 - Disable CLKRUN protocol, so that clocks are free running
764 * 0 - Enable CLKRUN protocol
765 * Call this function directly in tpm_tis_remove() in error or driver removal
766 * path, since the chip->ops is set to NULL in tpm_chip_unregister().
767 */
tpm_tis_clkrun_enable(struct tpm_chip * chip,bool value)768 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value)
769 {
770 struct tpm_tis_data *data = dev_get_drvdata(&chip->dev);
771 u32 clkrun_val;
772
773 if (!IS_ENABLED(CONFIG_X86) || !is_bsw() ||
774 !data->ilb_base_addr)
775 return;
776
777 if (value) {
778 data->clkrun_enabled++;
779 if (data->clkrun_enabled > 1)
780 return;
781 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
782
783 /* Disable LPC CLKRUN# */
784 clkrun_val &= ~LPC_CLKRUN_EN;
785 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
786
787 /*
788 * Write any random value on port 0x80 which is on LPC, to make
789 * sure LPC clock is running before sending any TPM command.
790 */
791 outb(0xCC, 0x80);
792 } else {
793 data->clkrun_enabled--;
794 if (data->clkrun_enabled)
795 return;
796
797 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
798
799 /* Enable LPC CLKRUN# */
800 clkrun_val |= LPC_CLKRUN_EN;
801 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
802
803 /*
804 * Write any random value on port 0x80 which is on LPC, to make
805 * sure LPC clock is running before sending any TPM command.
806 */
807 outb(0xCC, 0x80);
808 }
809 }
810
811 static const struct tpm_class_ops tpm_tis = {
812 .flags = TPM_OPS_AUTO_STARTUP,
813 .status = tpm_tis_status,
814 .recv = tpm_tis_recv,
815 .send = tpm_tis_send,
816 .cancel = tpm_tis_ready,
817 .update_timeouts = tpm_tis_update_timeouts,
818 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
819 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
820 .req_canceled = tpm_tis_req_canceled,
821 .request_locality = request_locality,
822 .relinquish_locality = release_locality,
823 .clk_enable = tpm_tis_clkrun_enable,
824 };
825
tpm_tis_core_init(struct device * dev,struct tpm_tis_data * priv,int irq,const struct tpm_tis_phy_ops * phy_ops,acpi_handle acpi_dev_handle)826 int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
827 const struct tpm_tis_phy_ops *phy_ops,
828 acpi_handle acpi_dev_handle)
829 {
830 u32 vendor;
831 u32 intfcaps;
832 u32 intmask;
833 u32 clkrun_val;
834 u8 rid;
835 int rc, probe;
836 struct tpm_chip *chip;
837
838 chip = tpmm_chip_alloc(dev, &tpm_tis);
839 if (IS_ERR(chip))
840 return PTR_ERR(chip);
841
842 #ifdef CONFIG_ACPI
843 chip->acpi_dev_handle = acpi_dev_handle;
844 #endif
845
846 chip->hwrng.quality = priv->rng_quality;
847
848 /* Maximum timeouts */
849 chip->timeout_a = msecs_to_jiffies(TIS_TIMEOUT_A_MAX);
850 chip->timeout_b = msecs_to_jiffies(TIS_TIMEOUT_B_MAX);
851 chip->timeout_c = msecs_to_jiffies(TIS_TIMEOUT_C_MAX);
852 chip->timeout_d = msecs_to_jiffies(TIS_TIMEOUT_D_MAX);
853 priv->phy_ops = phy_ops;
854 dev_set_drvdata(&chip->dev, priv);
855
856 if (is_bsw()) {
857 priv->ilb_base_addr = ioremap(INTEL_LEGACY_BLK_BASE_ADDR,
858 ILB_REMAP_SIZE);
859 if (!priv->ilb_base_addr)
860 return -ENOMEM;
861
862 clkrun_val = ioread32(priv->ilb_base_addr + LPC_CNTRL_OFFSET);
863 /* Check if CLKRUN# is already not enabled in the LPC bus */
864 if (!(clkrun_val & LPC_CLKRUN_EN)) {
865 iounmap(priv->ilb_base_addr);
866 priv->ilb_base_addr = NULL;
867 }
868 }
869
870 if (chip->ops->clk_enable != NULL)
871 chip->ops->clk_enable(chip, true);
872
873 if (wait_startup(chip, 0) != 0) {
874 rc = -ENODEV;
875 goto out_err;
876 }
877
878 /* Take control of the TPM's interrupt hardware and shut it off */
879 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
880 if (rc < 0)
881 goto out_err;
882
883 intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT |
884 TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT;
885 intmask &= ~TPM_GLOBAL_INT_ENABLE;
886
887 rc = request_locality(chip, 0);
888 if (rc < 0) {
889 rc = -ENODEV;
890 goto out_err;
891 }
892
893 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
894 release_locality(chip, 0);
895
896 rc = tpm_chip_start(chip);
897 if (rc)
898 goto out_err;
899 rc = tpm2_probe(chip);
900 tpm_chip_stop(chip);
901 if (rc)
902 goto out_err;
903
904 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &vendor);
905 if (rc < 0)
906 goto out_err;
907
908 priv->manufacturer_id = vendor;
909
910 rc = tpm_tis_read8(priv, TPM_RID(0), &rid);
911 if (rc < 0)
912 goto out_err;
913
914 dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
915 (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
916 vendor >> 16, rid);
917
918 probe = probe_itpm(chip);
919 if (probe < 0) {
920 rc = -ENODEV;
921 goto out_err;
922 }
923
924 /* Figure out the capabilities */
925 rc = tpm_tis_read32(priv, TPM_INTF_CAPS(priv->locality), &intfcaps);
926 if (rc < 0)
927 goto out_err;
928
929 dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
930 intfcaps);
931 if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
932 dev_dbg(dev, "\tBurst Count Static\n");
933 if (intfcaps & TPM_INTF_CMD_READY_INT)
934 dev_dbg(dev, "\tCommand Ready Int Support\n");
935 if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
936 dev_dbg(dev, "\tInterrupt Edge Falling\n");
937 if (intfcaps & TPM_INTF_INT_EDGE_RISING)
938 dev_dbg(dev, "\tInterrupt Edge Rising\n");
939 if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
940 dev_dbg(dev, "\tInterrupt Level Low\n");
941 if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
942 dev_dbg(dev, "\tInterrupt Level High\n");
943 if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT)
944 dev_dbg(dev, "\tLocality Change Int Support\n");
945 if (intfcaps & TPM_INTF_STS_VALID_INT)
946 dev_dbg(dev, "\tSts Valid Int Support\n");
947 if (intfcaps & TPM_INTF_DATA_AVAIL_INT)
948 dev_dbg(dev, "\tData Avail Int Support\n");
949
950 /* INTERRUPT Setup */
951 init_waitqueue_head(&priv->read_queue);
952 init_waitqueue_head(&priv->int_queue);
953 if (irq != -1) {
954 /*
955 * Before doing irq testing issue a command to the TPM in polling mode
956 * to make sure it works. May as well use that command to set the
957 * proper timeouts for the driver.
958 */
959
960 rc = request_locality(chip, 0);
961 if (rc < 0)
962 goto out_err;
963
964 rc = tpm_get_timeouts(chip);
965
966 release_locality(chip, 0);
967
968 if (rc) {
969 dev_err(dev, "Could not get TPM timeouts and durations\n");
970 rc = -ENODEV;
971 goto out_err;
972 }
973
974 if (irq) {
975 tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED,
976 irq);
977 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
978 dev_err(&chip->dev, FW_BUG
979 "TPM interrupt not working, polling instead\n");
980
981 disable_interrupts(chip);
982 }
983 } else {
984 tpm_tis_probe_irq(chip, intmask);
985 }
986 }
987
988 rc = tpm_chip_register(chip);
989 if (rc)
990 goto out_err;
991
992 if (chip->ops->clk_enable != NULL)
993 chip->ops->clk_enable(chip, false);
994
995 return 0;
996 out_err:
997 if (chip->ops->clk_enable != NULL)
998 chip->ops->clk_enable(chip, false);
999
1000 tpm_tis_remove(chip);
1001
1002 return rc;
1003 }
1004 EXPORT_SYMBOL_GPL(tpm_tis_core_init);
1005
1006 #ifdef CONFIG_PM_SLEEP
tpm_tis_reenable_interrupts(struct tpm_chip * chip)1007 static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
1008 {
1009 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
1010 u32 intmask;
1011 int rc;
1012
1013 if (chip->ops->clk_enable != NULL)
1014 chip->ops->clk_enable(chip, true);
1015
1016 /* reenable interrupts that device may have lost or
1017 * BIOS/firmware may have disabled
1018 */
1019 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), priv->irq);
1020 if (rc < 0)
1021 goto out;
1022
1023 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
1024 if (rc < 0)
1025 goto out;
1026
1027 intmask |= TPM_INTF_CMD_READY_INT
1028 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
1029 | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
1030
1031 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
1032
1033 out:
1034 if (chip->ops->clk_enable != NULL)
1035 chip->ops->clk_enable(chip, false);
1036
1037 return;
1038 }
1039
tpm_tis_resume(struct device * dev)1040 int tpm_tis_resume(struct device *dev)
1041 {
1042 struct tpm_chip *chip = dev_get_drvdata(dev);
1043 int ret;
1044
1045 if (chip->flags & TPM_CHIP_FLAG_IRQ)
1046 tpm_tis_reenable_interrupts(chip);
1047
1048 ret = tpm_pm_resume(dev);
1049 if (ret)
1050 return ret;
1051
1052 /*
1053 * TPM 1.2 requires self-test on resume. This function actually returns
1054 * an error code but for unknown reason it isn't handled.
1055 */
1056 if (!(chip->flags & TPM_CHIP_FLAG_TPM2)) {
1057 ret = request_locality(chip, 0);
1058 if (ret < 0)
1059 return ret;
1060
1061 tpm1_do_selftest(chip);
1062
1063 release_locality(chip, 0);
1064 }
1065
1066 return 0;
1067 }
1068 EXPORT_SYMBOL_GPL(tpm_tis_resume);
1069 #endif
1070
1071 MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)");
1072 MODULE_DESCRIPTION("TPM Driver");
1073 MODULE_VERSION("2.0");
1074 MODULE_LICENSE("GPL");
1075