1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2018 MediaTek Inc.
4 * Author: Wenzhen Yu <Wenzhen Yu@mediatek.com>
5 * Ryder Lee <ryder.lee@mediatek.com>
6 */
7
8 #include <linux/clk-provider.h>
9 #include <linux/of.h>
10 #include <linux/of_address.h>
11 #include <linux/of_device.h>
12 #include <linux/platform_device.h>
13
14 #include "clk-mtk.h"
15 #include "clk-gate.h"
16
17 #include <dt-bindings/clock/mt7629-clk.h>
18
19 #define GATE_ETH(_id, _name, _parent, _shift) { \
20 .id = _id, \
21 .name = _name, \
22 .parent_name = _parent, \
23 .regs = ð_cg_regs, \
24 .shift = _shift, \
25 .ops = &mtk_clk_gate_ops_no_setclr_inv, \
26 }
27
28 static const struct mtk_gate_regs eth_cg_regs = {
29 .set_ofs = 0x30,
30 .clr_ofs = 0x30,
31 .sta_ofs = 0x30,
32 };
33
34 static const struct mtk_gate eth_clks[] = {
35 GATE_ETH(CLK_ETH_FE_EN, "eth_fe_en", "eth2pll", 6),
36 GATE_ETH(CLK_ETH_GP2_EN, "eth_gp2_en", "txclk_src_pre", 7),
37 GATE_ETH(CLK_ETH_GP1_EN, "eth_gp1_en", "txclk_src_pre", 8),
38 GATE_ETH(CLK_ETH_GP0_EN, "eth_gp0_en", "txclk_src_pre", 9),
39 GATE_ETH(CLK_ETH_ESW_EN, "eth_esw_en", "eth_500m", 16),
40 };
41
42 static const struct mtk_gate_regs sgmii_cg_regs = {
43 .set_ofs = 0xE4,
44 .clr_ofs = 0xE4,
45 .sta_ofs = 0xE4,
46 };
47
48 #define GATE_SGMII(_id, _name, _parent, _shift) { \
49 .id = _id, \
50 .name = _name, \
51 .parent_name = _parent, \
52 .regs = &sgmii_cg_regs, \
53 .shift = _shift, \
54 .ops = &mtk_clk_gate_ops_no_setclr_inv, \
55 }
56
57 static const struct mtk_gate sgmii_clks[2][4] = {
58 {
59 GATE_SGMII(CLK_SGMII_TX_EN, "sgmii_tx_en",
60 "ssusb_tx250m", 2),
61 GATE_SGMII(CLK_SGMII_RX_EN, "sgmii_rx_en",
62 "ssusb_eq_rx250m", 3),
63 GATE_SGMII(CLK_SGMII_CDR_REF, "sgmii_cdr_ref",
64 "ssusb_cdr_ref", 4),
65 GATE_SGMII(CLK_SGMII_CDR_FB, "sgmii_cdr_fb",
66 "ssusb_cdr_fb", 5),
67 }, {
68 GATE_SGMII(CLK_SGMII_TX_EN, "sgmii_tx_en1",
69 "ssusb_tx250m", 2),
70 GATE_SGMII(CLK_SGMII_RX_EN, "sgmii_rx_en1",
71 "ssusb_eq_rx250m", 3),
72 GATE_SGMII(CLK_SGMII_CDR_REF, "sgmii_cdr_ref1",
73 "ssusb_cdr_ref", 4),
74 GATE_SGMII(CLK_SGMII_CDR_FB, "sgmii_cdr_fb1",
75 "ssusb_cdr_fb", 5),
76 }
77 };
78
clk_mt7629_ethsys_init(struct platform_device * pdev)79 static int clk_mt7629_ethsys_init(struct platform_device *pdev)
80 {
81 struct clk_onecell_data *clk_data;
82 struct device_node *node = pdev->dev.of_node;
83 int r;
84
85 clk_data = mtk_alloc_clk_data(CLK_ETH_NR_CLK);
86 if (!clk_data)
87 return -ENOMEM;
88
89 mtk_clk_register_gates(node, eth_clks, CLK_ETH_NR_CLK, clk_data);
90
91 r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
92 if (r)
93 dev_err(&pdev->dev,
94 "could not register clock provider: %s: %d\n",
95 pdev->name, r);
96
97 mtk_register_reset_controller(node, 1, 0x34);
98
99 return r;
100 }
101
clk_mt7629_sgmiisys_init(struct platform_device * pdev)102 static int clk_mt7629_sgmiisys_init(struct platform_device *pdev)
103 {
104 struct clk_onecell_data *clk_data;
105 struct device_node *node = pdev->dev.of_node;
106 static int id;
107 int r;
108
109 clk_data = mtk_alloc_clk_data(CLK_SGMII_NR_CLK);
110 if (!clk_data)
111 return -ENOMEM;
112
113 mtk_clk_register_gates(node, sgmii_clks[id++], CLK_SGMII_NR_CLK,
114 clk_data);
115
116 r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
117 if (r)
118 dev_err(&pdev->dev,
119 "could not register clock provider: %s: %d\n",
120 pdev->name, r);
121
122 return r;
123 }
124
125 static const struct of_device_id of_match_clk_mt7629_eth[] = {
126 {
127 .compatible = "mediatek,mt7629-ethsys",
128 .data = clk_mt7629_ethsys_init,
129 }, {
130 .compatible = "mediatek,mt7629-sgmiisys",
131 .data = clk_mt7629_sgmiisys_init,
132 }, {
133 /* sentinel */
134 }
135 };
136
clk_mt7629_eth_probe(struct platform_device * pdev)137 static int clk_mt7629_eth_probe(struct platform_device *pdev)
138 {
139 int (*clk_init)(struct platform_device *);
140 int r;
141
142 clk_init = of_device_get_match_data(&pdev->dev);
143 if (!clk_init)
144 return -EINVAL;
145
146 r = clk_init(pdev);
147 if (r)
148 dev_err(&pdev->dev,
149 "could not register clock provider: %s: %d\n",
150 pdev->name, r);
151
152 return r;
153 }
154
155 static struct platform_driver clk_mt7629_eth_drv = {
156 .probe = clk_mt7629_eth_probe,
157 .driver = {
158 .name = "clk-mt7629-eth",
159 .of_match_table = of_match_clk_mt7629_eth,
160 },
161 };
162
163 builtin_platform_driver(clk_mt7629_eth_drv);
164