1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2015, 2017-2018, 2022, The Linux Foundation. All rights reserved. 4 */ 5 6 #ifndef __QCOM_GDSC_H__ 7 #define __QCOM_GDSC_H__ 8 9 #include <linux/err.h> 10 #include <linux/pm_domain.h> 11 12 struct regmap; 13 struct reset_controller_dev; 14 15 /** 16 * struct gdsc - Globally Distributed Switch Controller 17 * @pd: generic power domain 18 * @regmap: regmap for MMIO accesses 19 * @gdscr: gsdc control register 20 * @gds_hw_ctrl: gds_hw_ctrl register 21 * @cxcs: offsets of branch registers to toggle mem/periph bits in 22 * @cxc_count: number of @cxcs 23 * @pwrsts: Possible powerdomain power states 24 * @en_rest_wait_val: transition delay value for receiving enr ack signal 25 * @en_few_wait_val: transition delay value for receiving enf ack signal 26 * @clk_dis_wait_val: transition delay value for halting clock 27 * @resets: ids of resets associated with this gdsc 28 * @reset_count: number of @resets 29 * @rcdev: reset controller 30 */ 31 struct gdsc { 32 struct generic_pm_domain pd; 33 struct generic_pm_domain *parent; 34 struct regmap *regmap; 35 unsigned int gdscr; 36 unsigned int gds_hw_ctrl; 37 unsigned int clamp_io_ctrl; 38 unsigned int *cxcs; 39 unsigned int cxc_count; 40 unsigned int en_rest_wait_val; 41 unsigned int en_few_wait_val; 42 unsigned int clk_dis_wait_val; 43 const u8 pwrsts; 44 /* Powerdomain allowable state bitfields */ 45 #define PWRSTS_OFF BIT(0) 46 #define PWRSTS_RET BIT(1) 47 #define PWRSTS_ON BIT(2) 48 #define PWRSTS_OFF_ON (PWRSTS_OFF | PWRSTS_ON) 49 #define PWRSTS_RET_ON (PWRSTS_RET | PWRSTS_ON) 50 const u8 flags; 51 #define VOTABLE BIT(0) 52 #define CLAMP_IO BIT(1) 53 #define HW_CTRL BIT(2) 54 #define SW_RESET BIT(3) 55 #define AON_RESET BIT(4) 56 #define POLL_CFG_GDSCR BIT(5) 57 #define ALWAYS_ON BIT(6) 58 struct reset_controller_dev *rcdev; 59 unsigned int *resets; 60 unsigned int reset_count; 61 }; 62 63 struct gdsc_desc { 64 struct device *dev; 65 struct gdsc **scs; 66 size_t num; 67 }; 68 69 #ifdef CONFIG_QCOM_GDSC 70 int gdsc_register(struct gdsc_desc *desc, struct reset_controller_dev *, 71 struct regmap *); 72 void gdsc_unregister(struct gdsc_desc *desc); 73 #else gdsc_register(struct gdsc_desc * desc,struct reset_controller_dev * rcdev,struct regmap * r)74static inline int gdsc_register(struct gdsc_desc *desc, 75 struct reset_controller_dev *rcdev, 76 struct regmap *r) 77 { 78 return -ENOSYS; 79 } 80 gdsc_unregister(struct gdsc_desc * desc)81static inline void gdsc_unregister(struct gdsc_desc *desc) {}; 82 #endif /* CONFIG_QCOM_GDSC */ 83 #endif /* __QCOM_GDSC_H__ */ 84