1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * PCA953x 4/8/16/24/40 bit I/O ports
4 *
5 * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
6 * Copyright (C) 2007 Marvell International Ltd.
7 *
8 * Derived from drivers/i2c/chips/pca9539.c
9 */
10
11 #include <linux/acpi.h>
12 #include <linux/bits.h>
13 #include <linux/gpio/driver.h>
14 #include <linux/gpio/consumer.h>
15 #include <linux/i2c.h>
16 #include <linux/init.h>
17 #include <linux/interrupt.h>
18 #include <linux/module.h>
19 #include <linux/of_platform.h>
20 #include <linux/platform_data/pca953x.h>
21 #include <linux/regmap.h>
22 #include <linux/regulator/consumer.h>
23 #include <linux/slab.h>
24
25 #include <asm/unaligned.h>
26
27 #define PCA953X_INPUT 0x00
28 #define PCA953X_OUTPUT 0x01
29 #define PCA953X_INVERT 0x02
30 #define PCA953X_DIRECTION 0x03
31
32 #define REG_ADDR_MASK GENMASK(5, 0)
33 #define REG_ADDR_EXT BIT(6)
34 #define REG_ADDR_AI BIT(7)
35
36 #define PCA957X_IN 0x00
37 #define PCA957X_INVRT 0x01
38 #define PCA957X_BKEN 0x02
39 #define PCA957X_PUPD 0x03
40 #define PCA957X_CFG 0x04
41 #define PCA957X_OUT 0x05
42 #define PCA957X_MSK 0x06
43 #define PCA957X_INTS 0x07
44
45 #define PCAL953X_OUT_STRENGTH 0x20
46 #define PCAL953X_IN_LATCH 0x22
47 #define PCAL953X_PULL_EN 0x23
48 #define PCAL953X_PULL_SEL 0x24
49 #define PCAL953X_INT_MASK 0x25
50 #define PCAL953X_INT_STAT 0x26
51 #define PCAL953X_OUT_CONF 0x27
52
53 #define PCAL6524_INT_EDGE 0x28
54 #define PCAL6524_INT_CLR 0x2a
55 #define PCAL6524_IN_STATUS 0x2b
56 #define PCAL6524_OUT_INDCONF 0x2c
57 #define PCAL6524_DEBOUNCE 0x2d
58
59 #define PCA_GPIO_MASK GENMASK(7, 0)
60
61 #define PCAL_GPIO_MASK GENMASK(4, 0)
62 #define PCAL_PINCTRL_MASK GENMASK(6, 5)
63
64 #define PCA_INT BIT(8)
65 #define PCA_PCAL BIT(9)
66 #define PCA_LATCH_INT (PCA_PCAL | PCA_INT)
67 #define PCA953X_TYPE BIT(12)
68 #define PCA957X_TYPE BIT(13)
69 #define PCA_TYPE_MASK GENMASK(15, 12)
70
71 #define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK)
72
73 static const struct i2c_device_id pca953x_id[] = {
74 { "pca6416", 16 | PCA953X_TYPE | PCA_INT, },
75 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
76 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, },
77 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
78 { "pca9536", 4 | PCA953X_TYPE, },
79 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, },
80 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, },
81 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
82 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, },
83 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
84 { "pca9556", 8 | PCA953X_TYPE, },
85 { "pca9557", 8 | PCA953X_TYPE, },
86 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, },
87 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
88 { "pca9698", 40 | PCA953X_TYPE, },
89
90 { "pcal6416", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
91 { "pcal6524", 24 | PCA953X_TYPE | PCA_LATCH_INT, },
92 { "pcal9555a", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
93
94 { "max7310", 8 | PCA953X_TYPE, },
95 { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
96 { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
97 { "max7315", 8 | PCA953X_TYPE | PCA_INT, },
98 { "max7318", 16 | PCA953X_TYPE | PCA_INT, },
99 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, },
100 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, },
101 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
102 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
103 { "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
104 { "tca9554", 8 | PCA953X_TYPE | PCA_INT, },
105 { "xra1202", 8 | PCA953X_TYPE },
106 { }
107 };
108 MODULE_DEVICE_TABLE(i2c, pca953x_id);
109
110 #ifdef CONFIG_GPIO_PCA953X_IRQ
111
112 #include <linux/dmi.h>
113 #include <linux/gpio.h>
114 #include <linux/list.h>
115
116 static const struct dmi_system_id pca953x_dmi_acpi_irq_info[] = {
117 {
118 /*
119 * On Intel Galileo Gen 2 board the IRQ pin of one of
120 * the I²C GPIO expanders, which has GpioInt() resource,
121 * is provided as an absolute number instead of being
122 * relative. Since first controller (gpio-sch.c) and
123 * second (gpio-dwapb.c) are at the fixed bases, we may
124 * safely refer to the number in the global space to get
125 * an IRQ out of it.
126 */
127 .matches = {
128 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GalileoGen2"),
129 },
130 },
131 {}
132 };
133
134 #ifdef CONFIG_ACPI
pca953x_acpi_get_pin(struct acpi_resource * ares,void * data)135 static int pca953x_acpi_get_pin(struct acpi_resource *ares, void *data)
136 {
137 struct acpi_resource_gpio *agpio;
138 int *pin = data;
139
140 if (acpi_gpio_get_irq_resource(ares, &agpio))
141 *pin = agpio->pin_table[0];
142 return 1;
143 }
144
pca953x_acpi_find_pin(struct device * dev)145 static int pca953x_acpi_find_pin(struct device *dev)
146 {
147 struct acpi_device *adev = ACPI_COMPANION(dev);
148 int pin = -ENOENT, ret;
149 LIST_HEAD(r);
150
151 ret = acpi_dev_get_resources(adev, &r, pca953x_acpi_get_pin, &pin);
152 acpi_dev_free_resource_list(&r);
153 if (ret < 0)
154 return ret;
155
156 return pin;
157 }
158 #else
pca953x_acpi_find_pin(struct device * dev)159 static inline int pca953x_acpi_find_pin(struct device *dev) { return -ENXIO; }
160 #endif
161
pca953x_acpi_get_irq(struct device * dev)162 static int pca953x_acpi_get_irq(struct device *dev)
163 {
164 int pin, ret;
165
166 pin = pca953x_acpi_find_pin(dev);
167 if (pin < 0)
168 return pin;
169
170 dev_info(dev, "Applying ACPI interrupt quirk (GPIO %d)\n", pin);
171
172 if (!gpio_is_valid(pin))
173 return -EINVAL;
174
175 ret = gpio_request(pin, "pca953x interrupt");
176 if (ret)
177 return ret;
178
179 ret = gpio_to_irq(pin);
180
181 /* When pin is used as an IRQ, no need to keep it requested */
182 gpio_free(pin);
183
184 return ret;
185 }
186 #endif
187
188 static const struct acpi_device_id pca953x_acpi_ids[] = {
189 { "INT3491", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
190 { }
191 };
192 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
193
194 #define MAX_BANK 5
195 #define BANK_SZ 8
196
197 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
198
199 struct pca953x_reg_config {
200 int direction;
201 int output;
202 int input;
203 int invert;
204 };
205
206 static const struct pca953x_reg_config pca953x_regs = {
207 .direction = PCA953X_DIRECTION,
208 .output = PCA953X_OUTPUT,
209 .input = PCA953X_INPUT,
210 .invert = PCA953X_INVERT,
211 };
212
213 static const struct pca953x_reg_config pca957x_regs = {
214 .direction = PCA957X_CFG,
215 .output = PCA957X_OUT,
216 .input = PCA957X_IN,
217 .invert = PCA957X_INVRT,
218 };
219
220 struct pca953x_chip {
221 unsigned gpio_start;
222 struct mutex i2c_lock;
223 struct regmap *regmap;
224
225 #ifdef CONFIG_GPIO_PCA953X_IRQ
226 struct mutex irq_lock;
227 u8 irq_mask[MAX_BANK];
228 u8 irq_stat[MAX_BANK];
229 u8 irq_trig_raise[MAX_BANK];
230 u8 irq_trig_fall[MAX_BANK];
231 struct irq_chip irq_chip;
232 #endif
233 atomic_t wakeup_path;
234
235 struct i2c_client *client;
236 struct gpio_chip gpio_chip;
237 const char *const *names;
238 unsigned long driver_data;
239 struct regulator *regulator;
240
241 const struct pca953x_reg_config *regs;
242 };
243
pca953x_bank_shift(struct pca953x_chip * chip)244 static int pca953x_bank_shift(struct pca953x_chip *chip)
245 {
246 return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
247 }
248
249 #define PCA953x_BANK_INPUT BIT(0)
250 #define PCA953x_BANK_OUTPUT BIT(1)
251 #define PCA953x_BANK_POLARITY BIT(2)
252 #define PCA953x_BANK_CONFIG BIT(3)
253
254 #define PCA957x_BANK_INPUT BIT(0)
255 #define PCA957x_BANK_POLARITY BIT(1)
256 #define PCA957x_BANK_BUSHOLD BIT(2)
257 #define PCA957x_BANK_CONFIG BIT(4)
258 #define PCA957x_BANK_OUTPUT BIT(5)
259
260 #define PCAL9xxx_BANK_IN_LATCH BIT(8 + 2)
261 #define PCAL9xxx_BANK_PULL_EN BIT(8 + 3)
262 #define PCAL9xxx_BANK_PULL_SEL BIT(8 + 4)
263 #define PCAL9xxx_BANK_IRQ_MASK BIT(8 + 5)
264 #define PCAL9xxx_BANK_IRQ_STAT BIT(8 + 6)
265
266 /*
267 * We care about the following registers:
268 * - Standard set, below 0x40, each port can be replicated up to 8 times
269 * - PCA953x standard
270 * Input port 0x00 + 0 * bank_size R
271 * Output port 0x00 + 1 * bank_size RW
272 * Polarity Inversion port 0x00 + 2 * bank_size RW
273 * Configuration port 0x00 + 3 * bank_size RW
274 * - PCA957x with mixed up registers
275 * Input port 0x00 + 0 * bank_size R
276 * Polarity Inversion port 0x00 + 1 * bank_size RW
277 * Bus hold port 0x00 + 2 * bank_size RW
278 * Configuration port 0x00 + 4 * bank_size RW
279 * Output port 0x00 + 5 * bank_size RW
280 *
281 * - Extended set, above 0x40, often chip specific.
282 * - PCAL6524/PCAL9555A with custom PCAL IRQ handling:
283 * Input latch register 0x40 + 2 * bank_size RW
284 * Pull-up/pull-down enable reg 0x40 + 3 * bank_size RW
285 * Pull-up/pull-down select reg 0x40 + 4 * bank_size RW
286 * Interrupt mask register 0x40 + 5 * bank_size RW
287 * Interrupt status register 0x40 + 6 * bank_size R
288 *
289 * - Registers with bit 0x80 set, the AI bit
290 * The bit is cleared and the registers fall into one of the
291 * categories above.
292 */
293
pca953x_check_register(struct pca953x_chip * chip,unsigned int reg,u32 checkbank)294 static bool pca953x_check_register(struct pca953x_chip *chip, unsigned int reg,
295 u32 checkbank)
296 {
297 int bank_shift = pca953x_bank_shift(chip);
298 int bank = (reg & REG_ADDR_MASK) >> bank_shift;
299 int offset = reg & (BIT(bank_shift) - 1);
300
301 /* Special PCAL extended register check. */
302 if (reg & REG_ADDR_EXT) {
303 if (!(chip->driver_data & PCA_PCAL))
304 return false;
305 bank += 8;
306 }
307
308 /* Register is not in the matching bank. */
309 if (!(BIT(bank) & checkbank))
310 return false;
311
312 /* Register is not within allowed range of bank. */
313 if (offset >= NBANK(chip))
314 return false;
315
316 return true;
317 }
318
pca953x_readable_register(struct device * dev,unsigned int reg)319 static bool pca953x_readable_register(struct device *dev, unsigned int reg)
320 {
321 struct pca953x_chip *chip = dev_get_drvdata(dev);
322 u32 bank;
323
324 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
325 bank = PCA953x_BANK_INPUT | PCA953x_BANK_OUTPUT |
326 PCA953x_BANK_POLARITY | PCA953x_BANK_CONFIG;
327 } else {
328 bank = PCA957x_BANK_INPUT | PCA957x_BANK_OUTPUT |
329 PCA957x_BANK_POLARITY | PCA957x_BANK_CONFIG |
330 PCA957x_BANK_BUSHOLD;
331 }
332
333 if (chip->driver_data & PCA_PCAL) {
334 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
335 PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK |
336 PCAL9xxx_BANK_IRQ_STAT;
337 }
338
339 return pca953x_check_register(chip, reg, bank);
340 }
341
pca953x_writeable_register(struct device * dev,unsigned int reg)342 static bool pca953x_writeable_register(struct device *dev, unsigned int reg)
343 {
344 struct pca953x_chip *chip = dev_get_drvdata(dev);
345 u32 bank;
346
347 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
348 bank = PCA953x_BANK_OUTPUT | PCA953x_BANK_POLARITY |
349 PCA953x_BANK_CONFIG;
350 } else {
351 bank = PCA957x_BANK_OUTPUT | PCA957x_BANK_POLARITY |
352 PCA957x_BANK_CONFIG | PCA957x_BANK_BUSHOLD;
353 }
354
355 if (chip->driver_data & PCA_PCAL)
356 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
357 PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK;
358
359 return pca953x_check_register(chip, reg, bank);
360 }
361
pca953x_volatile_register(struct device * dev,unsigned int reg)362 static bool pca953x_volatile_register(struct device *dev, unsigned int reg)
363 {
364 struct pca953x_chip *chip = dev_get_drvdata(dev);
365 u32 bank;
366
367 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
368 bank = PCA953x_BANK_INPUT;
369 else
370 bank = PCA957x_BANK_INPUT;
371
372 if (chip->driver_data & PCA_PCAL)
373 bank |= PCAL9xxx_BANK_IRQ_STAT;
374
375 return pca953x_check_register(chip, reg, bank);
376 }
377
378 static const struct regmap_config pca953x_i2c_regmap = {
379 .reg_bits = 8,
380 .val_bits = 8,
381
382 .use_single_read = true,
383 .use_single_write = true,
384
385 .readable_reg = pca953x_readable_register,
386 .writeable_reg = pca953x_writeable_register,
387 .volatile_reg = pca953x_volatile_register,
388
389 .cache_type = REGCACHE_RBTREE,
390 .max_register = 0x7f,
391 };
392
393 static const struct regmap_config pca953x_ai_i2c_regmap = {
394 .reg_bits = 8,
395 .val_bits = 8,
396
397 .read_flag_mask = REG_ADDR_AI,
398 .write_flag_mask = REG_ADDR_AI,
399
400 .readable_reg = pca953x_readable_register,
401 .writeable_reg = pca953x_writeable_register,
402 .volatile_reg = pca953x_volatile_register,
403
404 .disable_locking = true,
405 .cache_type = REGCACHE_RBTREE,
406 .max_register = 0x7f,
407 };
408
pca953x_recalc_addr(struct pca953x_chip * chip,int reg,int off,bool write,bool addrinc)409 static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off,
410 bool write, bool addrinc)
411 {
412 int bank_shift = pca953x_bank_shift(chip);
413 int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
414 int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
415 u8 regaddr = pinctrl | addr | (off / BANK_SZ);
416
417 return regaddr;
418 }
419
pca953x_write_regs(struct pca953x_chip * chip,int reg,u8 * val)420 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
421 {
422 u8 regaddr = pca953x_recalc_addr(chip, reg, 0, true, true);
423 int ret;
424
425 ret = regmap_bulk_write(chip->regmap, regaddr, val, NBANK(chip));
426 if (ret < 0) {
427 dev_err(&chip->client->dev, "failed writing register\n");
428 return ret;
429 }
430
431 return 0;
432 }
433
pca953x_read_regs(struct pca953x_chip * chip,int reg,u8 * val)434 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
435 {
436 u8 regaddr = pca953x_recalc_addr(chip, reg, 0, false, true);
437 int ret;
438
439 ret = regmap_bulk_read(chip->regmap, regaddr, val, NBANK(chip));
440 if (ret < 0) {
441 dev_err(&chip->client->dev, "failed reading register\n");
442 return ret;
443 }
444
445 return 0;
446 }
447
pca953x_gpio_direction_input(struct gpio_chip * gc,unsigned off)448 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
449 {
450 struct pca953x_chip *chip = gpiochip_get_data(gc);
451 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off,
452 true, false);
453 u8 bit = BIT(off % BANK_SZ);
454 int ret;
455
456 mutex_lock(&chip->i2c_lock);
457 ret = regmap_write_bits(chip->regmap, dirreg, bit, bit);
458 mutex_unlock(&chip->i2c_lock);
459 return ret;
460 }
461
pca953x_gpio_direction_output(struct gpio_chip * gc,unsigned off,int val)462 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
463 unsigned off, int val)
464 {
465 struct pca953x_chip *chip = gpiochip_get_data(gc);
466 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off,
467 true, false);
468 u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off,
469 true, false);
470 u8 bit = BIT(off % BANK_SZ);
471 int ret;
472
473 mutex_lock(&chip->i2c_lock);
474 /* set output level */
475 ret = regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
476 if (ret)
477 goto exit;
478
479 /* then direction */
480 ret = regmap_write_bits(chip->regmap, dirreg, bit, 0);
481 exit:
482 mutex_unlock(&chip->i2c_lock);
483 return ret;
484 }
485
pca953x_gpio_get_value(struct gpio_chip * gc,unsigned off)486 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
487 {
488 struct pca953x_chip *chip = gpiochip_get_data(gc);
489 u8 inreg = pca953x_recalc_addr(chip, chip->regs->input, off,
490 true, false);
491 u8 bit = BIT(off % BANK_SZ);
492 u32 reg_val;
493 int ret;
494
495 mutex_lock(&chip->i2c_lock);
496 ret = regmap_read(chip->regmap, inreg, ®_val);
497 mutex_unlock(&chip->i2c_lock);
498 if (ret < 0) {
499 /* NOTE: diagnostic already emitted; that's all we should
500 * do unless gpio_*_value_cansleep() calls become different
501 * from their nonsleeping siblings (and report faults).
502 */
503 return 0;
504 }
505
506 return !!(reg_val & bit);
507 }
508
pca953x_gpio_set_value(struct gpio_chip * gc,unsigned off,int val)509 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
510 {
511 struct pca953x_chip *chip = gpiochip_get_data(gc);
512 u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off,
513 true, false);
514 u8 bit = BIT(off % BANK_SZ);
515
516 mutex_lock(&chip->i2c_lock);
517 regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
518 mutex_unlock(&chip->i2c_lock);
519 }
520
pca953x_gpio_get_direction(struct gpio_chip * gc,unsigned off)521 static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off)
522 {
523 struct pca953x_chip *chip = gpiochip_get_data(gc);
524 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off,
525 true, false);
526 u8 bit = BIT(off % BANK_SZ);
527 u32 reg_val;
528 int ret;
529
530 mutex_lock(&chip->i2c_lock);
531 ret = regmap_read(chip->regmap, dirreg, ®_val);
532 mutex_unlock(&chip->i2c_lock);
533 if (ret < 0)
534 return ret;
535
536 return !!(reg_val & bit);
537 }
538
pca953x_gpio_set_multiple(struct gpio_chip * gc,unsigned long * mask,unsigned long * bits)539 static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
540 unsigned long *mask, unsigned long *bits)
541 {
542 struct pca953x_chip *chip = gpiochip_get_data(gc);
543 unsigned int bank_mask, bank_val;
544 int bank;
545 u8 reg_val[MAX_BANK];
546 int ret;
547
548 mutex_lock(&chip->i2c_lock);
549 ret = pca953x_read_regs(chip, chip->regs->output, reg_val);
550 if (ret)
551 goto exit;
552
553 for (bank = 0; bank < NBANK(chip); bank++) {
554 bank_mask = mask[bank / sizeof(*mask)] >>
555 ((bank % sizeof(*mask)) * 8);
556 if (bank_mask) {
557 bank_val = bits[bank / sizeof(*bits)] >>
558 ((bank % sizeof(*bits)) * 8);
559 bank_val &= bank_mask;
560 reg_val[bank] = (reg_val[bank] & ~bank_mask) | bank_val;
561 }
562 }
563
564 pca953x_write_regs(chip, chip->regs->output, reg_val);
565 exit:
566 mutex_unlock(&chip->i2c_lock);
567 }
568
pca953x_gpio_set_pull_up_down(struct pca953x_chip * chip,unsigned int offset,unsigned long config)569 static int pca953x_gpio_set_pull_up_down(struct pca953x_chip *chip,
570 unsigned int offset,
571 unsigned long config)
572 {
573 u8 pull_en_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_EN, offset,
574 true, false);
575 u8 pull_sel_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_SEL, offset,
576 true, false);
577 u8 bit = BIT(offset % BANK_SZ);
578 int ret;
579
580 /*
581 * pull-up/pull-down configuration requires PCAL extended
582 * registers
583 */
584 if (!(chip->driver_data & PCA_PCAL))
585 return -ENOTSUPP;
586
587 mutex_lock(&chip->i2c_lock);
588
589 /* Configure pull-up/pull-down */
590 if (config == PIN_CONFIG_BIAS_PULL_UP)
591 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, bit);
592 else if (config == PIN_CONFIG_BIAS_PULL_DOWN)
593 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, 0);
594 else
595 ret = 0;
596 if (ret)
597 goto exit;
598
599 /* Disable/Enable pull-up/pull-down */
600 if (config == PIN_CONFIG_BIAS_DISABLE)
601 ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, 0);
602 else
603 ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, bit);
604
605 exit:
606 mutex_unlock(&chip->i2c_lock);
607 return ret;
608 }
609
pca953x_gpio_set_config(struct gpio_chip * gc,unsigned int offset,unsigned long config)610 static int pca953x_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
611 unsigned long config)
612 {
613 struct pca953x_chip *chip = gpiochip_get_data(gc);
614
615 switch (pinconf_to_config_param(config)) {
616 case PIN_CONFIG_BIAS_PULL_UP:
617 case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
618 case PIN_CONFIG_BIAS_PULL_DOWN:
619 case PIN_CONFIG_BIAS_DISABLE:
620 return pca953x_gpio_set_pull_up_down(chip, offset, config);
621 default:
622 return -ENOTSUPP;
623 }
624 }
625
pca953x_setup_gpio(struct pca953x_chip * chip,int gpios)626 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
627 {
628 struct gpio_chip *gc;
629
630 gc = &chip->gpio_chip;
631
632 gc->direction_input = pca953x_gpio_direction_input;
633 gc->direction_output = pca953x_gpio_direction_output;
634 gc->get = pca953x_gpio_get_value;
635 gc->set = pca953x_gpio_set_value;
636 gc->get_direction = pca953x_gpio_get_direction;
637 gc->set_multiple = pca953x_gpio_set_multiple;
638 gc->set_config = pca953x_gpio_set_config;
639 gc->can_sleep = true;
640
641 gc->base = chip->gpio_start;
642 gc->ngpio = gpios;
643 gc->label = dev_name(&chip->client->dev);
644 gc->parent = &chip->client->dev;
645 gc->owner = THIS_MODULE;
646 gc->names = chip->names;
647 }
648
649 #ifdef CONFIG_GPIO_PCA953X_IRQ
pca953x_irq_mask(struct irq_data * d)650 static void pca953x_irq_mask(struct irq_data *d)
651 {
652 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
653 struct pca953x_chip *chip = gpiochip_get_data(gc);
654
655 chip->irq_mask[d->hwirq / BANK_SZ] &= ~BIT(d->hwirq % BANK_SZ);
656 }
657
pca953x_irq_unmask(struct irq_data * d)658 static void pca953x_irq_unmask(struct irq_data *d)
659 {
660 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
661 struct pca953x_chip *chip = gpiochip_get_data(gc);
662
663 chip->irq_mask[d->hwirq / BANK_SZ] |= BIT(d->hwirq % BANK_SZ);
664 }
665
pca953x_irq_set_wake(struct irq_data * d,unsigned int on)666 static int pca953x_irq_set_wake(struct irq_data *d, unsigned int on)
667 {
668 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
669 struct pca953x_chip *chip = gpiochip_get_data(gc);
670
671 if (on)
672 atomic_inc(&chip->wakeup_path);
673 else
674 atomic_dec(&chip->wakeup_path);
675
676 return irq_set_irq_wake(chip->client->irq, on);
677 }
678
pca953x_irq_bus_lock(struct irq_data * d)679 static void pca953x_irq_bus_lock(struct irq_data *d)
680 {
681 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
682 struct pca953x_chip *chip = gpiochip_get_data(gc);
683
684 mutex_lock(&chip->irq_lock);
685 }
686
pca953x_irq_bus_sync_unlock(struct irq_data * d)687 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
688 {
689 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
690 struct pca953x_chip *chip = gpiochip_get_data(gc);
691 u8 new_irqs;
692 int level, i;
693 u8 invert_irq_mask[MAX_BANK];
694 u8 reg_direction[MAX_BANK];
695
696 pca953x_read_regs(chip, chip->regs->direction, reg_direction);
697
698 if (chip->driver_data & PCA_PCAL) {
699 /* Enable latch on interrupt-enabled inputs */
700 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
701
702 for (i = 0; i < NBANK(chip); i++)
703 invert_irq_mask[i] = ~chip->irq_mask[i];
704
705 /* Unmask enabled interrupts */
706 pca953x_write_regs(chip, PCAL953X_INT_MASK, invert_irq_mask);
707 }
708
709 /* Look for any newly setup interrupt */
710 for (i = 0; i < NBANK(chip); i++) {
711 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
712 new_irqs &= reg_direction[i];
713
714 while (new_irqs) {
715 level = __ffs(new_irqs);
716 pca953x_gpio_direction_input(&chip->gpio_chip,
717 level + (BANK_SZ * i));
718 new_irqs &= ~(1 << level);
719 }
720 }
721
722 mutex_unlock(&chip->irq_lock);
723 }
724
pca953x_irq_set_type(struct irq_data * d,unsigned int type)725 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
726 {
727 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
728 struct pca953x_chip *chip = gpiochip_get_data(gc);
729 int bank_nb = d->hwirq / BANK_SZ;
730 u8 mask = BIT(d->hwirq % BANK_SZ);
731
732 if (!(type & IRQ_TYPE_EDGE_BOTH)) {
733 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
734 d->irq, type);
735 return -EINVAL;
736 }
737
738 if (type & IRQ_TYPE_EDGE_FALLING)
739 chip->irq_trig_fall[bank_nb] |= mask;
740 else
741 chip->irq_trig_fall[bank_nb] &= ~mask;
742
743 if (type & IRQ_TYPE_EDGE_RISING)
744 chip->irq_trig_raise[bank_nb] |= mask;
745 else
746 chip->irq_trig_raise[bank_nb] &= ~mask;
747
748 return 0;
749 }
750
pca953x_irq_shutdown(struct irq_data * d)751 static void pca953x_irq_shutdown(struct irq_data *d)
752 {
753 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
754 struct pca953x_chip *chip = gpiochip_get_data(gc);
755 u8 mask = BIT(d->hwirq % BANK_SZ);
756
757 chip->irq_trig_raise[d->hwirq / BANK_SZ] &= ~mask;
758 chip->irq_trig_fall[d->hwirq / BANK_SZ] &= ~mask;
759 }
760
pca953x_irq_pending(struct pca953x_chip * chip,u8 * pending)761 static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
762 {
763 u8 cur_stat[MAX_BANK];
764 u8 old_stat[MAX_BANK];
765 bool pending_seen = false;
766 bool trigger_seen = false;
767 u8 trigger[MAX_BANK];
768 u8 reg_direction[MAX_BANK];
769 int ret, i;
770
771 if (chip->driver_data & PCA_PCAL) {
772 /* Read the current interrupt status from the device */
773 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
774 if (ret)
775 return false;
776
777 /* Check latched inputs and clear interrupt status */
778 ret = pca953x_read_regs(chip, PCA953X_INPUT, cur_stat);
779 if (ret)
780 return false;
781
782 for (i = 0; i < NBANK(chip); i++) {
783 /* Apply filter for rising/falling edge selection */
784 pending[i] = (~cur_stat[i] & chip->irq_trig_fall[i]) |
785 (cur_stat[i] & chip->irq_trig_raise[i]);
786 pending[i] &= trigger[i];
787 if (pending[i])
788 pending_seen = true;
789 }
790
791 return pending_seen;
792 }
793
794 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
795 if (ret)
796 return false;
797
798 /* Remove output pins from the equation */
799 pca953x_read_regs(chip, chip->regs->direction, reg_direction);
800 for (i = 0; i < NBANK(chip); i++)
801 cur_stat[i] &= reg_direction[i];
802
803 memcpy(old_stat, chip->irq_stat, NBANK(chip));
804
805 for (i = 0; i < NBANK(chip); i++) {
806 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
807 if (trigger[i])
808 trigger_seen = true;
809 }
810
811 if (!trigger_seen)
812 return false;
813
814 memcpy(chip->irq_stat, cur_stat, NBANK(chip));
815
816 for (i = 0; i < NBANK(chip); i++) {
817 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
818 (cur_stat[i] & chip->irq_trig_raise[i]);
819 pending[i] &= trigger[i];
820 if (pending[i])
821 pending_seen = true;
822 }
823
824 return pending_seen;
825 }
826
pca953x_irq_handler(int irq,void * devid)827 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
828 {
829 struct pca953x_chip *chip = devid;
830 u8 pending[MAX_BANK];
831 u8 level;
832 unsigned nhandled = 0;
833 int i;
834
835 if (!pca953x_irq_pending(chip, pending))
836 return IRQ_NONE;
837
838 for (i = 0; i < NBANK(chip); i++) {
839 while (pending[i]) {
840 level = __ffs(pending[i]);
841 handle_nested_irq(irq_find_mapping(chip->gpio_chip.irq.domain,
842 level + (BANK_SZ * i)));
843 pending[i] &= ~(1 << level);
844 nhandled++;
845 }
846 }
847
848 return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE;
849 }
850
pca953x_irq_setup(struct pca953x_chip * chip,int irq_base)851 static int pca953x_irq_setup(struct pca953x_chip *chip,
852 int irq_base)
853 {
854 struct i2c_client *client = chip->client;
855 struct irq_chip *irq_chip = &chip->irq_chip;
856 u8 reg_direction[MAX_BANK];
857 int ret, i;
858
859 if (dmi_first_match(pca953x_dmi_acpi_irq_info)) {
860 ret = pca953x_acpi_get_irq(&client->dev);
861 if (ret > 0)
862 client->irq = ret;
863 }
864
865 if (!client->irq)
866 return 0;
867
868 if (irq_base == -1)
869 return 0;
870
871 if (!(chip->driver_data & PCA_INT))
872 return 0;
873
874 ret = pca953x_read_regs(chip, chip->regs->input, chip->irq_stat);
875 if (ret)
876 return ret;
877
878 /*
879 * There is no way to know which GPIO line generated the
880 * interrupt. We have to rely on the previous read for
881 * this purpose.
882 */
883 pca953x_read_regs(chip, chip->regs->direction, reg_direction);
884 for (i = 0; i < NBANK(chip); i++)
885 chip->irq_stat[i] &= reg_direction[i];
886 mutex_init(&chip->irq_lock);
887
888 ret = devm_request_threaded_irq(&client->dev, client->irq,
889 NULL, pca953x_irq_handler,
890 IRQF_TRIGGER_LOW | IRQF_ONESHOT |
891 IRQF_SHARED,
892 dev_name(&client->dev), chip);
893 if (ret) {
894 dev_err(&client->dev, "failed to request irq %d\n",
895 client->irq);
896 return ret;
897 }
898
899 irq_chip->name = dev_name(&chip->client->dev);
900 irq_chip->irq_mask = pca953x_irq_mask;
901 irq_chip->irq_unmask = pca953x_irq_unmask;
902 irq_chip->irq_set_wake = pca953x_irq_set_wake;
903 irq_chip->irq_bus_lock = pca953x_irq_bus_lock;
904 irq_chip->irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock;
905 irq_chip->irq_set_type = pca953x_irq_set_type;
906 irq_chip->irq_shutdown = pca953x_irq_shutdown;
907
908 ret = gpiochip_irqchip_add_nested(&chip->gpio_chip, irq_chip,
909 irq_base, handle_simple_irq,
910 IRQ_TYPE_NONE);
911 if (ret) {
912 dev_err(&client->dev,
913 "could not connect irqchip to gpiochip\n");
914 return ret;
915 }
916
917 gpiochip_set_nested_irqchip(&chip->gpio_chip, irq_chip, client->irq);
918
919 return 0;
920 }
921
922 #else /* CONFIG_GPIO_PCA953X_IRQ */
pca953x_irq_setup(struct pca953x_chip * chip,int irq_base)923 static int pca953x_irq_setup(struct pca953x_chip *chip,
924 int irq_base)
925 {
926 struct i2c_client *client = chip->client;
927
928 if (client->irq && irq_base != -1 && (chip->driver_data & PCA_INT))
929 dev_warn(&client->dev, "interrupt support not compiled in\n");
930
931 return 0;
932 }
933 #endif
934
device_pca95xx_init(struct pca953x_chip * chip,u32 invert)935 static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert)
936 {
937 int ret;
938 u8 val[MAX_BANK];
939
940 ret = regcache_sync_region(chip->regmap, chip->regs->output,
941 chip->regs->output + NBANK(chip));
942 if (ret)
943 goto out;
944
945 ret = regcache_sync_region(chip->regmap, chip->regs->direction,
946 chip->regs->direction + NBANK(chip));
947 if (ret)
948 goto out;
949
950 /* set platform specific polarity inversion */
951 if (invert)
952 memset(val, 0xFF, NBANK(chip));
953 else
954 memset(val, 0, NBANK(chip));
955
956 ret = pca953x_write_regs(chip, chip->regs->invert, val);
957 out:
958 return ret;
959 }
960
device_pca957x_init(struct pca953x_chip * chip,u32 invert)961 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
962 {
963 int ret;
964 u8 val[MAX_BANK];
965
966 ret = device_pca95xx_init(chip, invert);
967 if (ret)
968 goto out;
969
970 /* To enable register 6, 7 to control pull up and pull down */
971 memset(val, 0x02, NBANK(chip));
972 ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
973 if (ret)
974 goto out;
975
976 return 0;
977 out:
978 return ret;
979 }
980
981 static const struct of_device_id pca953x_dt_ids[];
982
pca953x_probe(struct i2c_client * client,const struct i2c_device_id * i2c_id)983 static int pca953x_probe(struct i2c_client *client,
984 const struct i2c_device_id *i2c_id)
985 {
986 struct pca953x_platform_data *pdata;
987 struct pca953x_chip *chip;
988 int irq_base = 0;
989 int ret;
990 u32 invert = 0;
991 struct regulator *reg;
992 const struct regmap_config *regmap_config;
993
994 chip = devm_kzalloc(&client->dev,
995 sizeof(struct pca953x_chip), GFP_KERNEL);
996 if (chip == NULL)
997 return -ENOMEM;
998
999 pdata = dev_get_platdata(&client->dev);
1000 if (pdata) {
1001 irq_base = pdata->irq_base;
1002 chip->gpio_start = pdata->gpio_base;
1003 invert = pdata->invert;
1004 chip->names = pdata->names;
1005 } else {
1006 struct gpio_desc *reset_gpio;
1007
1008 chip->gpio_start = -1;
1009 irq_base = 0;
1010
1011 /*
1012 * See if we need to de-assert a reset pin.
1013 *
1014 * There is no known ACPI-enabled platforms that are
1015 * using "reset" GPIO. Otherwise any of those platform
1016 * must use _DSD method with corresponding property.
1017 */
1018 reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
1019 GPIOD_OUT_LOW);
1020 if (IS_ERR(reset_gpio))
1021 return PTR_ERR(reset_gpio);
1022 }
1023
1024 chip->client = client;
1025
1026 reg = devm_regulator_get(&client->dev, "vcc");
1027 if (IS_ERR(reg)) {
1028 ret = PTR_ERR(reg);
1029 if (ret != -EPROBE_DEFER)
1030 dev_err(&client->dev, "reg get err: %d\n", ret);
1031 return ret;
1032 }
1033 ret = regulator_enable(reg);
1034 if (ret) {
1035 dev_err(&client->dev, "reg en err: %d\n", ret);
1036 return ret;
1037 }
1038 chip->regulator = reg;
1039
1040 if (i2c_id) {
1041 chip->driver_data = i2c_id->driver_data;
1042 } else {
1043 const void *match;
1044
1045 match = device_get_match_data(&client->dev);
1046 if (!match) {
1047 ret = -ENODEV;
1048 goto err_exit;
1049 }
1050
1051 chip->driver_data = (uintptr_t)match;
1052 }
1053
1054 i2c_set_clientdata(client, chip);
1055
1056 pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
1057
1058 if (NBANK(chip) > 2 || PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) {
1059 dev_info(&client->dev, "using AI\n");
1060 regmap_config = &pca953x_ai_i2c_regmap;
1061 } else {
1062 dev_info(&client->dev, "using no AI\n");
1063 regmap_config = &pca953x_i2c_regmap;
1064 }
1065
1066 chip->regmap = devm_regmap_init_i2c(client, regmap_config);
1067 if (IS_ERR(chip->regmap)) {
1068 ret = PTR_ERR(chip->regmap);
1069 goto err_exit;
1070 }
1071
1072 regcache_mark_dirty(chip->regmap);
1073
1074 mutex_init(&chip->i2c_lock);
1075 /*
1076 * In case we have an i2c-mux controlled by a GPIO provided by an
1077 * expander using the same driver higher on the device tree, read the
1078 * i2c adapter nesting depth and use the retrieved value as lockdep
1079 * subclass for chip->i2c_lock.
1080 *
1081 * REVISIT: This solution is not complete. It protects us from lockdep
1082 * false positives when the expander controlling the i2c-mux is on
1083 * a different level on the device tree, but not when it's on the same
1084 * level on a different branch (in which case the subclass number
1085 * would be the same).
1086 *
1087 * TODO: Once a correct solution is developed, a similar fix should be
1088 * applied to all other i2c-controlled GPIO expanders (and potentially
1089 * regmap-i2c).
1090 */
1091 lockdep_set_subclass(&chip->i2c_lock,
1092 i2c_adapter_depth(client->adapter));
1093
1094 /* initialize cached registers from their original values.
1095 * we can't share this chip with another i2c master.
1096 */
1097
1098 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
1099 chip->regs = &pca953x_regs;
1100 ret = device_pca95xx_init(chip, invert);
1101 } else {
1102 chip->regs = &pca957x_regs;
1103 ret = device_pca957x_init(chip, invert);
1104 }
1105 if (ret)
1106 goto err_exit;
1107
1108 ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
1109 if (ret)
1110 goto err_exit;
1111
1112 ret = pca953x_irq_setup(chip, irq_base);
1113 if (ret)
1114 goto err_exit;
1115
1116 if (pdata && pdata->setup) {
1117 ret = pdata->setup(client, chip->gpio_chip.base,
1118 chip->gpio_chip.ngpio, pdata->context);
1119 if (ret < 0)
1120 dev_warn(&client->dev, "setup failed, %d\n", ret);
1121 }
1122
1123 return 0;
1124
1125 err_exit:
1126 regulator_disable(chip->regulator);
1127 return ret;
1128 }
1129
pca953x_remove(struct i2c_client * client)1130 static int pca953x_remove(struct i2c_client *client)
1131 {
1132 struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
1133 struct pca953x_chip *chip = i2c_get_clientdata(client);
1134 int ret;
1135
1136 if (pdata && pdata->teardown) {
1137 ret = pdata->teardown(client, chip->gpio_chip.base,
1138 chip->gpio_chip.ngpio, pdata->context);
1139 if (ret < 0)
1140 dev_err(&client->dev, "teardown failed, %d\n", ret);
1141 } else {
1142 ret = 0;
1143 }
1144
1145 regulator_disable(chip->regulator);
1146
1147 return ret;
1148 }
1149
1150 #ifdef CONFIG_PM_SLEEP
pca953x_regcache_sync(struct device * dev)1151 static int pca953x_regcache_sync(struct device *dev)
1152 {
1153 struct pca953x_chip *chip = dev_get_drvdata(dev);
1154 int ret;
1155
1156 /*
1157 * The ordering between direction and output is important,
1158 * sync these registers first and only then sync the rest.
1159 */
1160 ret = regcache_sync_region(chip->regmap, chip->regs->direction,
1161 chip->regs->direction + NBANK(chip));
1162 if (ret) {
1163 dev_err(dev, "Failed to sync GPIO dir registers: %d\n", ret);
1164 return ret;
1165 }
1166
1167 ret = regcache_sync_region(chip->regmap, chip->regs->output,
1168 chip->regs->output + NBANK(chip));
1169 if (ret) {
1170 dev_err(dev, "Failed to sync GPIO out registers: %d\n", ret);
1171 return ret;
1172 }
1173
1174 #ifdef CONFIG_GPIO_PCA953X_IRQ
1175 if (chip->driver_data & PCA_PCAL) {
1176 ret = regcache_sync_region(chip->regmap, PCAL953X_IN_LATCH,
1177 PCAL953X_IN_LATCH + NBANK(chip));
1178 if (ret) {
1179 dev_err(dev, "Failed to sync INT latch registers: %d\n",
1180 ret);
1181 return ret;
1182 }
1183
1184 ret = regcache_sync_region(chip->regmap, PCAL953X_INT_MASK,
1185 PCAL953X_INT_MASK + NBANK(chip));
1186 if (ret) {
1187 dev_err(dev, "Failed to sync INT mask registers: %d\n",
1188 ret);
1189 return ret;
1190 }
1191 }
1192 #endif
1193
1194 return 0;
1195 }
1196
pca953x_suspend(struct device * dev)1197 static int pca953x_suspend(struct device *dev)
1198 {
1199 struct pca953x_chip *chip = dev_get_drvdata(dev);
1200
1201 mutex_lock(&chip->i2c_lock);
1202 regcache_cache_only(chip->regmap, true);
1203 mutex_unlock(&chip->i2c_lock);
1204
1205 if (atomic_read(&chip->wakeup_path))
1206 device_set_wakeup_path(dev);
1207 else
1208 regulator_disable(chip->regulator);
1209
1210 return 0;
1211 }
1212
pca953x_resume(struct device * dev)1213 static int pca953x_resume(struct device *dev)
1214 {
1215 struct pca953x_chip *chip = dev_get_drvdata(dev);
1216 int ret;
1217
1218 if (!atomic_read(&chip->wakeup_path)) {
1219 ret = regulator_enable(chip->regulator);
1220 if (ret) {
1221 dev_err(dev, "Failed to enable regulator: %d\n", ret);
1222 return 0;
1223 }
1224 }
1225
1226 mutex_lock(&chip->i2c_lock);
1227 regcache_cache_only(chip->regmap, false);
1228 regcache_mark_dirty(chip->regmap);
1229 ret = pca953x_regcache_sync(dev);
1230 if (ret) {
1231 mutex_unlock(&chip->i2c_lock);
1232 return ret;
1233 }
1234
1235 ret = regcache_sync(chip->regmap);
1236 mutex_unlock(&chip->i2c_lock);
1237 if (ret) {
1238 dev_err(dev, "Failed to restore register map: %d\n", ret);
1239 return ret;
1240 }
1241
1242 return 0;
1243 }
1244 #endif
1245
1246 /* convenience to stop overlong match-table lines */
1247 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
1248 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
1249
1250 static const struct of_device_id pca953x_dt_ids[] = {
1251 { .compatible = "nxp,pca6416", .data = OF_953X(16, PCA_INT), },
1252 { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
1253 { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
1254 { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
1255 { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
1256 { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
1257 { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
1258 { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
1259 { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
1260 { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
1261 { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
1262 { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
1263 { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
1264 { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
1265 { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
1266
1267 { .compatible = "nxp,pcal6416", .data = OF_953X(16, PCA_LATCH_INT), },
1268 { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), },
1269 { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), },
1270
1271 { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
1272 { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
1273 { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
1274 { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
1275 { .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), },
1276
1277 { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
1278 { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), },
1279 { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
1280 { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
1281 { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
1282 { .compatible = "ti,tca9539", .data = OF_953X(16, PCA_INT), },
1283
1284 { .compatible = "onnn,cat9554", .data = OF_953X( 8, PCA_INT), },
1285 { .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), },
1286 { .compatible = "onnn,pca9655", .data = OF_953X(16, PCA_INT), },
1287
1288 { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
1289 { }
1290 };
1291
1292 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
1293
1294 static SIMPLE_DEV_PM_OPS(pca953x_pm_ops, pca953x_suspend, pca953x_resume);
1295
1296 static struct i2c_driver pca953x_driver = {
1297 .driver = {
1298 .name = "pca953x",
1299 .pm = &pca953x_pm_ops,
1300 .of_match_table = pca953x_dt_ids,
1301 .acpi_match_table = ACPI_PTR(pca953x_acpi_ids),
1302 },
1303 .probe = pca953x_probe,
1304 .remove = pca953x_remove,
1305 .id_table = pca953x_id,
1306 };
1307
pca953x_init(void)1308 static int __init pca953x_init(void)
1309 {
1310 return i2c_add_driver(&pca953x_driver);
1311 }
1312 /* register after i2c postcore initcall and before
1313 * subsys initcalls that may rely on these GPIOs
1314 */
1315 subsys_initcall(pca953x_init);
1316
pca953x_exit(void)1317 static void __exit pca953x_exit(void)
1318 {
1319 i2c_del_driver(&pca953x_driver);
1320 }
1321 module_exit(pca953x_exit);
1322
1323 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
1324 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
1325 MODULE_LICENSE("GPL");
1326