1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Purpose: PCI Express Port Bus Driver
4 * Author: Tom Nguyen <tom.l.nguyen@intel.com>
5 *
6 * Copyright (C) 2004 Intel
7 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
8 */
9
10 #include <linux/pci.h>
11 #include <linux/kernel.h>
12 #include <linux/errno.h>
13 #include <linux/pm.h>
14 #include <linux/pm_runtime.h>
15 #include <linux/init.h>
16 #include <linux/aer.h>
17 #include <linux/dmi.h>
18
19 #include "../pci.h"
20 #include "portdrv.h"
21
22 /* If this switch is set, PCIe port native services should not be enabled. */
23 bool pcie_ports_disabled;
24
25 /*
26 * If the user specified "pcie_ports=native", use the PCIe services regardless
27 * of whether the platform has given us permission. On ACPI systems, this
28 * means we ignore _OSC.
29 */
30 bool pcie_ports_native;
31
pcie_port_setup(char * str)32 static int __init pcie_port_setup(char *str)
33 {
34 if (!strncmp(str, "compat", 6))
35 pcie_ports_disabled = true;
36 else if (!strncmp(str, "native", 6))
37 pcie_ports_native = true;
38
39 return 1;
40 }
41 __setup("pcie_ports=", pcie_port_setup);
42
43 /* global data */
44
45 #ifdef CONFIG_PM
pcie_port_runtime_suspend(struct device * dev)46 static int pcie_port_runtime_suspend(struct device *dev)
47 {
48 if (!to_pci_dev(dev)->bridge_d3)
49 return -EBUSY;
50
51 return pcie_port_device_runtime_suspend(dev);
52 }
53
pcie_port_runtime_idle(struct device * dev)54 static int pcie_port_runtime_idle(struct device *dev)
55 {
56 /*
57 * Assume the PCI core has set bridge_d3 whenever it thinks the port
58 * should be good to go to D3. Everything else, including moving
59 * the port to D3, is handled by the PCI core.
60 */
61 return to_pci_dev(dev)->bridge_d3 ? 0 : -EBUSY;
62 }
63
64 static const struct dev_pm_ops pcie_portdrv_pm_ops = {
65 .suspend = pcie_port_device_suspend,
66 .resume_noirq = pcie_port_device_resume_noirq,
67 .resume = pcie_port_device_resume,
68 .freeze = pcie_port_device_suspend,
69 .thaw = pcie_port_device_resume,
70 .poweroff = pcie_port_device_suspend,
71 .restore_noirq = pcie_port_device_resume_noirq,
72 .restore = pcie_port_device_resume,
73 .runtime_suspend = pcie_port_runtime_suspend,
74 .runtime_resume = pcie_port_device_runtime_resume,
75 .runtime_idle = pcie_port_runtime_idle,
76 };
77
78 #define PCIE_PORTDRV_PM_OPS (&pcie_portdrv_pm_ops)
79
80 #else /* !PM */
81
82 #define PCIE_PORTDRV_PM_OPS NULL
83 #endif /* !PM */
84
85 /*
86 * pcie_portdrv_probe - Probe PCI-Express port devices
87 * @dev: PCI-Express port device being probed
88 *
89 * If detected invokes the pcie_port_device_register() method for
90 * this port device.
91 *
92 */
pcie_portdrv_probe(struct pci_dev * dev,const struct pci_device_id * id)93 static int pcie_portdrv_probe(struct pci_dev *dev,
94 const struct pci_device_id *id)
95 {
96 int status;
97
98 if (!pci_is_pcie(dev) ||
99 ((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) &&
100 (pci_pcie_type(dev) != PCI_EXP_TYPE_UPSTREAM) &&
101 (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM)))
102 return -ENODEV;
103
104 status = pcie_port_device_register(dev);
105 if (status)
106 return status;
107
108 pci_save_state(dev);
109
110 dev_pm_set_driver_flags(&dev->dev, DPM_FLAG_NEVER_SKIP |
111 DPM_FLAG_SMART_SUSPEND);
112
113 if (pci_bridge_d3_possible(dev)) {
114 /*
115 * Keep the port resumed 100ms to make sure things like
116 * config space accesses from userspace (lspci) will not
117 * cause the port to repeatedly suspend and resume.
118 */
119 pm_runtime_set_autosuspend_delay(&dev->dev, 100);
120 pm_runtime_use_autosuspend(&dev->dev);
121 pm_runtime_mark_last_busy(&dev->dev);
122 pm_runtime_put_autosuspend(&dev->dev);
123 pm_runtime_allow(&dev->dev);
124 }
125
126 return 0;
127 }
128
pcie_portdrv_remove(struct pci_dev * dev)129 static void pcie_portdrv_remove(struct pci_dev *dev)
130 {
131 if (pci_bridge_d3_possible(dev)) {
132 pm_runtime_forbid(&dev->dev);
133 pm_runtime_get_noresume(&dev->dev);
134 pm_runtime_dont_use_autosuspend(&dev->dev);
135 }
136
137 pcie_port_device_remove(dev);
138 }
139
pcie_portdrv_error_detected(struct pci_dev * dev,enum pci_channel_state error)140 static pci_ers_result_t pcie_portdrv_error_detected(struct pci_dev *dev,
141 enum pci_channel_state error)
142 {
143 /* Root Port has no impact. Always recovers. */
144 return PCI_ERS_RESULT_CAN_RECOVER;
145 }
146
pcie_portdrv_slot_reset(struct pci_dev * dev)147 static pci_ers_result_t pcie_portdrv_slot_reset(struct pci_dev *dev)
148 {
149 pci_restore_state(dev);
150 pci_save_state(dev);
151 return PCI_ERS_RESULT_RECOVERED;
152 }
153
pcie_portdrv_mmio_enabled(struct pci_dev * dev)154 static pci_ers_result_t pcie_portdrv_mmio_enabled(struct pci_dev *dev)
155 {
156 return PCI_ERS_RESULT_RECOVERED;
157 }
158
resume_iter(struct device * device,void * data)159 static int resume_iter(struct device *device, void *data)
160 {
161 struct pcie_device *pcie_device;
162 struct pcie_port_service_driver *driver;
163
164 if (device->bus == &pcie_port_bus_type && device->driver) {
165 driver = to_service_driver(device->driver);
166 if (driver && driver->error_resume) {
167 pcie_device = to_pcie_device(device);
168
169 /* Forward error message to service drivers */
170 driver->error_resume(pcie_device->port);
171 }
172 }
173
174 return 0;
175 }
176
pcie_portdrv_err_resume(struct pci_dev * dev)177 static void pcie_portdrv_err_resume(struct pci_dev *dev)
178 {
179 device_for_each_child(&dev->dev, NULL, resume_iter);
180 }
181
182 /*
183 * LINUX Device Driver Model
184 */
185 static const struct pci_device_id port_pci_ids[] = {
186 /* handle any PCI-Express port */
187 { PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x00), ~0) },
188 /* subtractive decode PCI-to-PCI bridge, class type is 060401h */
189 { PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x01), ~0) },
190 { },
191 };
192
193 static const struct pci_error_handlers pcie_portdrv_err_handler = {
194 .error_detected = pcie_portdrv_error_detected,
195 .slot_reset = pcie_portdrv_slot_reset,
196 .mmio_enabled = pcie_portdrv_mmio_enabled,
197 .resume = pcie_portdrv_err_resume,
198 };
199
200 static struct pci_driver pcie_portdriver = {
201 .name = "pcieport",
202 .id_table = &port_pci_ids[0],
203
204 .probe = pcie_portdrv_probe,
205 .remove = pcie_portdrv_remove,
206 .shutdown = pcie_portdrv_remove,
207
208 .err_handler = &pcie_portdrv_err_handler,
209
210 .driver.pm = PCIE_PORTDRV_PM_OPS,
211 };
212
dmi_pcie_pme_disable_msi(const struct dmi_system_id * d)213 static int __init dmi_pcie_pme_disable_msi(const struct dmi_system_id *d)
214 {
215 pr_notice("%s detected: will not use MSI for PCIe PME signaling\n",
216 d->ident);
217 pcie_pme_disable_msi();
218 return 0;
219 }
220
221 static const struct dmi_system_id pcie_portdrv_dmi_table[] __initconst = {
222 /*
223 * Boxes that should not use MSI for PCIe PME signaling.
224 */
225 {
226 .callback = dmi_pcie_pme_disable_msi,
227 .ident = "MSI Wind U-100",
228 .matches = {
229 DMI_MATCH(DMI_SYS_VENDOR,
230 "MICRO-STAR INTERNATIONAL CO., LTD"),
231 DMI_MATCH(DMI_PRODUCT_NAME, "U-100"),
232 },
233 },
234 {}
235 };
236
pcie_init_services(void)237 static void __init pcie_init_services(void)
238 {
239 pcie_aer_init();
240 pcie_pme_init();
241 pcie_dpc_init();
242 pcie_hp_init();
243 pcie_bandwidth_notification_init();
244 }
245
pcie_portdrv_init(void)246 static int __init pcie_portdrv_init(void)
247 {
248 if (pcie_ports_disabled)
249 return -EACCES;
250
251 pcie_init_services();
252 dmi_check_system(pcie_portdrv_dmi_table);
253
254 return pci_register_driver(&pcie_portdriver);
255 }
256 device_initcall(pcie_portdrv_init);
257