1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Copyright (C) 2016 IBM Corp.
4 */
5
6 #include <linux/mfd/syscon.h>
7 #include <linux/platform_device.h>
8 #include <linux/slab.h>
9 #include <linux/string.h>
10 #include "../core.h"
11 #include "pinctrl-aspeed.h"
12
aspeed_pinctrl_get_groups_count(struct pinctrl_dev * pctldev)13 int aspeed_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
14 {
15 struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
16
17 return pdata->pinmux.ngroups;
18 }
19
aspeed_pinctrl_get_group_name(struct pinctrl_dev * pctldev,unsigned int group)20 const char *aspeed_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
21 unsigned int group)
22 {
23 struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
24
25 return pdata->pinmux.groups[group].name;
26 }
27
aspeed_pinctrl_get_group_pins(struct pinctrl_dev * pctldev,unsigned int group,const unsigned int ** pins,unsigned int * npins)28 int aspeed_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
29 unsigned int group, const unsigned int **pins,
30 unsigned int *npins)
31 {
32 struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
33
34 *pins = &pdata->pinmux.groups[group].pins[0];
35 *npins = pdata->pinmux.groups[group].npins;
36
37 return 0;
38 }
39
aspeed_pinctrl_pin_dbg_show(struct pinctrl_dev * pctldev,struct seq_file * s,unsigned int offset)40 void aspeed_pinctrl_pin_dbg_show(struct pinctrl_dev *pctldev,
41 struct seq_file *s, unsigned int offset)
42 {
43 seq_printf(s, " %s", dev_name(pctldev->dev));
44 }
45
aspeed_pinmux_get_fn_count(struct pinctrl_dev * pctldev)46 int aspeed_pinmux_get_fn_count(struct pinctrl_dev *pctldev)
47 {
48 struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
49
50 return pdata->pinmux.nfunctions;
51 }
52
aspeed_pinmux_get_fn_name(struct pinctrl_dev * pctldev,unsigned int function)53 const char *aspeed_pinmux_get_fn_name(struct pinctrl_dev *pctldev,
54 unsigned int function)
55 {
56 struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
57
58 return pdata->pinmux.functions[function].name;
59 }
60
aspeed_pinmux_get_fn_groups(struct pinctrl_dev * pctldev,unsigned int function,const char * const ** groups,unsigned int * const num_groups)61 int aspeed_pinmux_get_fn_groups(struct pinctrl_dev *pctldev,
62 unsigned int function,
63 const char * const **groups,
64 unsigned int * const num_groups)
65 {
66 struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
67
68 *groups = pdata->pinmux.functions[function].groups;
69 *num_groups = pdata->pinmux.functions[function].ngroups;
70
71 return 0;
72 }
73
aspeed_sig_expr_enable(struct aspeed_pinmux_data * ctx,const struct aspeed_sig_expr * expr)74 static int aspeed_sig_expr_enable(struct aspeed_pinmux_data *ctx,
75 const struct aspeed_sig_expr *expr)
76 {
77 int ret;
78
79 ret = aspeed_sig_expr_eval(ctx, expr, true);
80 if (ret < 0)
81 return ret;
82
83 if (!ret)
84 return aspeed_sig_expr_set(ctx, expr, true);
85
86 return 0;
87 }
88
aspeed_sig_expr_disable(struct aspeed_pinmux_data * ctx,const struct aspeed_sig_expr * expr)89 static int aspeed_sig_expr_disable(struct aspeed_pinmux_data *ctx,
90 const struct aspeed_sig_expr *expr)
91 {
92 int ret;
93
94 ret = aspeed_sig_expr_eval(ctx, expr, true);
95 if (ret < 0)
96 return ret;
97
98 if (ret)
99 return aspeed_sig_expr_set(ctx, expr, false);
100
101 return 0;
102 }
103
104 /**
105 * Disable a signal on a pin by disabling all provided signal expressions.
106 *
107 * @ctx: The pinmux context
108 * @exprs: The list of signal expressions (from a priority level on a pin)
109 *
110 * Return: 0 if all expressions are disabled, otherwise a negative error code
111 */
aspeed_disable_sig(struct aspeed_pinmux_data * ctx,const struct aspeed_sig_expr ** exprs)112 static int aspeed_disable_sig(struct aspeed_pinmux_data *ctx,
113 const struct aspeed_sig_expr **exprs)
114 {
115 int ret = 0;
116
117 if (!exprs)
118 return -EINVAL;
119
120 while (*exprs && !ret) {
121 ret = aspeed_sig_expr_disable(ctx, *exprs);
122 exprs++;
123 }
124
125 return ret;
126 }
127
128 /**
129 * Search for the signal expression needed to enable the pin's signal for the
130 * requested function.
131 *
132 * @exprs: List of signal expressions (haystack)
133 * @name: The name of the requested function (needle)
134 *
135 * Return: A pointer to the signal expression whose function tag matches the
136 * provided name, otherwise NULL.
137 *
138 */
aspeed_find_expr_by_name(const struct aspeed_sig_expr ** exprs,const char * name)139 static const struct aspeed_sig_expr *aspeed_find_expr_by_name(
140 const struct aspeed_sig_expr **exprs, const char *name)
141 {
142 while (*exprs) {
143 if (strcmp((*exprs)->function, name) == 0)
144 return *exprs;
145 exprs++;
146 }
147
148 return NULL;
149 }
150
get_defined_attribute(const struct aspeed_pin_desc * pdesc,const char * (* get)(const struct aspeed_sig_expr *))151 static char *get_defined_attribute(const struct aspeed_pin_desc *pdesc,
152 const char *(*get)(
153 const struct aspeed_sig_expr *))
154 {
155 char *found = NULL;
156 size_t len = 0;
157 const struct aspeed_sig_expr ***prios, **funcs, *expr;
158
159 prios = pdesc->prios;
160
161 while ((funcs = *prios)) {
162 while ((expr = *funcs)) {
163 const char *str = get(expr);
164 size_t delta = strlen(str) + 2;
165 char *expanded;
166
167 expanded = krealloc(found, len + delta + 1, GFP_KERNEL);
168 if (!expanded) {
169 kfree(found);
170 return expanded;
171 }
172
173 found = expanded;
174 found[len] = '\0';
175 len += delta;
176
177 strcat(found, str);
178 strcat(found, ", ");
179
180 funcs++;
181 }
182 prios++;
183 }
184
185 if (len < 2) {
186 kfree(found);
187 return NULL;
188 }
189
190 found[len - 2] = '\0';
191
192 return found;
193 }
194
aspeed_sig_expr_function(const struct aspeed_sig_expr * expr)195 static const char *aspeed_sig_expr_function(const struct aspeed_sig_expr *expr)
196 {
197 return expr->function;
198 }
199
get_defined_functions(const struct aspeed_pin_desc * pdesc)200 static char *get_defined_functions(const struct aspeed_pin_desc *pdesc)
201 {
202 return get_defined_attribute(pdesc, aspeed_sig_expr_function);
203 }
204
aspeed_sig_expr_signal(const struct aspeed_sig_expr * expr)205 static const char *aspeed_sig_expr_signal(const struct aspeed_sig_expr *expr)
206 {
207 return expr->signal;
208 }
209
get_defined_signals(const struct aspeed_pin_desc * pdesc)210 static char *get_defined_signals(const struct aspeed_pin_desc *pdesc)
211 {
212 return get_defined_attribute(pdesc, aspeed_sig_expr_signal);
213 }
214
aspeed_pinmux_set_mux(struct pinctrl_dev * pctldev,unsigned int function,unsigned int group)215 int aspeed_pinmux_set_mux(struct pinctrl_dev *pctldev, unsigned int function,
216 unsigned int group)
217 {
218 int i;
219 int ret;
220 struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
221 const struct aspeed_pin_group *pgroup = &pdata->pinmux.groups[group];
222 const struct aspeed_pin_function *pfunc =
223 &pdata->pinmux.functions[function];
224
225 for (i = 0; i < pgroup->npins; i++) {
226 int pin = pgroup->pins[i];
227 const struct aspeed_pin_desc *pdesc = pdata->pins[pin].drv_data;
228 const struct aspeed_sig_expr *expr = NULL;
229 const struct aspeed_sig_expr **funcs;
230 const struct aspeed_sig_expr ***prios;
231
232 pr_debug("Muxing pin %d for %s\n", pin, pfunc->name);
233
234 if (!pdesc)
235 return -EINVAL;
236
237 prios = pdesc->prios;
238
239 if (!prios)
240 continue;
241
242 /* Disable functions at a higher priority than that requested */
243 while ((funcs = *prios)) {
244 expr = aspeed_find_expr_by_name(funcs, pfunc->name);
245
246 if (expr)
247 break;
248
249 ret = aspeed_disable_sig(&pdata->pinmux, funcs);
250 if (ret)
251 return ret;
252
253 prios++;
254 }
255
256 if (!expr) {
257 char *functions = get_defined_functions(pdesc);
258 char *signals = get_defined_signals(pdesc);
259
260 pr_warn("No function %s found on pin %s (%d). Found signal(s) %s for function(s) %s\n",
261 pfunc->name, pdesc->name, pin, signals,
262 functions);
263 kfree(signals);
264 kfree(functions);
265
266 return -ENXIO;
267 }
268
269 ret = aspeed_sig_expr_enable(&pdata->pinmux, expr);
270 if (ret)
271 return ret;
272 }
273
274 return 0;
275 }
276
aspeed_expr_is_gpio(const struct aspeed_sig_expr * expr)277 static bool aspeed_expr_is_gpio(const struct aspeed_sig_expr *expr)
278 {
279 /*
280 * We need to differentiate between GPIO and non-GPIO signals to
281 * implement the gpio_request_enable() interface. For better or worse
282 * the ASPEED pinctrl driver uses the expression names to determine
283 * whether an expression will mux a pin for GPIO.
284 *
285 * Generally we have the following - A GPIO such as B1 has:
286 *
287 * - expr->signal set to "GPIOB1"
288 * - expr->function set to "GPIOB1"
289 *
290 * Using this fact we can determine whether the provided expression is
291 * a GPIO expression by testing the signal name for the string prefix
292 * "GPIO".
293 *
294 * However, some GPIOs are input-only, and the ASPEED datasheets name
295 * them differently. An input-only GPIO such as T0 has:
296 *
297 * - expr->signal set to "GPIT0"
298 * - expr->function set to "GPIT0"
299 *
300 * It's tempting to generalise the prefix test from "GPIO" to "GPI" to
301 * account for both GPIOs and GPIs, but in doing so we run aground on
302 * another feature:
303 *
304 * Some pins in the ASPEED BMC SoCs have a "pass-through" GPIO
305 * function where the input state of one pin is replicated as the
306 * output state of another (as if they were shorted together - a mux
307 * configuration that is typically enabled by hardware strapping).
308 * This feature allows the BMC to pass e.g. power button state through
309 * to the host while the BMC is yet to boot, but take control of the
310 * button state once the BMC has booted by muxing each pin as a
311 * separate, pin-specific GPIO.
312 *
313 * Conceptually this pass-through mode is a form of GPIO and is named
314 * as such in the datasheets, e.g. "GPID0". This naming similarity
315 * trips us up with the simple GPI-prefixed-signal-name scheme
316 * discussed above, as the pass-through configuration is not what we
317 * want when muxing a pin as GPIO for the GPIO subsystem.
318 *
319 * On e.g. the AST2400, a pass-through function "GPID0" is grouped on
320 * balls A18 and D16, where we have:
321 *
322 * For ball A18:
323 * - expr->signal set to "GPID0IN"
324 * - expr->function set to "GPID0"
325 *
326 * For ball D16:
327 * - expr->signal set to "GPID0OUT"
328 * - expr->function set to "GPID0"
329 *
330 * By contrast, the pin-specific GPIO expressions for the same pins are
331 * as follows:
332 *
333 * For ball A18:
334 * - expr->signal looks like "GPIOD0"
335 * - expr->function looks like "GPIOD0"
336 *
337 * For ball D16:
338 * - expr->signal looks like "GPIOD1"
339 * - expr->function looks like "GPIOD1"
340 *
341 * Testing both the signal _and_ function names gives us the means
342 * differentiate the pass-through GPIO pinmux configuration from the
343 * pin-specific configuration that the GPIO subsystem is after: An
344 * expression is a pin-specific (non-pass-through) GPIO configuration
345 * if the signal prefix is "GPI" and the signal name matches the
346 * function name.
347 */
348 return !strncmp(expr->signal, "GPI", 3) &&
349 !strcmp(expr->signal, expr->function);
350 }
351
aspeed_gpio_in_exprs(const struct aspeed_sig_expr ** exprs)352 static bool aspeed_gpio_in_exprs(const struct aspeed_sig_expr **exprs)
353 {
354 if (!exprs)
355 return false;
356
357 while (*exprs) {
358 if (aspeed_expr_is_gpio(*exprs))
359 return true;
360 exprs++;
361 }
362
363 return false;
364 }
365
aspeed_gpio_request_enable(struct pinctrl_dev * pctldev,struct pinctrl_gpio_range * range,unsigned int offset)366 int aspeed_gpio_request_enable(struct pinctrl_dev *pctldev,
367 struct pinctrl_gpio_range *range,
368 unsigned int offset)
369 {
370 int ret;
371 struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
372 const struct aspeed_pin_desc *pdesc = pdata->pins[offset].drv_data;
373 const struct aspeed_sig_expr ***prios, **funcs, *expr;
374
375 if (!pdesc)
376 return -EINVAL;
377
378 prios = pdesc->prios;
379
380 if (!prios)
381 return -ENXIO;
382
383 /* Disable any functions of higher priority than GPIO */
384 while ((funcs = *prios)) {
385 if (aspeed_gpio_in_exprs(funcs))
386 break;
387
388 ret = aspeed_disable_sig(&pdata->pinmux, funcs);
389 if (ret)
390 return ret;
391
392 prios++;
393 }
394
395 if (!funcs) {
396 char *signals = get_defined_signals(pdesc);
397
398 pr_warn("No GPIO signal type found on pin %s (%d). Found: %s\n",
399 pdesc->name, offset, signals);
400 kfree(signals);
401
402 return -ENXIO;
403 }
404
405 expr = *funcs;
406
407 /*
408 * Disabling all higher-priority expressions is enough to enable the
409 * lowest-priority signal type. As such it has no associated
410 * expression.
411 */
412 if (!expr)
413 return 0;
414
415 /*
416 * If GPIO is not the lowest priority signal type, assume there is only
417 * one expression defined to enable the GPIO function
418 */
419 return aspeed_sig_expr_enable(&pdata->pinmux, expr);
420 }
421
aspeed_pinctrl_probe(struct platform_device * pdev,struct pinctrl_desc * pdesc,struct aspeed_pinctrl_data * pdata)422 int aspeed_pinctrl_probe(struct platform_device *pdev,
423 struct pinctrl_desc *pdesc,
424 struct aspeed_pinctrl_data *pdata)
425 {
426 struct device *parent;
427 struct pinctrl_dev *pctl;
428
429 parent = pdev->dev.parent;
430 if (!parent) {
431 dev_err(&pdev->dev, "No parent for syscon pincontroller\n");
432 return -ENODEV;
433 }
434
435 pdata->scu = syscon_node_to_regmap(parent->of_node);
436 if (IS_ERR(pdata->scu)) {
437 dev_err(&pdev->dev, "No regmap for syscon pincontroller parent\n");
438 return PTR_ERR(pdata->scu);
439 }
440
441 pdata->pinmux.maps[ASPEED_IP_SCU] = pdata->scu;
442
443 pctl = pinctrl_register(pdesc, &pdev->dev, pdata);
444
445 if (IS_ERR(pctl)) {
446 dev_err(&pdev->dev, "Failed to register pinctrl\n");
447 return PTR_ERR(pctl);
448 }
449
450 platform_set_drvdata(pdev, pdata);
451
452 return 0;
453 }
454
pin_in_config_range(unsigned int offset,const struct aspeed_pin_config * config)455 static inline bool pin_in_config_range(unsigned int offset,
456 const struct aspeed_pin_config *config)
457 {
458 return offset >= config->pins[0] && offset <= config->pins[1];
459 }
460
find_pinconf_config(const struct aspeed_pinctrl_data * pdata,unsigned int offset,enum pin_config_param param)461 static inline const struct aspeed_pin_config *find_pinconf_config(
462 const struct aspeed_pinctrl_data *pdata,
463 unsigned int offset,
464 enum pin_config_param param)
465 {
466 unsigned int i;
467
468 for (i = 0; i < pdata->nconfigs; i++) {
469 if (param == pdata->configs[i].param &&
470 pin_in_config_range(offset, &pdata->configs[i]))
471 return &pdata->configs[i];
472 }
473
474 return NULL;
475 }
476
477 /*
478 * Aspeed pin configuration description.
479 *
480 * @param: pinconf configuration parameter
481 * @arg: The supported argument for @param, or -1 if any value is supported
482 * @val: The register value to write to configure @arg for @param
483 *
484 * The map is to be used in conjunction with the configuration array supplied
485 * by the driver implementation.
486 */
487 struct aspeed_pin_config_map {
488 enum pin_config_param param;
489 s32 arg;
490 u32 val;
491 };
492
493 enum aspeed_pin_config_map_type { MAP_TYPE_ARG, MAP_TYPE_VAL };
494
495 /* Aspeed consistently both:
496 *
497 * 1. Defines "disable bits" for internal pull-downs
498 * 2. Uses 8mA or 16mA drive strengths
499 */
500 static const struct aspeed_pin_config_map pin_config_map[] = {
501 { PIN_CONFIG_BIAS_PULL_DOWN, 0, 1 },
502 { PIN_CONFIG_BIAS_PULL_DOWN, -1, 0 },
503 { PIN_CONFIG_BIAS_DISABLE, -1, 1 },
504 { PIN_CONFIG_DRIVE_STRENGTH, 8, 0 },
505 { PIN_CONFIG_DRIVE_STRENGTH, 16, 1 },
506 };
507
find_pinconf_map(enum pin_config_param param,enum aspeed_pin_config_map_type type,s64 value)508 static const struct aspeed_pin_config_map *find_pinconf_map(
509 enum pin_config_param param,
510 enum aspeed_pin_config_map_type type,
511 s64 value)
512 {
513 int i;
514
515 for (i = 0; i < ARRAY_SIZE(pin_config_map); i++) {
516 const struct aspeed_pin_config_map *elem;
517 bool match;
518
519 elem = &pin_config_map[i];
520
521 switch (type) {
522 case MAP_TYPE_ARG:
523 match = (elem->arg == -1 || elem->arg == value);
524 break;
525 case MAP_TYPE_VAL:
526 match = (elem->val == value);
527 break;
528 }
529
530 if (param == elem->param && match)
531 return elem;
532 }
533
534 return NULL;
535 }
536
aspeed_pin_config_get(struct pinctrl_dev * pctldev,unsigned int offset,unsigned long * config)537 int aspeed_pin_config_get(struct pinctrl_dev *pctldev, unsigned int offset,
538 unsigned long *config)
539 {
540 const enum pin_config_param param = pinconf_to_config_param(*config);
541 const struct aspeed_pin_config_map *pmap;
542 const struct aspeed_pinctrl_data *pdata;
543 const struct aspeed_pin_config *pconf;
544 unsigned int val;
545 int rc = 0;
546 u32 arg;
547
548 pdata = pinctrl_dev_get_drvdata(pctldev);
549 pconf = find_pinconf_config(pdata, offset, param);
550 if (!pconf)
551 return -ENOTSUPP;
552
553 rc = regmap_read(pdata->scu, pconf->reg, &val);
554 if (rc < 0)
555 return rc;
556
557 pmap = find_pinconf_map(param, MAP_TYPE_VAL,
558 (val & BIT(pconf->bit)) >> pconf->bit);
559
560 if (!pmap)
561 return -EINVAL;
562
563 if (param == PIN_CONFIG_DRIVE_STRENGTH)
564 arg = (u32) pmap->arg;
565 else if (param == PIN_CONFIG_BIAS_PULL_DOWN)
566 arg = !!pmap->arg;
567 else
568 arg = 1;
569
570 if (!arg)
571 return -EINVAL;
572
573 *config = pinconf_to_config_packed(param, arg);
574
575 return 0;
576 }
577
aspeed_pin_config_set(struct pinctrl_dev * pctldev,unsigned int offset,unsigned long * configs,unsigned int num_configs)578 int aspeed_pin_config_set(struct pinctrl_dev *pctldev, unsigned int offset,
579 unsigned long *configs, unsigned int num_configs)
580 {
581 const struct aspeed_pinctrl_data *pdata;
582 unsigned int i;
583 int rc = 0;
584
585 pdata = pinctrl_dev_get_drvdata(pctldev);
586
587 for (i = 0; i < num_configs; i++) {
588 const struct aspeed_pin_config_map *pmap;
589 const struct aspeed_pin_config *pconf;
590 enum pin_config_param param;
591 unsigned int val;
592 u32 arg;
593
594 param = pinconf_to_config_param(configs[i]);
595 arg = pinconf_to_config_argument(configs[i]);
596
597 pconf = find_pinconf_config(pdata, offset, param);
598 if (!pconf)
599 return -ENOTSUPP;
600
601 pmap = find_pinconf_map(param, MAP_TYPE_ARG, arg);
602
603 if (WARN_ON(!pmap))
604 return -EINVAL;
605
606 val = pmap->val << pconf->bit;
607
608 rc = regmap_update_bits(pdata->scu, pconf->reg,
609 BIT(pconf->bit), val);
610
611 if (rc < 0)
612 return rc;
613
614 pr_debug("%s: Set SCU%02X[%d]=%d for param %d(=%d) on pin %d\n",
615 __func__, pconf->reg, pconf->bit, pmap->val,
616 param, arg, offset);
617 }
618
619 return 0;
620 }
621
aspeed_pin_config_group_get(struct pinctrl_dev * pctldev,unsigned int selector,unsigned long * config)622 int aspeed_pin_config_group_get(struct pinctrl_dev *pctldev,
623 unsigned int selector,
624 unsigned long *config)
625 {
626 const unsigned int *pins;
627 unsigned int npins;
628 int rc;
629
630 rc = aspeed_pinctrl_get_group_pins(pctldev, selector, &pins, &npins);
631 if (rc < 0)
632 return rc;
633
634 if (!npins)
635 return -ENODEV;
636
637 rc = aspeed_pin_config_get(pctldev, pins[0], config);
638
639 return rc;
640 }
641
aspeed_pin_config_group_set(struct pinctrl_dev * pctldev,unsigned int selector,unsigned long * configs,unsigned int num_configs)642 int aspeed_pin_config_group_set(struct pinctrl_dev *pctldev,
643 unsigned int selector,
644 unsigned long *configs,
645 unsigned int num_configs)
646 {
647 const unsigned int *pins;
648 unsigned int npins;
649 int rc;
650 int i;
651
652 pr_debug("%s: Fetching pins for group selector %d\n",
653 __func__, selector);
654 rc = aspeed_pinctrl_get_group_pins(pctldev, selector, &pins, &npins);
655 if (rc < 0)
656 return rc;
657
658 for (i = 0; i < npins; i++) {
659 rc = aspeed_pin_config_set(pctldev, pins[i], configs,
660 num_configs);
661 if (rc < 0)
662 return rc;
663 }
664
665 return 0;
666 }
667