1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * An I2C and SPI driver for the NXP PCF2127/29 RTC
4 * Copyright 2013 Til-Technologies
5 *
6 * Author: Renaud Cerrato <r.cerrato@til-technologies.fr>
7 *
8 * Watchdog and tamper functions
9 * Author: Bruno Thomsen <bruno.thomsen@gmail.com>
10 *
11 * based on the other drivers in this same directory.
12 *
13 * Datasheet: http://cache.nxp.com/documents/data_sheet/PCF2127.pdf
14 */
15
16 #include <linux/i2c.h>
17 #include <linux/spi/spi.h>
18 #include <linux/bcd.h>
19 #include <linux/rtc.h>
20 #include <linux/slab.h>
21 #include <linux/module.h>
22 #include <linux/of.h>
23 #include <linux/regmap.h>
24 #include <linux/watchdog.h>
25
26 /* Control register 1 */
27 #define PCF2127_REG_CTRL1 0x00
28 #define PCF2127_BIT_CTRL1_TSF1 BIT(4)
29 /* Control register 2 */
30 #define PCF2127_REG_CTRL2 0x01
31 #define PCF2127_BIT_CTRL2_TSIE BIT(2)
32 #define PCF2127_BIT_CTRL2_TSF2 BIT(5)
33 /* Control register 3 */
34 #define PCF2127_REG_CTRL3 0x02
35 #define PCF2127_BIT_CTRL3_BLIE BIT(0)
36 #define PCF2127_BIT_CTRL3_BIE BIT(1)
37 #define PCF2127_BIT_CTRL3_BLF BIT(2)
38 #define PCF2127_BIT_CTRL3_BF BIT(3)
39 #define PCF2127_BIT_CTRL3_BTSE BIT(4)
40 /* Time and date registers */
41 #define PCF2127_REG_SC 0x03
42 #define PCF2127_BIT_SC_OSF BIT(7)
43 #define PCF2127_REG_MN 0x04
44 #define PCF2127_REG_HR 0x05
45 #define PCF2127_REG_DM 0x06
46 #define PCF2127_REG_DW 0x07
47 #define PCF2127_REG_MO 0x08
48 #define PCF2127_REG_YR 0x09
49 /* Watchdog registers */
50 #define PCF2127_REG_WD_CTL 0x10
51 #define PCF2127_BIT_WD_CTL_TF0 BIT(0)
52 #define PCF2127_BIT_WD_CTL_TF1 BIT(1)
53 #define PCF2127_BIT_WD_CTL_CD0 BIT(6)
54 #define PCF2127_BIT_WD_CTL_CD1 BIT(7)
55 #define PCF2127_REG_WD_VAL 0x11
56 /* Tamper timestamp registers */
57 #define PCF2127_REG_TS_CTRL 0x12
58 #define PCF2127_BIT_TS_CTRL_TSOFF BIT(6)
59 #define PCF2127_BIT_TS_CTRL_TSM BIT(7)
60 #define PCF2127_REG_TS_SC 0x13
61 #define PCF2127_REG_TS_MN 0x14
62 #define PCF2127_REG_TS_HR 0x15
63 #define PCF2127_REG_TS_DM 0x16
64 #define PCF2127_REG_TS_MO 0x17
65 #define PCF2127_REG_TS_YR 0x18
66 /*
67 * RAM registers
68 * PCF2127 has 512 bytes general-purpose static RAM (SRAM) that is
69 * battery backed and can survive a power outage.
70 * PCF2129 doesn't have this feature.
71 */
72 #define PCF2127_REG_RAM_ADDR_MSB 0x1A
73 #define PCF2127_REG_RAM_WRT_CMD 0x1C
74 #define PCF2127_REG_RAM_RD_CMD 0x1D
75
76 /* Watchdog timer value constants */
77 #define PCF2127_WD_VAL_STOP 0
78 #define PCF2127_WD_VAL_MIN 2
79 #define PCF2127_WD_VAL_MAX 255
80 #define PCF2127_WD_VAL_DEFAULT 60
81
82 struct pcf2127 {
83 struct rtc_device *rtc;
84 struct watchdog_device wdd;
85 struct regmap *regmap;
86 };
87
88 /*
89 * In the routines that deal directly with the pcf2127 hardware, we use
90 * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch.
91 */
pcf2127_rtc_read_time(struct device * dev,struct rtc_time * tm)92 static int pcf2127_rtc_read_time(struct device *dev, struct rtc_time *tm)
93 {
94 struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
95 unsigned char buf[10];
96 int ret;
97
98 /*
99 * Avoid reading CTRL2 register as it causes WD_VAL register
100 * value to reset to 0 which means watchdog is stopped.
101 */
102 ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_CTRL3,
103 (buf + PCF2127_REG_CTRL3),
104 ARRAY_SIZE(buf) - PCF2127_REG_CTRL3);
105 if (ret) {
106 dev_err(dev, "%s: read error\n", __func__);
107 return ret;
108 }
109
110 if (buf[PCF2127_REG_CTRL3] & PCF2127_BIT_CTRL3_BLF)
111 dev_info(dev,
112 "low voltage detected, check/replace RTC battery.\n");
113
114 /* Clock integrity is not guaranteed when OSF flag is set. */
115 if (buf[PCF2127_REG_SC] & PCF2127_BIT_SC_OSF) {
116 /*
117 * no need clear the flag here,
118 * it will be cleared once the new date is saved
119 */
120 dev_warn(dev,
121 "oscillator stop detected, date/time is not reliable\n");
122 return -EINVAL;
123 }
124
125 dev_dbg(dev,
126 "%s: raw data is cr3=%02x, sec=%02x, min=%02x, hr=%02x, "
127 "mday=%02x, wday=%02x, mon=%02x, year=%02x\n",
128 __func__, buf[PCF2127_REG_CTRL3], buf[PCF2127_REG_SC],
129 buf[PCF2127_REG_MN], buf[PCF2127_REG_HR],
130 buf[PCF2127_REG_DM], buf[PCF2127_REG_DW],
131 buf[PCF2127_REG_MO], buf[PCF2127_REG_YR]);
132
133 tm->tm_sec = bcd2bin(buf[PCF2127_REG_SC] & 0x7F);
134 tm->tm_min = bcd2bin(buf[PCF2127_REG_MN] & 0x7F);
135 tm->tm_hour = bcd2bin(buf[PCF2127_REG_HR] & 0x3F); /* rtc hr 0-23 */
136 tm->tm_mday = bcd2bin(buf[PCF2127_REG_DM] & 0x3F);
137 tm->tm_wday = buf[PCF2127_REG_DW] & 0x07;
138 tm->tm_mon = bcd2bin(buf[PCF2127_REG_MO] & 0x1F) - 1; /* rtc mn 1-12 */
139 tm->tm_year = bcd2bin(buf[PCF2127_REG_YR]);
140 if (tm->tm_year < 70)
141 tm->tm_year += 100; /* assume we are in 1970...2069 */
142
143 dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
144 "mday=%d, mon=%d, year=%d, wday=%d\n",
145 __func__,
146 tm->tm_sec, tm->tm_min, tm->tm_hour,
147 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
148
149 return 0;
150 }
151
pcf2127_rtc_set_time(struct device * dev,struct rtc_time * tm)152 static int pcf2127_rtc_set_time(struct device *dev, struct rtc_time *tm)
153 {
154 struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
155 unsigned char buf[7];
156 int i = 0, err;
157
158 dev_dbg(dev, "%s: secs=%d, mins=%d, hours=%d, "
159 "mday=%d, mon=%d, year=%d, wday=%d\n",
160 __func__,
161 tm->tm_sec, tm->tm_min, tm->tm_hour,
162 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
163
164 /* hours, minutes and seconds */
165 buf[i++] = bin2bcd(tm->tm_sec); /* this will also clear OSF flag */
166 buf[i++] = bin2bcd(tm->tm_min);
167 buf[i++] = bin2bcd(tm->tm_hour);
168 buf[i++] = bin2bcd(tm->tm_mday);
169 buf[i++] = tm->tm_wday & 0x07;
170
171 /* month, 1 - 12 */
172 buf[i++] = bin2bcd(tm->tm_mon + 1);
173
174 /* year */
175 buf[i++] = bin2bcd(tm->tm_year % 100);
176
177 /* write register's data */
178 err = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_SC, buf, i);
179 if (err) {
180 dev_err(dev,
181 "%s: err=%d", __func__, err);
182 return err;
183 }
184
185 return 0;
186 }
187
188 #ifdef CONFIG_RTC_INTF_DEV
pcf2127_rtc_ioctl(struct device * dev,unsigned int cmd,unsigned long arg)189 static int pcf2127_rtc_ioctl(struct device *dev,
190 unsigned int cmd, unsigned long arg)
191 {
192 struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
193 int touser;
194 int ret;
195
196 switch (cmd) {
197 case RTC_VL_READ:
198 ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL3, &touser);
199 if (ret)
200 return ret;
201
202 touser = touser & PCF2127_BIT_CTRL3_BLF ? 1 : 0;
203
204 if (copy_to_user((void __user *)arg, &touser, sizeof(int)))
205 return -EFAULT;
206 return 0;
207 default:
208 return -ENOIOCTLCMD;
209 }
210 }
211 #else
212 #define pcf2127_rtc_ioctl NULL
213 #endif
214
215 static const struct rtc_class_ops pcf2127_rtc_ops = {
216 .ioctl = pcf2127_rtc_ioctl,
217 .read_time = pcf2127_rtc_read_time,
218 .set_time = pcf2127_rtc_set_time,
219 };
220
pcf2127_nvmem_read(void * priv,unsigned int offset,void * val,size_t bytes)221 static int pcf2127_nvmem_read(void *priv, unsigned int offset,
222 void *val, size_t bytes)
223 {
224 struct pcf2127 *pcf2127 = priv;
225 int ret;
226 unsigned char offsetbuf[] = { offset >> 8, offset };
227
228 ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_ADDR_MSB,
229 offsetbuf, 2);
230 if (ret)
231 return ret;
232
233 return regmap_bulk_read(pcf2127->regmap, PCF2127_REG_RAM_RD_CMD,
234 val, bytes);
235 }
236
pcf2127_nvmem_write(void * priv,unsigned int offset,void * val,size_t bytes)237 static int pcf2127_nvmem_write(void *priv, unsigned int offset,
238 void *val, size_t bytes)
239 {
240 struct pcf2127 *pcf2127 = priv;
241 int ret;
242 unsigned char offsetbuf[] = { offset >> 8, offset };
243
244 ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_ADDR_MSB,
245 offsetbuf, 2);
246 if (ret)
247 return ret;
248
249 return regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_WRT_CMD,
250 val, bytes);
251 }
252
253 /* watchdog driver */
254
pcf2127_wdt_ping(struct watchdog_device * wdd)255 static int pcf2127_wdt_ping(struct watchdog_device *wdd)
256 {
257 struct pcf2127 *pcf2127 = watchdog_get_drvdata(wdd);
258
259 return regmap_write(pcf2127->regmap, PCF2127_REG_WD_VAL, wdd->timeout);
260 }
261
262 /*
263 * Restart watchdog timer if feature is active.
264 *
265 * Note: Reading CTRL2 register causes watchdog to stop which is unfortunate,
266 * since register also contain control/status flags for other features.
267 * Always call this function after reading CTRL2 register.
268 */
pcf2127_wdt_active_ping(struct watchdog_device * wdd)269 static int pcf2127_wdt_active_ping(struct watchdog_device *wdd)
270 {
271 int ret = 0;
272
273 if (watchdog_active(wdd)) {
274 ret = pcf2127_wdt_ping(wdd);
275 if (ret)
276 dev_err(wdd->parent,
277 "%s: watchdog restart failed, ret=%d\n",
278 __func__, ret);
279 }
280
281 return ret;
282 }
283
pcf2127_wdt_start(struct watchdog_device * wdd)284 static int pcf2127_wdt_start(struct watchdog_device *wdd)
285 {
286 return pcf2127_wdt_ping(wdd);
287 }
288
pcf2127_wdt_stop(struct watchdog_device * wdd)289 static int pcf2127_wdt_stop(struct watchdog_device *wdd)
290 {
291 struct pcf2127 *pcf2127 = watchdog_get_drvdata(wdd);
292
293 return regmap_write(pcf2127->regmap, PCF2127_REG_WD_VAL,
294 PCF2127_WD_VAL_STOP);
295 }
296
pcf2127_wdt_set_timeout(struct watchdog_device * wdd,unsigned int new_timeout)297 static int pcf2127_wdt_set_timeout(struct watchdog_device *wdd,
298 unsigned int new_timeout)
299 {
300 dev_dbg(wdd->parent, "new watchdog timeout: %is (old: %is)\n",
301 new_timeout, wdd->timeout);
302
303 wdd->timeout = new_timeout;
304
305 return pcf2127_wdt_active_ping(wdd);
306 }
307
308 static const struct watchdog_info pcf2127_wdt_info = {
309 .identity = "NXP PCF2127/PCF2129 Watchdog",
310 .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT,
311 };
312
313 static const struct watchdog_ops pcf2127_watchdog_ops = {
314 .owner = THIS_MODULE,
315 .start = pcf2127_wdt_start,
316 .stop = pcf2127_wdt_stop,
317 .ping = pcf2127_wdt_ping,
318 .set_timeout = pcf2127_wdt_set_timeout,
319 };
320
321 /* sysfs interface */
322
timestamp0_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)323 static ssize_t timestamp0_store(struct device *dev,
324 struct device_attribute *attr,
325 const char *buf, size_t count)
326 {
327 struct pcf2127 *pcf2127 = dev_get_drvdata(dev->parent);
328 int ret;
329
330 ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL1,
331 PCF2127_BIT_CTRL1_TSF1, 0);
332 if (ret) {
333 dev_err(dev, "%s: update ctrl1 ret=%d\n", __func__, ret);
334 return ret;
335 }
336
337 ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL2,
338 PCF2127_BIT_CTRL2_TSF2, 0);
339 if (ret) {
340 dev_err(dev, "%s: update ctrl2 ret=%d\n", __func__, ret);
341 return ret;
342 }
343
344 ret = pcf2127_wdt_active_ping(&pcf2127->wdd);
345 if (ret)
346 return ret;
347
348 return count;
349 };
350
timestamp0_show(struct device * dev,struct device_attribute * attr,char * buf)351 static ssize_t timestamp0_show(struct device *dev,
352 struct device_attribute *attr, char *buf)
353 {
354 struct pcf2127 *pcf2127 = dev_get_drvdata(dev->parent);
355 struct rtc_time tm;
356 int ret;
357 unsigned char data[25];
358
359 ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_CTRL1, data,
360 sizeof(data));
361 if (ret) {
362 dev_err(dev, "%s: read error ret=%d\n", __func__, ret);
363 return ret;
364 }
365
366 dev_dbg(dev,
367 "%s: raw data is cr1=%02x, cr2=%02x, cr3=%02x, ts_sc=%02x, "
368 "ts_mn=%02x, ts_hr=%02x, ts_dm=%02x, ts_mo=%02x, ts_yr=%02x\n",
369 __func__, data[PCF2127_REG_CTRL1], data[PCF2127_REG_CTRL2],
370 data[PCF2127_REG_CTRL3], data[PCF2127_REG_TS_SC],
371 data[PCF2127_REG_TS_MN], data[PCF2127_REG_TS_HR],
372 data[PCF2127_REG_TS_DM], data[PCF2127_REG_TS_MO],
373 data[PCF2127_REG_TS_YR]);
374
375 ret = pcf2127_wdt_active_ping(&pcf2127->wdd);
376 if (ret)
377 return ret;
378
379 if (!(data[PCF2127_REG_CTRL1] & PCF2127_BIT_CTRL1_TSF1) &&
380 !(data[PCF2127_REG_CTRL2] & PCF2127_BIT_CTRL2_TSF2))
381 return 0;
382
383 tm.tm_sec = bcd2bin(data[PCF2127_REG_TS_SC] & 0x7F);
384 tm.tm_min = bcd2bin(data[PCF2127_REG_TS_MN] & 0x7F);
385 tm.tm_hour = bcd2bin(data[PCF2127_REG_TS_HR] & 0x3F);
386 tm.tm_mday = bcd2bin(data[PCF2127_REG_TS_DM] & 0x3F);
387 /* TS_MO register (month) value range: 1-12 */
388 tm.tm_mon = bcd2bin(data[PCF2127_REG_TS_MO] & 0x1F) - 1;
389 tm.tm_year = bcd2bin(data[PCF2127_REG_TS_YR]);
390 if (tm.tm_year < 70)
391 tm.tm_year += 100; /* assume we are in 1970...2069 */
392
393 ret = rtc_valid_tm(&tm);
394 if (ret)
395 return ret;
396
397 return sprintf(buf, "%llu\n",
398 (unsigned long long)rtc_tm_to_time64(&tm));
399 };
400
401 static DEVICE_ATTR_RW(timestamp0);
402
403 static struct attribute *pcf2127_attrs[] = {
404 &dev_attr_timestamp0.attr,
405 NULL
406 };
407
408 static const struct attribute_group pcf2127_attr_group = {
409 .attrs = pcf2127_attrs,
410 };
411
pcf2127_probe(struct device * dev,struct regmap * regmap,const char * name,bool has_nvmem)412 static int pcf2127_probe(struct device *dev, struct regmap *regmap,
413 const char *name, bool has_nvmem)
414 {
415 struct pcf2127 *pcf2127;
416 int ret = 0;
417
418 dev_dbg(dev, "%s\n", __func__);
419
420 pcf2127 = devm_kzalloc(dev, sizeof(*pcf2127), GFP_KERNEL);
421 if (!pcf2127)
422 return -ENOMEM;
423
424 pcf2127->regmap = regmap;
425
426 dev_set_drvdata(dev, pcf2127);
427
428 pcf2127->rtc = devm_rtc_allocate_device(dev);
429 if (IS_ERR(pcf2127->rtc))
430 return PTR_ERR(pcf2127->rtc);
431
432 pcf2127->rtc->ops = &pcf2127_rtc_ops;
433
434 pcf2127->wdd.parent = dev;
435 pcf2127->wdd.info = &pcf2127_wdt_info;
436 pcf2127->wdd.ops = &pcf2127_watchdog_ops;
437 pcf2127->wdd.min_timeout = PCF2127_WD_VAL_MIN;
438 pcf2127->wdd.max_timeout = PCF2127_WD_VAL_MAX;
439 pcf2127->wdd.timeout = PCF2127_WD_VAL_DEFAULT;
440 pcf2127->wdd.min_hw_heartbeat_ms = 500;
441
442 watchdog_set_drvdata(&pcf2127->wdd, pcf2127);
443
444 if (has_nvmem) {
445 struct nvmem_config nvmem_cfg = {
446 .priv = pcf2127,
447 .reg_read = pcf2127_nvmem_read,
448 .reg_write = pcf2127_nvmem_write,
449 .size = 512,
450 };
451
452 ret = rtc_nvmem_register(pcf2127->rtc, &nvmem_cfg);
453 }
454
455 /*
456 * Watchdog timer enabled and reset pin /RST activated when timed out.
457 * Select 1Hz clock source for watchdog timer.
458 * Timer is not started until WD_VAL is loaded with a valid value.
459 * Note: Countdown timer disabled and not available.
460 */
461 ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_WD_CTL,
462 PCF2127_BIT_WD_CTL_CD1 |
463 PCF2127_BIT_WD_CTL_CD0 |
464 PCF2127_BIT_WD_CTL_TF1 |
465 PCF2127_BIT_WD_CTL_TF0,
466 PCF2127_BIT_WD_CTL_CD1 |
467 PCF2127_BIT_WD_CTL_CD0 |
468 PCF2127_BIT_WD_CTL_TF1);
469 if (ret) {
470 dev_err(dev, "%s: watchdog config (wd_ctl) failed\n", __func__);
471 return ret;
472 }
473
474 #ifdef CONFIG_WATCHDOG
475 ret = devm_watchdog_register_device(dev, &pcf2127->wdd);
476 if (ret)
477 return ret;
478 #endif /* CONFIG_WATCHDOG */
479
480 /*
481 * Disable battery low/switch-over timestamp and interrupts.
482 * Clear battery interrupt flags which can block new trigger events.
483 * Note: This is the default chip behaviour but added to ensure
484 * correct tamper timestamp and interrupt function.
485 */
486 ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL3,
487 PCF2127_BIT_CTRL3_BTSE |
488 PCF2127_BIT_CTRL3_BF |
489 PCF2127_BIT_CTRL3_BIE |
490 PCF2127_BIT_CTRL3_BLIE, 0);
491 if (ret) {
492 dev_err(dev, "%s: interrupt config (ctrl3) failed\n",
493 __func__);
494 return ret;
495 }
496
497 /*
498 * Enable timestamp function and store timestamp of first trigger
499 * event until TSF1 and TFS2 interrupt flags are cleared.
500 */
501 ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_TS_CTRL,
502 PCF2127_BIT_TS_CTRL_TSOFF |
503 PCF2127_BIT_TS_CTRL_TSM,
504 PCF2127_BIT_TS_CTRL_TSM);
505 if (ret) {
506 dev_err(dev, "%s: tamper detection config (ts_ctrl) failed\n",
507 __func__);
508 return ret;
509 }
510
511 /*
512 * Enable interrupt generation when TSF1 or TSF2 timestamp flags
513 * are set. Interrupt signal is an open-drain output and can be
514 * left floating if unused.
515 */
516 ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL2,
517 PCF2127_BIT_CTRL2_TSIE,
518 PCF2127_BIT_CTRL2_TSIE);
519 if (ret) {
520 dev_err(dev, "%s: tamper detection config (ctrl2) failed\n",
521 __func__);
522 return ret;
523 }
524
525 ret = rtc_add_group(pcf2127->rtc, &pcf2127_attr_group);
526 if (ret) {
527 dev_err(dev, "%s: tamper sysfs registering failed\n",
528 __func__);
529 return ret;
530 }
531
532 return rtc_register_device(pcf2127->rtc);
533 }
534
535 #ifdef CONFIG_OF
536 static const struct of_device_id pcf2127_of_match[] = {
537 { .compatible = "nxp,pcf2127" },
538 { .compatible = "nxp,pcf2129" },
539 {}
540 };
541 MODULE_DEVICE_TABLE(of, pcf2127_of_match);
542 #endif
543
544 #if IS_ENABLED(CONFIG_I2C)
545
pcf2127_i2c_write(void * context,const void * data,size_t count)546 static int pcf2127_i2c_write(void *context, const void *data, size_t count)
547 {
548 struct device *dev = context;
549 struct i2c_client *client = to_i2c_client(dev);
550 int ret;
551
552 ret = i2c_master_send(client, data, count);
553 if (ret != count)
554 return ret < 0 ? ret : -EIO;
555
556 return 0;
557 }
558
pcf2127_i2c_gather_write(void * context,const void * reg,size_t reg_size,const void * val,size_t val_size)559 static int pcf2127_i2c_gather_write(void *context,
560 const void *reg, size_t reg_size,
561 const void *val, size_t val_size)
562 {
563 struct device *dev = context;
564 struct i2c_client *client = to_i2c_client(dev);
565 int ret;
566 void *buf;
567
568 if (WARN_ON(reg_size != 1))
569 return -EINVAL;
570
571 buf = kmalloc(val_size + 1, GFP_KERNEL);
572 if (!buf)
573 return -ENOMEM;
574
575 memcpy(buf, reg, 1);
576 memcpy(buf + 1, val, val_size);
577
578 ret = i2c_master_send(client, buf, val_size + 1);
579
580 kfree(buf);
581
582 if (ret != val_size + 1)
583 return ret < 0 ? ret : -EIO;
584
585 return 0;
586 }
587
pcf2127_i2c_read(void * context,const void * reg,size_t reg_size,void * val,size_t val_size)588 static int pcf2127_i2c_read(void *context, const void *reg, size_t reg_size,
589 void *val, size_t val_size)
590 {
591 struct device *dev = context;
592 struct i2c_client *client = to_i2c_client(dev);
593 int ret;
594
595 if (WARN_ON(reg_size != 1))
596 return -EINVAL;
597
598 ret = i2c_master_send(client, reg, 1);
599 if (ret != 1)
600 return ret < 0 ? ret : -EIO;
601
602 ret = i2c_master_recv(client, val, val_size);
603 if (ret != val_size)
604 return ret < 0 ? ret : -EIO;
605
606 return 0;
607 }
608
609 /*
610 * The reason we need this custom regmap_bus instead of using regmap_init_i2c()
611 * is that the STOP condition is required between set register address and
612 * read register data when reading from registers.
613 */
614 static const struct regmap_bus pcf2127_i2c_regmap = {
615 .write = pcf2127_i2c_write,
616 .gather_write = pcf2127_i2c_gather_write,
617 .read = pcf2127_i2c_read,
618 };
619
620 static struct i2c_driver pcf2127_i2c_driver;
621
pcf2127_i2c_probe(struct i2c_client * client,const struct i2c_device_id * id)622 static int pcf2127_i2c_probe(struct i2c_client *client,
623 const struct i2c_device_id *id)
624 {
625 struct regmap *regmap;
626 static const struct regmap_config config = {
627 .reg_bits = 8,
628 .val_bits = 8,
629 };
630
631 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
632 return -ENODEV;
633
634 regmap = devm_regmap_init(&client->dev, &pcf2127_i2c_regmap,
635 &client->dev, &config);
636 if (IS_ERR(regmap)) {
637 dev_err(&client->dev, "%s: regmap allocation failed: %ld\n",
638 __func__, PTR_ERR(regmap));
639 return PTR_ERR(regmap);
640 }
641
642 return pcf2127_probe(&client->dev, regmap,
643 pcf2127_i2c_driver.driver.name, id->driver_data);
644 }
645
646 static const struct i2c_device_id pcf2127_i2c_id[] = {
647 { "pcf2127", 1 },
648 { "pcf2129", 0 },
649 { }
650 };
651 MODULE_DEVICE_TABLE(i2c, pcf2127_i2c_id);
652
653 static struct i2c_driver pcf2127_i2c_driver = {
654 .driver = {
655 .name = "rtc-pcf2127-i2c",
656 .of_match_table = of_match_ptr(pcf2127_of_match),
657 },
658 .probe = pcf2127_i2c_probe,
659 .id_table = pcf2127_i2c_id,
660 };
661
pcf2127_i2c_register_driver(void)662 static int pcf2127_i2c_register_driver(void)
663 {
664 return i2c_add_driver(&pcf2127_i2c_driver);
665 }
666
pcf2127_i2c_unregister_driver(void)667 static void pcf2127_i2c_unregister_driver(void)
668 {
669 i2c_del_driver(&pcf2127_i2c_driver);
670 }
671
672 #else
673
pcf2127_i2c_register_driver(void)674 static int pcf2127_i2c_register_driver(void)
675 {
676 return 0;
677 }
678
pcf2127_i2c_unregister_driver(void)679 static void pcf2127_i2c_unregister_driver(void)
680 {
681 }
682
683 #endif
684
685 #if IS_ENABLED(CONFIG_SPI_MASTER)
686
687 static struct spi_driver pcf2127_spi_driver;
688
pcf2127_spi_probe(struct spi_device * spi)689 static int pcf2127_spi_probe(struct spi_device *spi)
690 {
691 static const struct regmap_config config = {
692 .reg_bits = 8,
693 .val_bits = 8,
694 .read_flag_mask = 0xa0,
695 .write_flag_mask = 0x20,
696 };
697 struct regmap *regmap;
698
699 regmap = devm_regmap_init_spi(spi, &config);
700 if (IS_ERR(regmap)) {
701 dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n",
702 __func__, PTR_ERR(regmap));
703 return PTR_ERR(regmap);
704 }
705
706 return pcf2127_probe(&spi->dev, regmap, pcf2127_spi_driver.driver.name,
707 spi_get_device_id(spi)->driver_data);
708 }
709
710 static const struct spi_device_id pcf2127_spi_id[] = {
711 { "pcf2127", 1 },
712 { "pcf2129", 0 },
713 { }
714 };
715 MODULE_DEVICE_TABLE(spi, pcf2127_spi_id);
716
717 static struct spi_driver pcf2127_spi_driver = {
718 .driver = {
719 .name = "rtc-pcf2127-spi",
720 .of_match_table = of_match_ptr(pcf2127_of_match),
721 },
722 .probe = pcf2127_spi_probe,
723 .id_table = pcf2127_spi_id,
724 };
725
pcf2127_spi_register_driver(void)726 static int pcf2127_spi_register_driver(void)
727 {
728 return spi_register_driver(&pcf2127_spi_driver);
729 }
730
pcf2127_spi_unregister_driver(void)731 static void pcf2127_spi_unregister_driver(void)
732 {
733 spi_unregister_driver(&pcf2127_spi_driver);
734 }
735
736 #else
737
pcf2127_spi_register_driver(void)738 static int pcf2127_spi_register_driver(void)
739 {
740 return 0;
741 }
742
pcf2127_spi_unregister_driver(void)743 static void pcf2127_spi_unregister_driver(void)
744 {
745 }
746
747 #endif
748
pcf2127_init(void)749 static int __init pcf2127_init(void)
750 {
751 int ret;
752
753 ret = pcf2127_i2c_register_driver();
754 if (ret) {
755 pr_err("Failed to register pcf2127 i2c driver: %d\n", ret);
756 return ret;
757 }
758
759 ret = pcf2127_spi_register_driver();
760 if (ret) {
761 pr_err("Failed to register pcf2127 spi driver: %d\n", ret);
762 pcf2127_i2c_unregister_driver();
763 }
764
765 return ret;
766 }
module_init(pcf2127_init)767 module_init(pcf2127_init)
768
769 static void __exit pcf2127_exit(void)
770 {
771 pcf2127_spi_unregister_driver();
772 pcf2127_i2c_unregister_driver();
773 }
774 module_exit(pcf2127_exit)
775
776 MODULE_AUTHOR("Renaud Cerrato <r.cerrato@til-technologies.fr>");
777 MODULE_DESCRIPTION("NXP PCF2127/29 RTC driver");
778 MODULE_LICENSE("GPL v2");
779