1 /*
2 * Universal Flash Storage Host controller driver
3 *
4 * This code is based on drivers/scsi/ufs/ufs.h
5 * Copyright (C) 2011-2013 Samsung India Software Operations
6 *
7 * Authors:
8 * Santosh Yaraganavi <santosh.sy@samsung.com>
9 * Vinayak Holikatti <h.vinayak@samsung.com>
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version 2
14 * of the License, or (at your option) any later version.
15 * See the COPYING file in the top-level directory or visit
16 * <http://www.gnu.org/licenses/gpl-2.0.html>
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * This program is provided "AS IS" and "WITH ALL FAULTS" and
24 * without warranty of any kind. You are solely responsible for
25 * determining the appropriateness of using and distributing
26 * the program and assume all risks associated with your exercise
27 * of rights with respect to the program, including but not limited
28 * to infringement of third party rights, the risks and costs of
29 * program errors, damage to or loss of data, programs or equipment,
30 * and unavailability or interruption of operations. Under no
31 * circumstances will the contributor of this Program be liable for
32 * any damages of any kind arising from your use or distribution of
33 * this program.
34 */
35
36 #ifndef _UFS_H
37 #define _UFS_H
38
39 #include <linux/mutex.h>
40 #include <linux/types.h>
41 #include <uapi/scsi/scsi_bsg_ufs.h>
42
43 #define GENERAL_UPIU_REQUEST_SIZE (sizeof(struct utp_upiu_req))
44 #define QUERY_DESC_MAX_SIZE 255
45 #define QUERY_DESC_MIN_SIZE 2
46 #define QUERY_DESC_HDR_SIZE 2
47 #define QUERY_OSF_SIZE (GENERAL_UPIU_REQUEST_SIZE - \
48 (sizeof(struct utp_upiu_header)))
49 #define UFS_SENSE_SIZE 18
50
51 #define UPIU_HEADER_DWORD(byte3, byte2, byte1, byte0)\
52 cpu_to_be32((byte3 << 24) | (byte2 << 16) |\
53 (byte1 << 8) | (byte0))
54 /*
55 * UFS device may have standard LUs and LUN id could be from 0x00 to
56 * 0x7F. Standard LUs use "Peripheral Device Addressing Format".
57 * UFS device may also have the Well Known LUs (also referred as W-LU)
58 * which again could be from 0x00 to 0x7F. For W-LUs, device only use
59 * the "Extended Addressing Format" which means the W-LUNs would be
60 * from 0xc100 (SCSI_W_LUN_BASE) onwards.
61 * This means max. LUN number reported from UFS device could be 0xC17F.
62 */
63 #define UFS_UPIU_MAX_UNIT_NUM_ID 0x7F
64 #define UFS_MAX_LUNS (SCSI_W_LUN_BASE + UFS_UPIU_MAX_UNIT_NUM_ID)
65 #define UFS_UPIU_WLUN_ID (1 << 7)
66 #define UFS_UPIU_MAX_GENERAL_LUN 8
67
68 /* WriteBooster buffer is available only for the logical unit from 0 to 7 */
69 #define UFS_UPIU_MAX_WB_LUN_ID 8
70
71 /* Well known logical unit id in LUN field of UPIU */
72 enum {
73 UFS_UPIU_REPORT_LUNS_WLUN = 0x81,
74 UFS_UPIU_UFS_DEVICE_WLUN = 0xD0,
75 UFS_UPIU_BOOT_WLUN = 0xB0,
76 UFS_UPIU_RPMB_WLUN = 0xC4,
77 };
78
79 /*
80 * UFS Protocol Information Unit related definitions
81 */
82
83 /* Task management functions */
84 enum {
85 UFS_ABORT_TASK = 0x01,
86 UFS_ABORT_TASK_SET = 0x02,
87 UFS_CLEAR_TASK_SET = 0x04,
88 UFS_LOGICAL_RESET = 0x08,
89 UFS_QUERY_TASK = 0x80,
90 UFS_QUERY_TASK_SET = 0x81,
91 };
92
93 /* UTP UPIU Transaction Codes Initiator to Target */
94 enum {
95 UPIU_TRANSACTION_NOP_OUT = 0x00,
96 UPIU_TRANSACTION_COMMAND = 0x01,
97 UPIU_TRANSACTION_DATA_OUT = 0x02,
98 UPIU_TRANSACTION_TASK_REQ = 0x04,
99 UPIU_TRANSACTION_QUERY_REQ = 0x16,
100 };
101
102 /* UTP UPIU Transaction Codes Target to Initiator */
103 enum {
104 UPIU_TRANSACTION_NOP_IN = 0x20,
105 UPIU_TRANSACTION_RESPONSE = 0x21,
106 UPIU_TRANSACTION_DATA_IN = 0x22,
107 UPIU_TRANSACTION_TASK_RSP = 0x24,
108 UPIU_TRANSACTION_READY_XFER = 0x31,
109 UPIU_TRANSACTION_QUERY_RSP = 0x36,
110 UPIU_TRANSACTION_REJECT_UPIU = 0x3F,
111 };
112
113 /* UPIU Read/Write flags */
114 enum {
115 UPIU_CMD_FLAGS_NONE = 0x00,
116 UPIU_CMD_FLAGS_WRITE = 0x20,
117 UPIU_CMD_FLAGS_READ = 0x40,
118 };
119
120 /* UPIU Task Attributes */
121 enum {
122 UPIU_TASK_ATTR_SIMPLE = 0x00,
123 UPIU_TASK_ATTR_ORDERED = 0x01,
124 UPIU_TASK_ATTR_HEADQ = 0x02,
125 UPIU_TASK_ATTR_ACA = 0x03,
126 };
127
128 /* UPIU Query request function */
129 enum {
130 UPIU_QUERY_FUNC_STANDARD_READ_REQUEST = 0x01,
131 UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST = 0x81,
132 };
133
134 /* Flag idn for Query Requests*/
135 enum flag_idn {
136 QUERY_FLAG_IDN_FDEVICEINIT = 0x01,
137 QUERY_FLAG_IDN_PERMANENT_WPE = 0x02,
138 QUERY_FLAG_IDN_PWR_ON_WPE = 0x03,
139 QUERY_FLAG_IDN_BKOPS_EN = 0x04,
140 QUERY_FLAG_IDN_LIFE_SPAN_MODE_ENABLE = 0x05,
141 QUERY_FLAG_IDN_PURGE_ENABLE = 0x06,
142 QUERY_FLAG_IDN_RESERVED2 = 0x07,
143 QUERY_FLAG_IDN_FPHYRESOURCEREMOVAL = 0x08,
144 QUERY_FLAG_IDN_BUSY_RTC = 0x09,
145 QUERY_FLAG_IDN_RESERVED3 = 0x0A,
146 QUERY_FLAG_IDN_PERMANENTLY_DISABLE_FW_UPDATE = 0x0B,
147 QUERY_FLAG_IDN_WB_EN = 0x0E,
148 QUERY_FLAG_IDN_WB_BUFF_FLUSH_EN = 0x0F,
149 QUERY_FLAG_IDN_WB_BUFF_FLUSH_DURING_HIBERN8 = 0x10,
150 };
151
152 /* Attribute idn for Query requests */
153 enum attr_idn {
154 QUERY_ATTR_IDN_BOOT_LU_EN = 0x00,
155 QUERY_ATTR_IDN_RESERVED = 0x01,
156 QUERY_ATTR_IDN_POWER_MODE = 0x02,
157 QUERY_ATTR_IDN_ACTIVE_ICC_LVL = 0x03,
158 QUERY_ATTR_IDN_OOO_DATA_EN = 0x04,
159 QUERY_ATTR_IDN_BKOPS_STATUS = 0x05,
160 QUERY_ATTR_IDN_PURGE_STATUS = 0x06,
161 QUERY_ATTR_IDN_MAX_DATA_IN = 0x07,
162 QUERY_ATTR_IDN_MAX_DATA_OUT = 0x08,
163 QUERY_ATTR_IDN_DYN_CAP_NEEDED = 0x09,
164 QUERY_ATTR_IDN_REF_CLK_FREQ = 0x0A,
165 QUERY_ATTR_IDN_CONF_DESC_LOCK = 0x0B,
166 QUERY_ATTR_IDN_MAX_NUM_OF_RTT = 0x0C,
167 QUERY_ATTR_IDN_EE_CONTROL = 0x0D,
168 QUERY_ATTR_IDN_EE_STATUS = 0x0E,
169 QUERY_ATTR_IDN_SECONDS_PASSED = 0x0F,
170 QUERY_ATTR_IDN_CNTX_CONF = 0x10,
171 QUERY_ATTR_IDN_CORR_PRG_BLK_NUM = 0x11,
172 QUERY_ATTR_IDN_RESERVED2 = 0x12,
173 QUERY_ATTR_IDN_RESERVED3 = 0x13,
174 QUERY_ATTR_IDN_FFU_STATUS = 0x14,
175 QUERY_ATTR_IDN_PSA_STATE = 0x15,
176 QUERY_ATTR_IDN_PSA_DATA_SIZE = 0x16,
177 QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME = 0x17,
178 QUERY_ATTR_IDN_WB_FLUSH_STATUS = 0x1C,
179 QUERY_ATTR_IDN_AVAIL_WB_BUFF_SIZE = 0x1D,
180 QUERY_ATTR_IDN_WB_BUFF_LIFE_TIME_EST = 0x1E,
181 QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE = 0x1F,
182 };
183
184 /* Descriptor idn for Query requests */
185 enum desc_idn {
186 QUERY_DESC_IDN_DEVICE = 0x0,
187 QUERY_DESC_IDN_CONFIGURATION = 0x1,
188 QUERY_DESC_IDN_UNIT = 0x2,
189 QUERY_DESC_IDN_RFU_0 = 0x3,
190 QUERY_DESC_IDN_INTERCONNECT = 0x4,
191 QUERY_DESC_IDN_STRING = 0x5,
192 QUERY_DESC_IDN_RFU_1 = 0x6,
193 QUERY_DESC_IDN_GEOMETRY = 0x7,
194 QUERY_DESC_IDN_POWER = 0x8,
195 QUERY_DESC_IDN_HEALTH = 0x9,
196 QUERY_DESC_IDN_MAX,
197 };
198
199 enum desc_header_offset {
200 QUERY_DESC_LENGTH_OFFSET = 0x00,
201 QUERY_DESC_DESC_TYPE_OFFSET = 0x01,
202 };
203
204 enum ufs_desc_def_size {
205 QUERY_DESC_DEVICE_DEF_SIZE = 0x59,
206 QUERY_DESC_CONFIGURATION_DEF_SIZE = 0x90,
207 QUERY_DESC_UNIT_DEF_SIZE = 0x2D,
208 QUERY_DESC_INTERCONNECT_DEF_SIZE = 0x06,
209 QUERY_DESC_GEOMETRY_DEF_SIZE = 0x48,
210 QUERY_DESC_POWER_DEF_SIZE = 0x62,
211 QUERY_DESC_HEALTH_DEF_SIZE = 0x25,
212 };
213
214 /* Unit descriptor parameters offsets in bytes*/
215 enum unit_desc_param {
216 UNIT_DESC_PARAM_LEN = 0x0,
217 UNIT_DESC_PARAM_TYPE = 0x1,
218 UNIT_DESC_PARAM_UNIT_INDEX = 0x2,
219 UNIT_DESC_PARAM_LU_ENABLE = 0x3,
220 UNIT_DESC_PARAM_BOOT_LUN_ID = 0x4,
221 UNIT_DESC_PARAM_LU_WR_PROTECT = 0x5,
222 UNIT_DESC_PARAM_LU_Q_DEPTH = 0x6,
223 UNIT_DESC_PARAM_PSA_SENSITIVE = 0x7,
224 UNIT_DESC_PARAM_MEM_TYPE = 0x8,
225 UNIT_DESC_PARAM_DATA_RELIABILITY = 0x9,
226 UNIT_DESC_PARAM_LOGICAL_BLK_SIZE = 0xA,
227 UNIT_DESC_PARAM_LOGICAL_BLK_COUNT = 0xB,
228 UNIT_DESC_PARAM_ERASE_BLK_SIZE = 0x13,
229 UNIT_DESC_PARAM_PROVISIONING_TYPE = 0x17,
230 UNIT_DESC_PARAM_PHY_MEM_RSRC_CNT = 0x18,
231 UNIT_DESC_PARAM_CTX_CAPABILITIES = 0x20,
232 UNIT_DESC_PARAM_LARGE_UNIT_SIZE_M1 = 0x22,
233 UNIT_DESC_PARAM_WB_BUF_ALLOC_UNITS = 0x29,
234 };
235
236 /* Device descriptor parameters offsets in bytes*/
237 enum device_desc_param {
238 DEVICE_DESC_PARAM_LEN = 0x0,
239 DEVICE_DESC_PARAM_TYPE = 0x1,
240 DEVICE_DESC_PARAM_DEVICE_TYPE = 0x2,
241 DEVICE_DESC_PARAM_DEVICE_CLASS = 0x3,
242 DEVICE_DESC_PARAM_DEVICE_SUB_CLASS = 0x4,
243 DEVICE_DESC_PARAM_PRTCL = 0x5,
244 DEVICE_DESC_PARAM_NUM_LU = 0x6,
245 DEVICE_DESC_PARAM_NUM_WLU = 0x7,
246 DEVICE_DESC_PARAM_BOOT_ENBL = 0x8,
247 DEVICE_DESC_PARAM_DESC_ACCSS_ENBL = 0x9,
248 DEVICE_DESC_PARAM_INIT_PWR_MODE = 0xA,
249 DEVICE_DESC_PARAM_HIGH_PR_LUN = 0xB,
250 DEVICE_DESC_PARAM_SEC_RMV_TYPE = 0xC,
251 DEVICE_DESC_PARAM_SEC_LU = 0xD,
252 DEVICE_DESC_PARAM_BKOP_TERM_LT = 0xE,
253 DEVICE_DESC_PARAM_ACTVE_ICC_LVL = 0xF,
254 DEVICE_DESC_PARAM_SPEC_VER = 0x10,
255 DEVICE_DESC_PARAM_MANF_DATE = 0x12,
256 DEVICE_DESC_PARAM_MANF_NAME = 0x14,
257 DEVICE_DESC_PARAM_PRDCT_NAME = 0x15,
258 DEVICE_DESC_PARAM_SN = 0x16,
259 DEVICE_DESC_PARAM_OEM_ID = 0x17,
260 DEVICE_DESC_PARAM_MANF_ID = 0x18,
261 DEVICE_DESC_PARAM_UD_OFFSET = 0x1A,
262 DEVICE_DESC_PARAM_UD_LEN = 0x1B,
263 DEVICE_DESC_PARAM_RTT_CAP = 0x1C,
264 DEVICE_DESC_PARAM_FRQ_RTC = 0x1D,
265 DEVICE_DESC_PARAM_UFS_FEAT = 0x1F,
266 DEVICE_DESC_PARAM_FFU_TMT = 0x20,
267 DEVICE_DESC_PARAM_Q_DPTH = 0x21,
268 DEVICE_DESC_PARAM_DEV_VER = 0x22,
269 DEVICE_DESC_PARAM_NUM_SEC_WPA = 0x24,
270 DEVICE_DESC_PARAM_PSA_MAX_DATA = 0x25,
271 DEVICE_DESC_PARAM_PSA_TMT = 0x29,
272 DEVICE_DESC_PARAM_PRDCT_REV = 0x2A,
273 DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP = 0x4F,
274 DEVICE_DESC_PARAM_WB_PRESRV_USRSPC_EN = 0x53,
275 DEVICE_DESC_PARAM_WB_TYPE = 0x54,
276 DEVICE_DESC_PARAM_WB_SHARED_ALLOC_UNITS = 0x55,
277 };
278
279 /* Interconnect descriptor parameters offsets in bytes*/
280 enum interconnect_desc_param {
281 INTERCONNECT_DESC_PARAM_LEN = 0x0,
282 INTERCONNECT_DESC_PARAM_TYPE = 0x1,
283 INTERCONNECT_DESC_PARAM_UNIPRO_VER = 0x2,
284 INTERCONNECT_DESC_PARAM_MPHY_VER = 0x4,
285 };
286
287 /* Geometry descriptor parameters offsets in bytes*/
288 enum geometry_desc_param {
289 GEOMETRY_DESC_PARAM_LEN = 0x0,
290 GEOMETRY_DESC_PARAM_TYPE = 0x1,
291 GEOMETRY_DESC_PARAM_DEV_CAP = 0x4,
292 GEOMETRY_DESC_PARAM_MAX_NUM_LUN = 0xC,
293 GEOMETRY_DESC_PARAM_SEG_SIZE = 0xD,
294 GEOMETRY_DESC_PARAM_ALLOC_UNIT_SIZE = 0x11,
295 GEOMETRY_DESC_PARAM_MIN_BLK_SIZE = 0x12,
296 GEOMETRY_DESC_PARAM_OPT_RD_BLK_SIZE = 0x13,
297 GEOMETRY_DESC_PARAM_OPT_WR_BLK_SIZE = 0x14,
298 GEOMETRY_DESC_PARAM_MAX_IN_BUF_SIZE = 0x15,
299 GEOMETRY_DESC_PARAM_MAX_OUT_BUF_SIZE = 0x16,
300 GEOMETRY_DESC_PARAM_RPMB_RW_SIZE = 0x17,
301 GEOMETRY_DESC_PARAM_DYN_CAP_RSRC_PLC = 0x18,
302 GEOMETRY_DESC_PARAM_DATA_ORDER = 0x19,
303 GEOMETRY_DESC_PARAM_MAX_NUM_CTX = 0x1A,
304 GEOMETRY_DESC_PARAM_TAG_UNIT_SIZE = 0x1B,
305 GEOMETRY_DESC_PARAM_TAG_RSRC_SIZE = 0x1C,
306 GEOMETRY_DESC_PARAM_SEC_RM_TYPES = 0x1D,
307 GEOMETRY_DESC_PARAM_MEM_TYPES = 0x1E,
308 GEOMETRY_DESC_PARAM_SCM_MAX_NUM_UNITS = 0x20,
309 GEOMETRY_DESC_PARAM_SCM_CAP_ADJ_FCTR = 0x24,
310 GEOMETRY_DESC_PARAM_NPM_MAX_NUM_UNITS = 0x26,
311 GEOMETRY_DESC_PARAM_NPM_CAP_ADJ_FCTR = 0x2A,
312 GEOMETRY_DESC_PARAM_ENM1_MAX_NUM_UNITS = 0x2C,
313 GEOMETRY_DESC_PARAM_ENM1_CAP_ADJ_FCTR = 0x30,
314 GEOMETRY_DESC_PARAM_ENM2_MAX_NUM_UNITS = 0x32,
315 GEOMETRY_DESC_PARAM_ENM2_CAP_ADJ_FCTR = 0x36,
316 GEOMETRY_DESC_PARAM_ENM3_MAX_NUM_UNITS = 0x38,
317 GEOMETRY_DESC_PARAM_ENM3_CAP_ADJ_FCTR = 0x3C,
318 GEOMETRY_DESC_PARAM_ENM4_MAX_NUM_UNITS = 0x3E,
319 GEOMETRY_DESC_PARAM_ENM4_CAP_ADJ_FCTR = 0x42,
320 GEOMETRY_DESC_PARAM_OPT_LOG_BLK_SIZE = 0x44,
321 GEOMETRY_DESC_PARAM_WB_MAX_ALLOC_UNITS = 0x4F,
322 GEOMETRY_DESC_PARAM_WB_MAX_WB_LUNS = 0x53,
323 GEOMETRY_DESC_PARAM_WB_BUFF_CAP_ADJ = 0x54,
324 GEOMETRY_DESC_PARAM_WB_SUP_RED_TYPE = 0x55,
325 GEOMETRY_DESC_PARAM_WB_SUP_WB_TYPE = 0x56,
326 };
327
328 /* Health descriptor parameters offsets in bytes*/
329 enum health_desc_param {
330 HEALTH_DESC_PARAM_LEN = 0x0,
331 HEALTH_DESC_PARAM_TYPE = 0x1,
332 HEALTH_DESC_PARAM_EOL_INFO = 0x2,
333 HEALTH_DESC_PARAM_LIFE_TIME_EST_A = 0x3,
334 HEALTH_DESC_PARAM_LIFE_TIME_EST_B = 0x4,
335 };
336
337 /* WriteBooster buffer mode */
338 enum {
339 WB_BUF_MODE_LU_DEDICATED = 0x0,
340 WB_BUF_MODE_SHARED = 0x1,
341 };
342
343 /*
344 * Logical Unit Write Protect
345 * 00h: LU not write protected
346 * 01h: LU write protected when fPowerOnWPEn =1
347 * 02h: LU permanently write protected when fPermanentWPEn =1
348 */
349 enum ufs_lu_wp_type {
350 UFS_LU_NO_WP = 0x00,
351 UFS_LU_POWER_ON_WP = 0x01,
352 UFS_LU_PERM_WP = 0x02,
353 };
354
355 /* bActiveICCLevel parameter current units */
356 enum {
357 UFSHCD_NANO_AMP = 0,
358 UFSHCD_MICRO_AMP = 1,
359 UFSHCD_MILI_AMP = 2,
360 UFSHCD_AMP = 3,
361 };
362
363 /* Possible values for dExtendedUFSFeaturesSupport */
364 enum {
365 UFS_DEV_WRITE_BOOSTER_SUP = BIT(8),
366 };
367
368 #define POWER_DESC_MAX_SIZE 0x62
369 #define POWER_DESC_MAX_ACTV_ICC_LVLS 16
370
371 /* Attribute bActiveICCLevel parameter bit masks definitions */
372 #define ATTR_ICC_LVL_UNIT_OFFSET 14
373 #define ATTR_ICC_LVL_UNIT_MASK (0x3 << ATTR_ICC_LVL_UNIT_OFFSET)
374 #define ATTR_ICC_LVL_VALUE_MASK 0x3FF
375
376 /* Power descriptor parameters offsets in bytes */
377 enum power_desc_param_offset {
378 PWR_DESC_LEN = 0x0,
379 PWR_DESC_TYPE = 0x1,
380 PWR_DESC_ACTIVE_LVLS_VCC_0 = 0x2,
381 PWR_DESC_ACTIVE_LVLS_VCCQ_0 = 0x22,
382 PWR_DESC_ACTIVE_LVLS_VCCQ2_0 = 0x42,
383 };
384
385 /* Exception event mask values */
386 enum {
387 MASK_EE_STATUS = 0xFFFF,
388 MASK_EE_URGENT_BKOPS = (1 << 2),
389 };
390
391 /* Background operation status */
392 enum bkops_status {
393 BKOPS_STATUS_NO_OP = 0x0,
394 BKOPS_STATUS_NON_CRITICAL = 0x1,
395 BKOPS_STATUS_PERF_IMPACT = 0x2,
396 BKOPS_STATUS_CRITICAL = 0x3,
397 BKOPS_STATUS_MAX = BKOPS_STATUS_CRITICAL,
398 };
399
400 /* UTP QUERY Transaction Specific Fields OpCode */
401 enum query_opcode {
402 UPIU_QUERY_OPCODE_NOP = 0x0,
403 UPIU_QUERY_OPCODE_READ_DESC = 0x1,
404 UPIU_QUERY_OPCODE_WRITE_DESC = 0x2,
405 UPIU_QUERY_OPCODE_READ_ATTR = 0x3,
406 UPIU_QUERY_OPCODE_WRITE_ATTR = 0x4,
407 UPIU_QUERY_OPCODE_READ_FLAG = 0x5,
408 UPIU_QUERY_OPCODE_SET_FLAG = 0x6,
409 UPIU_QUERY_OPCODE_CLEAR_FLAG = 0x7,
410 UPIU_QUERY_OPCODE_TOGGLE_FLAG = 0x8,
411 };
412
413 /* bRefClkFreq attribute values */
414 enum ufs_ref_clk_freq {
415 REF_CLK_FREQ_19_2_MHZ = 0,
416 REF_CLK_FREQ_26_MHZ = 1,
417 REF_CLK_FREQ_38_4_MHZ = 2,
418 REF_CLK_FREQ_52_MHZ = 3,
419 REF_CLK_FREQ_INVAL = -1,
420 };
421
422 struct ufs_ref_clk {
423 unsigned long freq_hz;
424 enum ufs_ref_clk_freq val;
425 };
426
427 /* Query response result code */
428 enum {
429 QUERY_RESULT_SUCCESS = 0x00,
430 QUERY_RESULT_NOT_READABLE = 0xF6,
431 QUERY_RESULT_NOT_WRITEABLE = 0xF7,
432 QUERY_RESULT_ALREADY_WRITTEN = 0xF8,
433 QUERY_RESULT_INVALID_LENGTH = 0xF9,
434 QUERY_RESULT_INVALID_VALUE = 0xFA,
435 QUERY_RESULT_INVALID_SELECTOR = 0xFB,
436 QUERY_RESULT_INVALID_INDEX = 0xFC,
437 QUERY_RESULT_INVALID_IDN = 0xFD,
438 QUERY_RESULT_INVALID_OPCODE = 0xFE,
439 QUERY_RESULT_GENERAL_FAILURE = 0xFF,
440 };
441
442 /* UTP Transfer Request Command Type (CT) */
443 enum {
444 UPIU_COMMAND_SET_TYPE_SCSI = 0x0,
445 UPIU_COMMAND_SET_TYPE_UFS = 0x1,
446 UPIU_COMMAND_SET_TYPE_QUERY = 0x2,
447 };
448
449 /* UTP Transfer Request Command Offset */
450 #define UPIU_COMMAND_TYPE_OFFSET 28
451
452 /* Offset of the response code in the UPIU header */
453 #define UPIU_RSP_CODE_OFFSET 8
454
455 enum {
456 MASK_SCSI_STATUS = 0xFF,
457 MASK_TASK_RESPONSE = 0xFF00,
458 MASK_RSP_UPIU_RESULT = 0xFFFF,
459 MASK_QUERY_DATA_SEG_LEN = 0xFFFF,
460 MASK_RSP_UPIU_DATA_SEG_LEN = 0xFFFF,
461 MASK_RSP_EXCEPTION_EVENT = 0x10000,
462 MASK_TM_SERVICE_RESP = 0xFF,
463 MASK_TM_FUNC = 0xFF,
464 };
465
466 /* Task management service response */
467 enum {
468 UPIU_TASK_MANAGEMENT_FUNC_COMPL = 0x00,
469 UPIU_TASK_MANAGEMENT_FUNC_NOT_SUPPORTED = 0x04,
470 UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED = 0x08,
471 UPIU_TASK_MANAGEMENT_FUNC_FAILED = 0x05,
472 UPIU_INCORRECT_LOGICAL_UNIT_NO = 0x09,
473 };
474
475 /* UFS device power modes */
476 enum ufs_dev_pwr_mode {
477 UFS_ACTIVE_PWR_MODE = 1,
478 UFS_SLEEP_PWR_MODE = 2,
479 UFS_POWERDOWN_PWR_MODE = 3,
480 };
481
482 #define UFS_WB_BUF_REMAIN_PERCENT(val) ((val) / 10)
483
484 /**
485 * struct utp_cmd_rsp - Response UPIU structure
486 * @residual_transfer_count: Residual transfer count DW-3
487 * @reserved: Reserved double words DW-4 to DW-7
488 * @sense_data_len: Sense data length DW-8 U16
489 * @sense_data: Sense data field DW-8 to DW-12
490 */
491 struct utp_cmd_rsp {
492 __be32 residual_transfer_count;
493 __be32 reserved[4];
494 __be16 sense_data_len;
495 u8 sense_data[UFS_SENSE_SIZE];
496 };
497
498 /**
499 * struct utp_upiu_rsp - general upiu response structure
500 * @header: UPIU header structure DW-0 to DW-2
501 * @sr: fields structure for scsi command DW-3 to DW-12
502 * @qr: fields structure for query request DW-3 to DW-7
503 */
504 struct utp_upiu_rsp {
505 struct utp_upiu_header header;
506 union {
507 struct utp_cmd_rsp sr;
508 struct utp_upiu_query qr;
509 };
510 };
511
512 /**
513 * struct ufs_query_req - parameters for building a query request
514 * @query_func: UPIU header query function
515 * @upiu_req: the query request data
516 */
517 struct ufs_query_req {
518 u8 query_func;
519 struct utp_upiu_query upiu_req;
520 };
521
522 /**
523 * struct ufs_query_resp - UPIU QUERY
524 * @response: device response code
525 * @upiu_res: query response data
526 */
527 struct ufs_query_res {
528 u8 response;
529 struct utp_upiu_query upiu_res;
530 };
531
532 #define UFS_VREG_VCC_MIN_UV 2700000 /* uV */
533 #define UFS_VREG_VCC_MAX_UV 3600000 /* uV */
534 #define UFS_VREG_VCC_1P8_MIN_UV 1700000 /* uV */
535 #define UFS_VREG_VCC_1P8_MAX_UV 1950000 /* uV */
536 #define UFS_VREG_VCCQ_MIN_UV 1140000 /* uV */
537 #define UFS_VREG_VCCQ_MAX_UV 1260000 /* uV */
538 #define UFS_VREG_VCCQ2_MIN_UV 1700000 /* uV */
539 #define UFS_VREG_VCCQ2_MAX_UV 1950000 /* uV */
540
541 /*
542 * VCCQ & VCCQ2 current requirement when UFS device is in sleep state
543 * and link is in Hibern8 state.
544 */
545 #define UFS_VREG_LPM_LOAD_UA 1000 /* uA */
546
547 struct ufs_vreg {
548 struct regulator *reg;
549 const char *name;
550 bool enabled;
551 int min_uV;
552 int max_uV;
553 int max_uA;
554 };
555
556 struct ufs_vreg_info {
557 struct ufs_vreg *vcc;
558 struct ufs_vreg *vccq;
559 struct ufs_vreg *vccq2;
560 struct ufs_vreg *vdd_hba;
561 };
562
563 struct ufs_dev_info {
564 bool f_power_on_wp_en;
565 /* Keeps information if any of the LU is power on write protected */
566 bool is_lu_power_on_wp;
567 /* Maximum number of general LU supported by the UFS device */
568 u8 max_lu_supported;
569 u8 wb_dedicated_lu;
570 u16 wmanufacturerid;
571 /*UFS device Product Name */
572 u8 *model;
573 u16 wspecversion;
574 u32 clk_gating_wait_us;
575 u32 d_ext_ufs_feature_sup;
576 u8 b_wb_buffer_type;
577 u32 d_wb_alloc_units;
578 bool b_rpm_dev_flush_capable;
579 u8 b_presrv_uspc_en;
580 };
581
582 /**
583 * ufs_is_valid_unit_desc_lun - checks if the given LUN has a unit descriptor
584 * @lun: LU number to check
585 * @return: true if the lun has a matching unit descriptor, false otherwise
586 */
ufs_is_valid_unit_desc_lun(u8 lun)587 static inline bool ufs_is_valid_unit_desc_lun(u8 lun)
588 {
589 return lun == UFS_UPIU_RPMB_WLUN || (lun < UFS_UPIU_MAX_GENERAL_LUN);
590 }
591
592 #endif /* End of Header */
593