1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * FB driver for the ST7789V LCD Controller
4 *
5 * Copyright (C) 2015 Dennis Menschel
6 */
7
8 #include <linux/bitops.h>
9 #include <linux/delay.h>
10 #include <linux/init.h>
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <video/mipi_display.h>
14
15 #include "fbtft.h"
16
17 #define DRVNAME "fb_st7789v"
18
19 #define DEFAULT_GAMMA \
20 "70 2C 2E 15 10 09 48 33 53 0B 19 18 20 25\n" \
21 "70 2C 2E 15 10 09 48 33 53 0B 19 18 20 25"
22
23 /**
24 * enum st7789v_command - ST7789V display controller commands
25 *
26 * @PORCTRL: porch setting
27 * @GCTRL: gate control
28 * @VCOMS: VCOM setting
29 * @VDVVRHEN: VDV and VRH command enable
30 * @VRHS: VRH set
31 * @VDVS: VDV set
32 * @VCMOFSET: VCOM offset set
33 * @PWCTRL1: power control 1
34 * @PVGAMCTRL: positive voltage gamma control
35 * @NVGAMCTRL: negative voltage gamma control
36 *
37 * The command names are the same as those found in the datasheet to ease
38 * looking up their semantics and usage.
39 *
40 * Note that the ST7789V display controller offers quite a few more commands
41 * which have been omitted from this list as they are not used at the moment.
42 * Furthermore, commands that are compliant with the MIPI DCS have been left
43 * out as well to avoid duplicate entries.
44 */
45 enum st7789v_command {
46 PORCTRL = 0xB2,
47 GCTRL = 0xB7,
48 VCOMS = 0xBB,
49 VDVVRHEN = 0xC2,
50 VRHS = 0xC3,
51 VDVS = 0xC4,
52 VCMOFSET = 0xC5,
53 PWCTRL1 = 0xD0,
54 PVGAMCTRL = 0xE0,
55 NVGAMCTRL = 0xE1,
56 };
57
58 #define MADCTL_BGR BIT(3) /* bitmask for RGB/BGR order */
59 #define MADCTL_MV BIT(5) /* bitmask for page/column order */
60 #define MADCTL_MX BIT(6) /* bitmask for column address order */
61 #define MADCTL_MY BIT(7) /* bitmask for page address order */
62
63 /**
64 * init_display() - initialize the display controller
65 *
66 * @par: FBTFT parameter object
67 *
68 * Most of the commands in this init function set their parameters to the
69 * same default values which are already in place after the display has been
70 * powered up. (The main exception to this rule is the pixel format which
71 * would default to 18 instead of 16 bit per pixel.)
72 * Nonetheless, this sequence can be used as a template for concrete
73 * displays which usually need some adjustments.
74 *
75 * Return: 0 on success, < 0 if error occurred.
76 */
init_display(struct fbtft_par * par)77 static int init_display(struct fbtft_par *par)
78 {
79 par->fbtftops.reset(par);
80
81 /* turn off sleep mode */
82 write_reg(par, MIPI_DCS_EXIT_SLEEP_MODE);
83 mdelay(120);
84
85 /* set pixel format to RGB-565 */
86 write_reg(par, MIPI_DCS_SET_PIXEL_FORMAT, MIPI_DCS_PIXEL_FMT_16BIT);
87
88 write_reg(par, PORCTRL, 0x08, 0x08, 0x00, 0x22, 0x22);
89
90 /*
91 * VGH = 13.26V
92 * VGL = -10.43V
93 */
94 write_reg(par, GCTRL, 0x35);
95
96 /*
97 * VDV and VRH register values come from command write
98 * (instead of NVM)
99 */
100 write_reg(par, VDVVRHEN, 0x01, 0xFF);
101
102 /*
103 * VAP = 4.1V + (VCOM + VCOM offset + 0.5 * VDV)
104 * VAN = -4.1V + (VCOM + VCOM offset + 0.5 * VDV)
105 */
106 write_reg(par, VRHS, 0x0B);
107
108 /* VDV = 0V */
109 write_reg(par, VDVS, 0x20);
110
111 /* VCOM = 0.9V */
112 write_reg(par, VCOMS, 0x20);
113
114 /* VCOM offset = 0V */
115 write_reg(par, VCMOFSET, 0x20);
116
117 /*
118 * AVDD = 6.8V
119 * AVCL = -4.8V
120 * VDS = 2.3V
121 */
122 write_reg(par, PWCTRL1, 0xA4, 0xA1);
123
124 write_reg(par, MIPI_DCS_SET_DISPLAY_ON);
125 return 0;
126 }
127
128 /**
129 * set_var() - apply LCD properties like rotation and BGR mode
130 *
131 * @par: FBTFT parameter object
132 *
133 * Return: 0 on success, < 0 if error occurred.
134 */
set_var(struct fbtft_par * par)135 static int set_var(struct fbtft_par *par)
136 {
137 u8 madctl_par = 0;
138
139 if (par->bgr)
140 madctl_par |= MADCTL_BGR;
141 switch (par->info->var.rotate) {
142 case 0:
143 break;
144 case 90:
145 madctl_par |= (MADCTL_MV | MADCTL_MY);
146 break;
147 case 180:
148 madctl_par |= (MADCTL_MX | MADCTL_MY);
149 break;
150 case 270:
151 madctl_par |= (MADCTL_MV | MADCTL_MX);
152 break;
153 default:
154 return -EINVAL;
155 }
156 write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, madctl_par);
157 return 0;
158 }
159
160 /**
161 * set_gamma() - set gamma curves
162 *
163 * @par: FBTFT parameter object
164 * @curves: gamma curves
165 *
166 * Before the gamma curves are applied, they are preprocessed with a bitmask
167 * to ensure syntactically correct input for the display controller.
168 * This implies that the curves input parameter might be changed by this
169 * function and that illegal gamma values are auto-corrected and not
170 * reported as errors.
171 *
172 * Return: 0 on success, < 0 if error occurred.
173 */
set_gamma(struct fbtft_par * par,u32 * curves)174 static int set_gamma(struct fbtft_par *par, u32 *curves)
175 {
176 int i;
177 int j;
178 int c; /* curve index offset */
179
180 /*
181 * Bitmasks for gamma curve command parameters.
182 * The masks are the same for both positive and negative voltage
183 * gamma curves.
184 */
185 static const u8 gamma_par_mask[] = {
186 0xFF, /* V63[3:0], V0[3:0]*/
187 0x3F, /* V1[5:0] */
188 0x3F, /* V2[5:0] */
189 0x1F, /* V4[4:0] */
190 0x1F, /* V6[4:0] */
191 0x3F, /* J0[1:0], V13[3:0] */
192 0x7F, /* V20[6:0] */
193 0x77, /* V36[2:0], V27[2:0] */
194 0x7F, /* V43[6:0] */
195 0x3F, /* J1[1:0], V50[3:0] */
196 0x1F, /* V57[4:0] */
197 0x1F, /* V59[4:0] */
198 0x3F, /* V61[5:0] */
199 0x3F, /* V62[5:0] */
200 };
201
202 for (i = 0; i < par->gamma.num_curves; i++) {
203 c = i * par->gamma.num_values;
204 for (j = 0; j < par->gamma.num_values; j++)
205 curves[c + j] &= gamma_par_mask[j];
206 write_reg(par, PVGAMCTRL + i,
207 curves[c + 0], curves[c + 1], curves[c + 2],
208 curves[c + 3], curves[c + 4], curves[c + 5],
209 curves[c + 6], curves[c + 7], curves[c + 8],
210 curves[c + 9], curves[c + 10], curves[c + 11],
211 curves[c + 12], curves[c + 13]);
212 }
213 return 0;
214 }
215
216 /**
217 * blank() - blank the display
218 *
219 * @par: FBTFT parameter object
220 * @on: whether to enable or disable blanking the display
221 *
222 * Return: 0 on success, < 0 if error occurred.
223 */
blank(struct fbtft_par * par,bool on)224 static int blank(struct fbtft_par *par, bool on)
225 {
226 if (on)
227 write_reg(par, MIPI_DCS_SET_DISPLAY_OFF);
228 else
229 write_reg(par, MIPI_DCS_SET_DISPLAY_ON);
230 return 0;
231 }
232
233 static struct fbtft_display display = {
234 .regwidth = 8,
235 .width = 240,
236 .height = 320,
237 .gamma_num = 2,
238 .gamma_len = 14,
239 .gamma = DEFAULT_GAMMA,
240 .fbtftops = {
241 .init_display = init_display,
242 .set_var = set_var,
243 .set_gamma = set_gamma,
244 .blank = blank,
245 },
246 };
247
248 FBTFT_REGISTER_DRIVER(DRVNAME, "sitronix,st7789v", &display);
249
250 MODULE_ALIAS("spi:" DRVNAME);
251 MODULE_ALIAS("platform:" DRVNAME);
252 MODULE_ALIAS("spi:st7789v");
253 MODULE_ALIAS("platform:st7789v");
254
255 MODULE_DESCRIPTION("FB driver for the ST7789V LCD Controller");
256 MODULE_AUTHOR("Dennis Menschel");
257 MODULE_LICENSE("GPL");
258