1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Cedrus VPU driver
4 *
5 * Copyright (C) 2016 Florent Revest <florent.revest@free-electrons.com>
6 * Copyright (C) 2018 Paul Kocialkowski <paul.kocialkowski@bootlin.com>
7 * Copyright (C) 2018 Bootlin
8 *
9 * Based on the vim2m driver, that is:
10 *
11 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
12 * Pawel Osciak, <pawel@osciak.com>
13 * Marek Szyprowski, <m.szyprowski@samsung.com>
14 */
15
16 #include <linux/platform_device.h>
17 #include <linux/module.h>
18 #include <linux/of.h>
19
20 #include <media/v4l2-device.h>
21 #include <media/v4l2-ioctl.h>
22 #include <media/v4l2-ctrls.h>
23 #include <media/v4l2-mem2mem.h>
24
25 #include "cedrus.h"
26 #include "cedrus_video.h"
27 #include "cedrus_dec.h"
28 #include "cedrus_hw.h"
29
30 static const struct cedrus_control cedrus_controls[] = {
31 {
32 .cfg = {
33 .id = V4L2_CID_MPEG_VIDEO_MPEG2_SLICE_PARAMS,
34 },
35 .codec = CEDRUS_CODEC_MPEG2,
36 .required = true,
37 },
38 {
39 .cfg = {
40 .id = V4L2_CID_MPEG_VIDEO_MPEG2_QUANTIZATION,
41 },
42 .codec = CEDRUS_CODEC_MPEG2,
43 .required = false,
44 },
45 {
46 .cfg = {
47 .id = V4L2_CID_MPEG_VIDEO_H264_DECODE_PARAMS,
48 },
49 .codec = CEDRUS_CODEC_H264,
50 .required = true,
51 },
52 {
53 .cfg = {
54 .id = V4L2_CID_MPEG_VIDEO_H264_SLICE_PARAMS,
55 },
56 .codec = CEDRUS_CODEC_H264,
57 .required = true,
58 },
59 {
60 .cfg = {
61 .id = V4L2_CID_MPEG_VIDEO_H264_SPS,
62 },
63 .codec = CEDRUS_CODEC_H264,
64 .required = true,
65 },
66 {
67 .cfg = {
68 .id = V4L2_CID_MPEG_VIDEO_H264_PPS,
69 },
70 .codec = CEDRUS_CODEC_H264,
71 .required = true,
72 },
73 {
74 .cfg = {
75 .id = V4L2_CID_MPEG_VIDEO_H264_SCALING_MATRIX,
76 },
77 .codec = CEDRUS_CODEC_H264,
78 .required = true,
79 },
80 {
81 .cfg = {
82 .id = V4L2_CID_MPEG_VIDEO_H264_DECODE_MODE,
83 .max = V4L2_MPEG_VIDEO_H264_DECODE_MODE_SLICE_BASED,
84 .def = V4L2_MPEG_VIDEO_H264_DECODE_MODE_SLICE_BASED,
85 },
86 .codec = CEDRUS_CODEC_H264,
87 .required = false,
88 },
89 {
90 .cfg = {
91 .id = V4L2_CID_MPEG_VIDEO_H264_START_CODE,
92 .max = V4L2_MPEG_VIDEO_H264_START_CODE_NONE,
93 .def = V4L2_MPEG_VIDEO_H264_START_CODE_NONE,
94 },
95 .codec = CEDRUS_CODEC_H264,
96 .required = false,
97 },
98 };
99
100 #define CEDRUS_CONTROLS_COUNT ARRAY_SIZE(cedrus_controls)
101
cedrus_find_control_data(struct cedrus_ctx * ctx,u32 id)102 void *cedrus_find_control_data(struct cedrus_ctx *ctx, u32 id)
103 {
104 unsigned int i;
105
106 for (i = 0; ctx->ctrls[i]; i++)
107 if (ctx->ctrls[i]->id == id)
108 return ctx->ctrls[i]->p_cur.p;
109
110 return NULL;
111 }
112
cedrus_init_ctrls(struct cedrus_dev * dev,struct cedrus_ctx * ctx)113 static int cedrus_init_ctrls(struct cedrus_dev *dev, struct cedrus_ctx *ctx)
114 {
115 struct v4l2_ctrl_handler *hdl = &ctx->hdl;
116 struct v4l2_ctrl *ctrl;
117 unsigned int ctrl_size;
118 unsigned int i;
119
120 v4l2_ctrl_handler_init(hdl, CEDRUS_CONTROLS_COUNT);
121 if (hdl->error) {
122 v4l2_err(&dev->v4l2_dev,
123 "Failed to initialize control handler\n");
124 return hdl->error;
125 }
126
127 ctrl_size = sizeof(ctrl) * CEDRUS_CONTROLS_COUNT + 1;
128
129 ctx->ctrls = kzalloc(ctrl_size, GFP_KERNEL);
130 if (!ctx->ctrls)
131 return -ENOMEM;
132
133 for (i = 0; i < CEDRUS_CONTROLS_COUNT; i++) {
134 ctrl = v4l2_ctrl_new_custom(hdl, &cedrus_controls[i].cfg,
135 NULL);
136 if (hdl->error) {
137 v4l2_err(&dev->v4l2_dev,
138 "Failed to create new custom control\n");
139
140 v4l2_ctrl_handler_free(hdl);
141 kfree(ctx->ctrls);
142 return hdl->error;
143 }
144
145 ctx->ctrls[i] = ctrl;
146 }
147
148 ctx->fh.ctrl_handler = hdl;
149 v4l2_ctrl_handler_setup(hdl);
150
151 return 0;
152 }
153
cedrus_request_validate(struct media_request * req)154 static int cedrus_request_validate(struct media_request *req)
155 {
156 struct media_request_object *obj;
157 struct v4l2_ctrl_handler *parent_hdl, *hdl;
158 struct cedrus_ctx *ctx = NULL;
159 struct v4l2_ctrl *ctrl_test;
160 unsigned int count;
161 unsigned int i;
162 int ret = 0;
163
164 list_for_each_entry(obj, &req->objects, list) {
165 struct vb2_buffer *vb;
166
167 if (vb2_request_object_is_buffer(obj)) {
168 vb = container_of(obj, struct vb2_buffer, req_obj);
169 ctx = vb2_get_drv_priv(vb->vb2_queue);
170
171 break;
172 }
173 }
174
175 if (!ctx)
176 return -ENOENT;
177
178 count = vb2_request_buffer_cnt(req);
179 if (!count) {
180 v4l2_info(&ctx->dev->v4l2_dev,
181 "No buffer was provided with the request\n");
182 return -ENOENT;
183 } else if (count > 1) {
184 v4l2_info(&ctx->dev->v4l2_dev,
185 "More than one buffer was provided with the request\n");
186 return -EINVAL;
187 }
188
189 parent_hdl = &ctx->hdl;
190
191 hdl = v4l2_ctrl_request_hdl_find(req, parent_hdl);
192 if (!hdl) {
193 v4l2_info(&ctx->dev->v4l2_dev, "Missing codec control(s)\n");
194 return -ENOENT;
195 }
196
197 for (i = 0; i < CEDRUS_CONTROLS_COUNT; i++) {
198 if (cedrus_controls[i].codec != ctx->current_codec ||
199 !cedrus_controls[i].required)
200 continue;
201
202 ctrl_test = v4l2_ctrl_request_hdl_ctrl_find(hdl,
203 cedrus_controls[i].cfg.id);
204 if (!ctrl_test) {
205 v4l2_info(&ctx->dev->v4l2_dev,
206 "Missing required codec control\n");
207 ret = -ENOENT;
208 break;
209 }
210 }
211
212 v4l2_ctrl_request_hdl_put(hdl);
213
214 if (ret)
215 return ret;
216
217 return vb2_request_validate(req);
218 }
219
cedrus_open(struct file * file)220 static int cedrus_open(struct file *file)
221 {
222 struct cedrus_dev *dev = video_drvdata(file);
223 struct cedrus_ctx *ctx = NULL;
224 int ret;
225
226 if (mutex_lock_interruptible(&dev->dev_mutex))
227 return -ERESTARTSYS;
228
229 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
230 if (!ctx) {
231 mutex_unlock(&dev->dev_mutex);
232 return -ENOMEM;
233 }
234
235 v4l2_fh_init(&ctx->fh, video_devdata(file));
236 file->private_data = &ctx->fh;
237 ctx->dev = dev;
238
239 ret = cedrus_init_ctrls(dev, ctx);
240 if (ret)
241 goto err_free;
242
243 ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx,
244 &cedrus_queue_init);
245 if (IS_ERR(ctx->fh.m2m_ctx)) {
246 ret = PTR_ERR(ctx->fh.m2m_ctx);
247 goto err_ctrls;
248 }
249
250 v4l2_fh_add(&ctx->fh);
251
252 mutex_unlock(&dev->dev_mutex);
253
254 return 0;
255
256 err_ctrls:
257 v4l2_ctrl_handler_free(&ctx->hdl);
258 err_free:
259 kfree(ctx);
260 mutex_unlock(&dev->dev_mutex);
261
262 return ret;
263 }
264
cedrus_release(struct file * file)265 static int cedrus_release(struct file *file)
266 {
267 struct cedrus_dev *dev = video_drvdata(file);
268 struct cedrus_ctx *ctx = container_of(file->private_data,
269 struct cedrus_ctx, fh);
270
271 mutex_lock(&dev->dev_mutex);
272
273 v4l2_fh_del(&ctx->fh);
274 v4l2_m2m_ctx_release(ctx->fh.m2m_ctx);
275
276 v4l2_ctrl_handler_free(&ctx->hdl);
277 kfree(ctx->ctrls);
278
279 v4l2_fh_exit(&ctx->fh);
280
281 kfree(ctx);
282
283 mutex_unlock(&dev->dev_mutex);
284
285 return 0;
286 }
287
288 static const struct v4l2_file_operations cedrus_fops = {
289 .owner = THIS_MODULE,
290 .open = cedrus_open,
291 .release = cedrus_release,
292 .poll = v4l2_m2m_fop_poll,
293 .unlocked_ioctl = video_ioctl2,
294 .mmap = v4l2_m2m_fop_mmap,
295 };
296
297 static const struct video_device cedrus_video_device = {
298 .name = CEDRUS_NAME,
299 .vfl_dir = VFL_DIR_M2M,
300 .fops = &cedrus_fops,
301 .ioctl_ops = &cedrus_ioctl_ops,
302 .minor = -1,
303 .release = video_device_release_empty,
304 .device_caps = V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING,
305 };
306
307 static const struct v4l2_m2m_ops cedrus_m2m_ops = {
308 .device_run = cedrus_device_run,
309 };
310
311 static const struct media_device_ops cedrus_m2m_media_ops = {
312 .req_validate = cedrus_request_validate,
313 .req_queue = v4l2_m2m_request_queue,
314 };
315
cedrus_probe(struct platform_device * pdev)316 static int cedrus_probe(struct platform_device *pdev)
317 {
318 struct cedrus_dev *dev;
319 struct video_device *vfd;
320 int ret;
321
322 dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
323 if (!dev)
324 return -ENOMEM;
325
326 platform_set_drvdata(pdev, dev);
327
328 dev->vfd = cedrus_video_device;
329 dev->dev = &pdev->dev;
330 dev->pdev = pdev;
331
332 ret = cedrus_hw_probe(dev);
333 if (ret) {
334 dev_err(&pdev->dev, "Failed to probe hardware\n");
335 return ret;
336 }
337
338 dev->dec_ops[CEDRUS_CODEC_MPEG2] = &cedrus_dec_ops_mpeg2;
339 dev->dec_ops[CEDRUS_CODEC_H264] = &cedrus_dec_ops_h264;
340
341 mutex_init(&dev->dev_mutex);
342
343 ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
344 if (ret) {
345 dev_err(&pdev->dev, "Failed to register V4L2 device\n");
346 return ret;
347 }
348
349 vfd = &dev->vfd;
350 vfd->lock = &dev->dev_mutex;
351 vfd->v4l2_dev = &dev->v4l2_dev;
352
353 snprintf(vfd->name, sizeof(vfd->name), "%s", cedrus_video_device.name);
354 video_set_drvdata(vfd, dev);
355
356 dev->m2m_dev = v4l2_m2m_init(&cedrus_m2m_ops);
357 if (IS_ERR(dev->m2m_dev)) {
358 v4l2_err(&dev->v4l2_dev,
359 "Failed to initialize V4L2 M2M device\n");
360 ret = PTR_ERR(dev->m2m_dev);
361
362 goto err_v4l2;
363 }
364
365 dev->mdev.dev = &pdev->dev;
366 strscpy(dev->mdev.model, CEDRUS_NAME, sizeof(dev->mdev.model));
367 strscpy(dev->mdev.bus_info, "platform:" CEDRUS_NAME,
368 sizeof(dev->mdev.bus_info));
369
370 media_device_init(&dev->mdev);
371 dev->mdev.ops = &cedrus_m2m_media_ops;
372 dev->v4l2_dev.mdev = &dev->mdev;
373
374 ret = video_register_device(vfd, VFL_TYPE_GRABBER, 0);
375 if (ret) {
376 v4l2_err(&dev->v4l2_dev, "Failed to register video device\n");
377 goto err_m2m;
378 }
379
380 v4l2_info(&dev->v4l2_dev,
381 "Device registered as /dev/video%d\n", vfd->num);
382
383 ret = v4l2_m2m_register_media_controller(dev->m2m_dev, vfd,
384 MEDIA_ENT_F_PROC_VIDEO_DECODER);
385 if (ret) {
386 v4l2_err(&dev->v4l2_dev,
387 "Failed to initialize V4L2 M2M media controller\n");
388 goto err_video;
389 }
390
391 ret = media_device_register(&dev->mdev);
392 if (ret) {
393 v4l2_err(&dev->v4l2_dev, "Failed to register media device\n");
394 goto err_m2m_mc;
395 }
396
397 return 0;
398
399 err_m2m_mc:
400 v4l2_m2m_unregister_media_controller(dev->m2m_dev);
401 err_video:
402 video_unregister_device(&dev->vfd);
403 err_m2m:
404 v4l2_m2m_release(dev->m2m_dev);
405 err_v4l2:
406 v4l2_device_unregister(&dev->v4l2_dev);
407
408 return ret;
409 }
410
cedrus_remove(struct platform_device * pdev)411 static int cedrus_remove(struct platform_device *pdev)
412 {
413 struct cedrus_dev *dev = platform_get_drvdata(pdev);
414
415 if (media_devnode_is_registered(dev->mdev.devnode)) {
416 media_device_unregister(&dev->mdev);
417 v4l2_m2m_unregister_media_controller(dev->m2m_dev);
418 media_device_cleanup(&dev->mdev);
419 }
420
421 v4l2_m2m_release(dev->m2m_dev);
422 video_unregister_device(&dev->vfd);
423 v4l2_device_unregister(&dev->v4l2_dev);
424
425 cedrus_hw_remove(dev);
426
427 return 0;
428 }
429
430 static const struct cedrus_variant sun4i_a10_cedrus_variant = {
431 .mod_rate = 320000000,
432 };
433
434 static const struct cedrus_variant sun5i_a13_cedrus_variant = {
435 .mod_rate = 320000000,
436 };
437
438 static const struct cedrus_variant sun7i_a20_cedrus_variant = {
439 .mod_rate = 320000000,
440 };
441
442 static const struct cedrus_variant sun8i_a33_cedrus_variant = {
443 .capabilities = CEDRUS_CAPABILITY_UNTILED,
444 .mod_rate = 320000000,
445 };
446
447 static const struct cedrus_variant sun8i_h3_cedrus_variant = {
448 .capabilities = CEDRUS_CAPABILITY_UNTILED,
449 .mod_rate = 402000000,
450 };
451
452 static const struct cedrus_variant sun50i_a64_cedrus_variant = {
453 .capabilities = CEDRUS_CAPABILITY_UNTILED,
454 .mod_rate = 402000000,
455 };
456
457 static const struct cedrus_variant sun50i_h5_cedrus_variant = {
458 .capabilities = CEDRUS_CAPABILITY_UNTILED,
459 .mod_rate = 402000000,
460 };
461
462 static const struct cedrus_variant sun50i_h6_cedrus_variant = {
463 .capabilities = CEDRUS_CAPABILITY_UNTILED,
464 .quirks = CEDRUS_QUIRK_NO_DMA_OFFSET,
465 .mod_rate = 600000000,
466 };
467
468 static const struct of_device_id cedrus_dt_match[] = {
469 {
470 .compatible = "allwinner,sun4i-a10-video-engine",
471 .data = &sun4i_a10_cedrus_variant,
472 },
473 {
474 .compatible = "allwinner,sun5i-a13-video-engine",
475 .data = &sun5i_a13_cedrus_variant,
476 },
477 {
478 .compatible = "allwinner,sun7i-a20-video-engine",
479 .data = &sun7i_a20_cedrus_variant,
480 },
481 {
482 .compatible = "allwinner,sun8i-a33-video-engine",
483 .data = &sun8i_a33_cedrus_variant,
484 },
485 {
486 .compatible = "allwinner,sun8i-h3-video-engine",
487 .data = &sun8i_h3_cedrus_variant,
488 },
489 {
490 .compatible = "allwinner,sun50i-a64-video-engine",
491 .data = &sun50i_a64_cedrus_variant,
492 },
493 {
494 .compatible = "allwinner,sun50i-h5-video-engine",
495 .data = &sun50i_h5_cedrus_variant,
496 },
497 {
498 .compatible = "allwinner,sun50i-h6-video-engine",
499 .data = &sun50i_h6_cedrus_variant,
500 },
501 { /* sentinel */ }
502 };
503 MODULE_DEVICE_TABLE(of, cedrus_dt_match);
504
505 static struct platform_driver cedrus_driver = {
506 .probe = cedrus_probe,
507 .remove = cedrus_remove,
508 .driver = {
509 .name = CEDRUS_NAME,
510 .of_match_table = of_match_ptr(cedrus_dt_match),
511 },
512 };
513 module_platform_driver(cedrus_driver);
514
515 MODULE_LICENSE("GPL v2");
516 MODULE_AUTHOR("Florent Revest <florent.revest@free-electrons.com>");
517 MODULE_AUTHOR("Paul Kocialkowski <paul.kocialkowski@bootlin.com>");
518 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@bootlin.com>");
519 MODULE_DESCRIPTION("Cedrus VPU driver");
520