1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2016 Andreas Färber 4 * 5 * Copyright (c) 2016 BayLibre, SAS. 6 * Author: Neil Armstrong <narmstrong@baylibre.com> 7 * 8 * Copyright (c) 2016 Endless Computers, Inc. 9 * Author: Carlo Caione <carlo@endlessm.com> 10 */ 11 12#include <dt-bindings/gpio/gpio.h> 13#include <dt-bindings/interrupt-controller/irq.h> 14#include <dt-bindings/interrupt-controller/arm-gic.h> 15 16/ { 17 interrupt-parent = <&gic>; 18 #address-cells = <2>; 19 #size-cells = <2>; 20 21 reserved-memory { 22 #address-cells = <2>; 23 #size-cells = <2>; 24 ranges; 25 26 /* 16 MiB reserved for Hardware ROM Firmware */ 27 hwrom_reserved: hwrom@0 { 28 reg = <0x0 0x0 0x0 0x1000000>; 29 no-map; 30 }; 31 32 /* 2 MiB reserved for ARM Trusted Firmware (BL31) */ 33 secmon_reserved: secmon@10000000 { 34 reg = <0x0 0x10000000 0x0 0x200000>; 35 no-map; 36 }; 37 38 /* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */ 39 secmon_reserved_alt: secmon@5000000 { 40 reg = <0x0 0x05000000 0x0 0x300000>; 41 no-map; 42 }; 43 44 /* 32 MiB reserved for ARM Trusted Firmware (BL32) */ 45 secmon_reserved_bl32: secmon@5300000 { 46 reg = <0x0 0x05300000 0x0 0x2000000>; 47 no-map; 48 }; 49 50 linux,cma { 51 compatible = "shared-dma-pool"; 52 reusable; 53 size = <0x0 0x10000000>; 54 alignment = <0x0 0x400000>; 55 linux,cma-default; 56 }; 57 }; 58 59 chosen { 60 #address-cells = <2>; 61 #size-cells = <2>; 62 ranges; 63 64 simplefb_cvbs: framebuffer-cvbs { 65 compatible = "amlogic,simple-framebuffer", 66 "simple-framebuffer"; 67 amlogic,pipeline = "vpu-cvbs"; 68 power-domains = <&pwrc_vpu>; 69 status = "disabled"; 70 }; 71 72 simplefb_hdmi: framebuffer-hdmi { 73 compatible = "amlogic,simple-framebuffer", 74 "simple-framebuffer"; 75 amlogic,pipeline = "vpu-hdmi"; 76 power-domains = <&pwrc_vpu>; 77 status = "disabled"; 78 }; 79 }; 80 81 cpus { 82 #address-cells = <0x2>; 83 #size-cells = <0x0>; 84 85 cpu0: cpu@0 { 86 device_type = "cpu"; 87 compatible = "arm,cortex-a53"; 88 reg = <0x0 0x0>; 89 enable-method = "psci"; 90 next-level-cache = <&l2>; 91 clocks = <&scpi_dvfs 0>; 92 }; 93 94 cpu1: cpu@1 { 95 device_type = "cpu"; 96 compatible = "arm,cortex-a53"; 97 reg = <0x0 0x1>; 98 enable-method = "psci"; 99 next-level-cache = <&l2>; 100 clocks = <&scpi_dvfs 0>; 101 }; 102 103 cpu2: cpu@2 { 104 device_type = "cpu"; 105 compatible = "arm,cortex-a53"; 106 reg = <0x0 0x2>; 107 enable-method = "psci"; 108 next-level-cache = <&l2>; 109 clocks = <&scpi_dvfs 0>; 110 }; 111 112 cpu3: cpu@3 { 113 device_type = "cpu"; 114 compatible = "arm,cortex-a53"; 115 reg = <0x0 0x3>; 116 enable-method = "psci"; 117 next-level-cache = <&l2>; 118 clocks = <&scpi_dvfs 0>; 119 }; 120 121 l2: l2-cache0 { 122 compatible = "cache"; 123 }; 124 }; 125 126 arm-pmu { 127 compatible = "arm,cortex-a53-pmu"; 128 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 129 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, 130 <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>, 131 <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 132 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; 133 }; 134 135 psci { 136 compatible = "arm,psci-0.2"; 137 method = "smc"; 138 }; 139 140 timer { 141 compatible = "arm,armv8-timer"; 142 interrupts = <GIC_PPI 13 143 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, 144 <GIC_PPI 14 145 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, 146 <GIC_PPI 11 147 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, 148 <GIC_PPI 10 149 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>; 150 }; 151 152 xtal: xtal-clk { 153 compatible = "fixed-clock"; 154 clock-frequency = <24000000>; 155 clock-output-names = "xtal"; 156 #clock-cells = <0>; 157 }; 158 159 firmware { 160 sm: secure-monitor { 161 compatible = "amlogic,meson-gx-sm", "amlogic,meson-gxbb-sm"; 162 }; 163 }; 164 165 efuse: efuse { 166 compatible = "amlogic,meson-gx-efuse", "amlogic,meson-gxbb-efuse"; 167 #address-cells = <1>; 168 #size-cells = <1>; 169 read-only; 170 171 sn: sn@14 { 172 reg = <0x14 0x10>; 173 }; 174 175 eth_mac: eth-mac@34 { 176 reg = <0x34 0x10>; 177 }; 178 179 bid: bid@46 { 180 reg = <0x46 0x30>; 181 }; 182 }; 183 184 scpi { 185 compatible = "amlogic,meson-gxbb-scpi", "arm,scpi-pre-1.0"; 186 mboxes = <&mailbox 1 &mailbox 2>; 187 shmem = <&cpu_scp_lpri &cpu_scp_hpri>; 188 189 scpi_clocks: clocks { 190 compatible = "arm,scpi-clocks"; 191 192 scpi_dvfs: clocks-0 { 193 compatible = "arm,scpi-dvfs-clocks"; 194 #clock-cells = <1>; 195 clock-indices = <0>; 196 clock-output-names = "vcpu"; 197 }; 198 }; 199 200 scpi_sensors: sensors { 201 compatible = "amlogic,meson-gxbb-scpi-sensors", "arm,scpi-sensors"; 202 #thermal-sensor-cells = <1>; 203 }; 204 }; 205 206 soc { 207 compatible = "simple-bus"; 208 #address-cells = <2>; 209 #size-cells = <2>; 210 ranges; 211 212 cbus: bus@c1100000 { 213 compatible = "simple-bus"; 214 reg = <0x0 0xc1100000 0x0 0x100000>; 215 #address-cells = <2>; 216 #size-cells = <2>; 217 ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>; 218 219 gpio_intc: interrupt-controller@9880 { 220 compatible = "amlogic,meson-gpio-intc"; 221 reg = <0x0 0x9880 0x0 0x10>; 222 interrupt-controller; 223 #interrupt-cells = <2>; 224 amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>; 225 status = "disabled"; 226 }; 227 228 reset: reset-controller@4404 { 229 compatible = "amlogic,meson-gxbb-reset"; 230 reg = <0x0 0x04404 0x0 0x9c>; 231 #reset-cells = <1>; 232 }; 233 234 uart_A: serial@84c0 { 235 compatible = "amlogic,meson-gx-uart"; 236 reg = <0x0 0x84c0 0x0 0x18>; 237 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>; 238 status = "disabled"; 239 }; 240 241 uart_B: serial@84dc { 242 compatible = "amlogic,meson-gx-uart"; 243 reg = <0x0 0x84dc 0x0 0x18>; 244 interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>; 245 status = "disabled"; 246 }; 247 248 i2c_A: i2c@8500 { 249 compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c"; 250 reg = <0x0 0x08500 0x0 0x20>; 251 interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>; 252 #address-cells = <1>; 253 #size-cells = <0>; 254 status = "disabled"; 255 }; 256 257 pwm_ab: pwm@8550 { 258 compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm"; 259 reg = <0x0 0x08550 0x0 0x10>; 260 #pwm-cells = <3>; 261 status = "disabled"; 262 }; 263 264 pwm_cd: pwm@8650 { 265 compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm"; 266 reg = <0x0 0x08650 0x0 0x10>; 267 #pwm-cells = <3>; 268 status = "disabled"; 269 }; 270 271 saradc: adc@8680 { 272 compatible = "amlogic,meson-saradc"; 273 reg = <0x0 0x8680 0x0 0x34>; 274 #io-channel-cells = <1>; 275 interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>; 276 status = "disabled"; 277 }; 278 279 pwm_ef: pwm@86c0 { 280 compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm"; 281 reg = <0x0 0x086c0 0x0 0x10>; 282 #pwm-cells = <3>; 283 status = "disabled"; 284 }; 285 286 uart_C: serial@8700 { 287 compatible = "amlogic,meson-gx-uart"; 288 reg = <0x0 0x8700 0x0 0x18>; 289 interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>; 290 status = "disabled"; 291 }; 292 293 clock-measure@8758 { 294 compatible = "amlogic,meson-gx-clk-measure"; 295 reg = <0x0 0x8758 0x0 0x10>; 296 }; 297 298 i2c_B: i2c@87c0 { 299 compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c"; 300 reg = <0x0 0x087c0 0x0 0x20>; 301 interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>; 302 #address-cells = <1>; 303 #size-cells = <0>; 304 status = "disabled"; 305 }; 306 307 i2c_C: i2c@87e0 { 308 compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c"; 309 reg = <0x0 0x087e0 0x0 0x20>; 310 interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>; 311 #address-cells = <1>; 312 #size-cells = <0>; 313 status = "disabled"; 314 }; 315 316 spicc: spi@8d80 { 317 compatible = "amlogic,meson-gx-spicc"; 318 reg = <0x0 0x08d80 0x0 0x80>; 319 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 320 #address-cells = <1>; 321 #size-cells = <0>; 322 status = "disabled"; 323 }; 324 325 spifc: spi@8c80 { 326 compatible = "amlogic,meson-gxbb-spifc"; 327 reg = <0x0 0x08c80 0x0 0x80>; 328 #address-cells = <1>; 329 #size-cells = <0>; 330 status = "disabled"; 331 }; 332 333 watchdog@98d0 { 334 compatible = "amlogic,meson-gxbb-wdt"; 335 reg = <0x0 0x098d0 0x0 0x10>; 336 clocks = <&xtal>; 337 }; 338 }; 339 340 gic: interrupt-controller@c4301000 { 341 compatible = "arm,gic-400"; 342 reg = <0x0 0xc4301000 0 0x1000>, 343 <0x0 0xc4302000 0 0x2000>, 344 <0x0 0xc4304000 0 0x2000>, 345 <0x0 0xc4306000 0 0x2000>; 346 interrupt-controller; 347 interrupts = <GIC_PPI 9 348 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; 349 #interrupt-cells = <3>; 350 #address-cells = <0>; 351 }; 352 353 sram: sram@c8000000 { 354 compatible = "mmio-sram"; 355 reg = <0x0 0xc8000000 0x0 0x14000>; 356 357 #address-cells = <1>; 358 #size-cells = <1>; 359 ranges = <0 0x0 0xc8000000 0x14000>; 360 361 cpu_scp_lpri: scp-sram@0 { 362 compatible = "amlogic,meson-gxbb-scp-shmem"; 363 reg = <0x13000 0x400>; 364 }; 365 366 cpu_scp_hpri: scp-sram@200 { 367 compatible = "amlogic,meson-gxbb-scp-shmem"; 368 reg = <0x13400 0x400>; 369 }; 370 }; 371 372 aobus: bus@c8100000 { 373 compatible = "simple-bus"; 374 reg = <0x0 0xc8100000 0x0 0x100000>; 375 #address-cells = <2>; 376 #size-cells = <2>; 377 ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>; 378 379 sysctrl_AO: sys-ctrl@0 { 380 compatible = "amlogic,meson-gx-ao-sysctrl", "simple-mfd", "syscon"; 381 reg = <0x0 0x0 0x0 0x100>; 382 383 pwrc_vpu: power-controller-vpu { 384 compatible = "amlogic,meson-gx-pwrc-vpu"; 385 #power-domain-cells = <0>; 386 amlogic,hhi-sysctrl = <&sysctrl>; 387 }; 388 389 clkc_AO: clock-controller { 390 compatible = "amlogic,meson-gx-aoclkc"; 391 #clock-cells = <1>; 392 #reset-cells = <1>; 393 }; 394 }; 395 396 cec_AO: cec@100 { 397 compatible = "amlogic,meson-gx-ao-cec"; 398 reg = <0x0 0x00100 0x0 0x14>; 399 interrupts = <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>; 400 }; 401 402 sec_AO: ao-secure@140 { 403 compatible = "amlogic,meson-gx-ao-secure", "syscon"; 404 reg = <0x0 0x140 0x0 0x140>; 405 amlogic,has-chip-id; 406 }; 407 408 uart_AO: serial@4c0 { 409 compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; 410 reg = <0x0 0x004c0 0x0 0x18>; 411 interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>; 412 status = "disabled"; 413 }; 414 415 uart_AO_B: serial@4e0 { 416 compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; 417 reg = <0x0 0x004e0 0x0 0x18>; 418 interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>; 419 status = "disabled"; 420 }; 421 422 i2c_AO: i2c@500 { 423 compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c"; 424 reg = <0x0 0x500 0x0 0x20>; 425 interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>; 426 #address-cells = <1>; 427 #size-cells = <0>; 428 status = "disabled"; 429 }; 430 431 pwm_AO_ab: pwm@550 { 432 compatible = "amlogic,meson-gx-ao-pwm", "amlogic,meson-gxbb-ao-pwm"; 433 reg = <0x0 0x00550 0x0 0x10>; 434 #pwm-cells = <3>; 435 status = "disabled"; 436 }; 437 438 ir: ir@580 { 439 compatible = "amlogic,meson-gx-ir", "amlogic,meson-gxbb-ir"; 440 reg = <0x0 0x00580 0x0 0x40>; 441 interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>; 442 status = "disabled"; 443 }; 444 }; 445 446 vdec: video-codec@c8820000 { 447 compatible = "amlogic,gx-vdec"; 448 reg = <0x0 0xc8820000 0x0 0x10000>, 449 <0x0 0xc110a580 0x0 0xe4>; 450 reg-names = "dos", "esparser"; 451 452 interrupts = <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>, 453 <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>; 454 interrupt-names = "vdec", "esparser"; 455 456 amlogic,ao-sysctrl = <&sysctrl_AO>; 457 amlogic,canvas = <&canvas>; 458 }; 459 460 periphs: bus@c8834000 { 461 compatible = "simple-bus"; 462 reg = <0x0 0xc8834000 0x0 0x2000>; 463 #address-cells = <2>; 464 #size-cells = <2>; 465 ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>; 466 467 hwrng: rng@0 { 468 compatible = "amlogic,meson-rng"; 469 reg = <0x0 0x0 0x0 0x4>; 470 }; 471 }; 472 473 dmcbus: bus@c8838000 { 474 compatible = "simple-bus"; 475 reg = <0x0 0xc8838000 0x0 0x400>; 476 #address-cells = <2>; 477 #size-cells = <2>; 478 ranges = <0x0 0x0 0x0 0xc8838000 0x0 0x400>; 479 480 canvas: video-lut@48 { 481 compatible = "amlogic,canvas"; 482 reg = <0x0 0x48 0x0 0x14>; 483 }; 484 }; 485 486 hiubus: bus@c883c000 { 487 compatible = "simple-bus"; 488 reg = <0x0 0xc883c000 0x0 0x2000>; 489 #address-cells = <2>; 490 #size-cells = <2>; 491 ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>; 492 493 sysctrl: system-controller@0 { 494 compatible = "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon"; 495 reg = <0 0 0 0x400>; 496 }; 497 498 mailbox: mailbox@404 { 499 compatible = "amlogic,meson-gxbb-mhu"; 500 reg = <0 0x404 0 0x4c>; 501 interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>, 502 <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>, 503 <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>; 504 #mbox-cells = <1>; 505 }; 506 }; 507 508 ethmac: ethernet@c9410000 { 509 compatible = "amlogic,meson-gxbb-dwmac", 510 "snps,dwmac-3.70a", 511 "snps,dwmac"; 512 reg = <0x0 0xc9410000 0x0 0x10000>, 513 <0x0 0xc8834540 0x0 0x4>; 514 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 515 interrupt-names = "macirq"; 516 rx-fifo-depth = <4096>; 517 tx-fifo-depth = <2048>; 518 status = "disabled"; 519 }; 520 521 apb: apb@d0000000 { 522 compatible = "simple-bus"; 523 reg = <0x0 0xd0000000 0x0 0x200000>; 524 #address-cells = <2>; 525 #size-cells = <2>; 526 ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>; 527 528 sd_emmc_a: mmc@70000 { 529 compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc"; 530 reg = <0x0 0x70000 0x0 0x800>; 531 interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>; 532 status = "disabled"; 533 }; 534 535 sd_emmc_b: mmc@72000 { 536 compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc"; 537 reg = <0x0 0x72000 0x0 0x800>; 538 interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>; 539 status = "disabled"; 540 }; 541 542 sd_emmc_c: mmc@74000 { 543 compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc"; 544 reg = <0x0 0x74000 0x0 0x800>; 545 interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>; 546 status = "disabled"; 547 }; 548 }; 549 550 vpu: vpu@d0100000 { 551 compatible = "amlogic,meson-gx-vpu"; 552 reg = <0x0 0xd0100000 0x0 0x100000>, 553 <0x0 0xc883c000 0x0 0x1000>; 554 reg-names = "vpu", "hhi"; 555 interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>; 556 #address-cells = <1>; 557 #size-cells = <0>; 558 amlogic,canvas = <&canvas>; 559 560 /* CVBS VDAC output port */ 561 cvbs_vdac_port: port@0 { 562 reg = <0>; 563 }; 564 565 /* HDMI-TX output port */ 566 hdmi_tx_port: port@1 { 567 reg = <1>; 568 569 hdmi_tx_out: endpoint { 570 remote-endpoint = <&hdmi_tx_in>; 571 }; 572 }; 573 }; 574 575 hdmi_tx: hdmi-tx@c883a000 { 576 compatible = "amlogic,meson-gx-dw-hdmi"; 577 reg = <0x0 0xc883a000 0x0 0x1c>; 578 interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>; 579 #address-cells = <1>; 580 #size-cells = <0>; 581 status = "disabled"; 582 583 /* VPU VENC Input */ 584 hdmi_tx_venc_port: port@0 { 585 reg = <0>; 586 587 hdmi_tx_in: endpoint { 588 remote-endpoint = <&hdmi_tx_out>; 589 }; 590 }; 591 592 /* TMDS Output */ 593 hdmi_tx_tmds_port: port@1 { 594 reg = <1>; 595 }; 596 }; 597 }; 598}; 599