1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (c) 2019, Linaro Ltd. 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 10#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 11#include "sdm845.dtsi" 12#include "pm8998.dtsi" 13#include "pmi8998.dtsi" 14 15/ { 16 model = "Thundercomm Dragonboard 845c"; 17 compatible = "thundercomm,db845c", "qcom,sdm845"; 18 19 aliases { 20 serial0 = &uart9; 21 hsuart0 = &uart6; 22 }; 23 24 chosen { 25 stdout-path = "serial0:115200n8"; 26 }; 27 28 dc12v: dc12v-regulator { 29 compatible = "regulator-fixed"; 30 regulator-name = "DC12V"; 31 regulator-min-microvolt = <12000000>; 32 regulator-max-microvolt = <12000000>; 33 regulator-always-on; 34 }; 35 36 gpio_keys { 37 compatible = "gpio-keys"; 38 autorepeat; 39 40 pinctrl-names = "default"; 41 pinctrl-0 = <&vol_up_pin_a>; 42 43 vol-up { 44 label = "Volume Up"; 45 linux,code = <KEY_VOLUMEUP>; 46 gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>; 47 }; 48 }; 49 50 leds { 51 compatible = "gpio-leds"; 52 53 user4 { 54 label = "green:user4"; 55 gpios = <&pm8998_gpio 13 GPIO_ACTIVE_HIGH>; 56 default-state = "off"; 57 panic-indicator; 58 }; 59 60 wlan { 61 label = "yellow:wlan"; 62 gpios = <&pm8998_gpio 9 GPIO_ACTIVE_HIGH>; 63 linux,default-trigger = "phy0tx"; 64 default-state = "off"; 65 }; 66 67 bt { 68 label = "blue:bt"; 69 gpios = <&pm8998_gpio 5 GPIO_ACTIVE_HIGH>; 70 linux,default-trigger = "bluetooth-power"; 71 default-state = "off"; 72 }; 73 }; 74 75 hdmi-out { 76 compatible = "hdmi-connector"; 77 type = "a"; 78 79 port { 80 hdmi_con: endpoint { 81 remote-endpoint = <<9611_out>; 82 }; 83 }; 84 }; 85 86 lt9611_1v8: lt9611-vdd18-regulator { 87 compatible = "regulator-fixed"; 88 regulator-name = "LT9611_1V8"; 89 90 vin-supply = <&vdc_5v>; 91 regulator-min-microvolt = <1800000>; 92 regulator-max-microvolt = <1800000>; 93 94 gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; 95 enable-active-high; 96 }; 97 98 lt9611_3v3: lt9611-3v3 { 99 compatible = "regulator-fixed"; 100 regulator-name = "LT9611_3V3"; 101 102 vin-supply = <&vdc_3v3>; 103 regulator-min-microvolt = <3300000>; 104 regulator-max-microvolt = <3300000>; 105 106 // TODO: make it possible to drive same GPIO from two clients 107 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; 108 // enable-active-high; 109 }; 110 111 pcie0_1p05v: pcie-0-1p05v-regulator { 112 compatible = "regulator-fixed"; 113 regulator-name = "PCIE0_1.05V"; 114 115 vin-supply = <&vbat>; 116 regulator-min-microvolt = <1050000>; 117 regulator-max-microvolt = <1050000>; 118 119 // TODO: make it possible to drive same GPIO from two clients 120 // gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>; 121 // enable-active-high; 122 }; 123 124 pcie0_3p3v_dual: vldo-3v3-regulator { 125 compatible = "regulator-fixed"; 126 regulator-name = "VLDO_3V3"; 127 128 vin-supply = <&vbat>; 129 regulator-min-microvolt = <3300000>; 130 regulator-max-microvolt = <3300000>; 131 132 gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>; 133 enable-active-high; 134 135 pinctrl-names = "default"; 136 pinctrl-0 = <&pcie0_pwren_state>; 137 }; 138 139 v5p0_hdmiout: v5p0-hdmiout-regulator { 140 compatible = "regulator-fixed"; 141 regulator-name = "V5P0_HDMIOUT"; 142 143 vin-supply = <&vdc_5v>; 144 regulator-min-microvolt = <500000>; 145 regulator-max-microvolt = <500000>; 146 147 // TODO: make it possible to drive same GPIO from two clients 148 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; 149 // enable-active-high; 150 }; 151 152 vbat: vbat-regulator { 153 compatible = "regulator-fixed"; 154 regulator-name = "VBAT"; 155 156 vin-supply = <&dc12v>; 157 regulator-min-microvolt = <4200000>; 158 regulator-max-microvolt = <4200000>; 159 regulator-always-on; 160 }; 161 162 vbat_som: vbat-som-regulator { 163 compatible = "regulator-fixed"; 164 regulator-name = "VBAT_SOM"; 165 166 vin-supply = <&dc12v>; 167 regulator-min-microvolt = <4200000>; 168 regulator-max-microvolt = <4200000>; 169 regulator-always-on; 170 }; 171 172 vdc_3v3: vdc-3v3-regulator { 173 compatible = "regulator-fixed"; 174 regulator-name = "VDC_3V3"; 175 vin-supply = <&dc12v>; 176 regulator-min-microvolt = <3300000>; 177 regulator-max-microvolt = <3300000>; 178 regulator-always-on; 179 }; 180 181 vdc_5v: vdc-5v-regulator { 182 compatible = "regulator-fixed"; 183 regulator-name = "VDC_5V"; 184 185 vin-supply = <&dc12v>; 186 regulator-min-microvolt = <500000>; 187 regulator-max-microvolt = <500000>; 188 regulator-always-on; 189 }; 190 191 vreg_s4a_1p8: vreg-s4a-1p8 { 192 compatible = "regulator-fixed"; 193 regulator-name = "vreg_s4a_1p8"; 194 195 regulator-min-microvolt = <1800000>; 196 regulator-max-microvolt = <1800000>; 197 regulator-always-on; 198 }; 199 200 vph_pwr: vph-pwr-regulator { 201 compatible = "regulator-fixed"; 202 regulator-name = "vph_pwr"; 203 204 vin-supply = <&vbat_som>; 205 }; 206}; 207 208&adsp_pas { 209 status = "okay"; 210 211 firmware-name = "qcom/sdm845/adsp.mdt"; 212}; 213 214&apps_rsc { 215 pm8998-rpmh-regulators { 216 compatible = "qcom,pm8998-rpmh-regulators"; 217 qcom,pmic-id = "a"; 218 vdd-s1-supply = <&vph_pwr>; 219 vdd-s2-supply = <&vph_pwr>; 220 vdd-s3-supply = <&vph_pwr>; 221 vdd-s4-supply = <&vph_pwr>; 222 vdd-s5-supply = <&vph_pwr>; 223 vdd-s6-supply = <&vph_pwr>; 224 vdd-s7-supply = <&vph_pwr>; 225 vdd-s8-supply = <&vph_pwr>; 226 vdd-s9-supply = <&vph_pwr>; 227 vdd-s10-supply = <&vph_pwr>; 228 vdd-s11-supply = <&vph_pwr>; 229 vdd-s12-supply = <&vph_pwr>; 230 vdd-s13-supply = <&vph_pwr>; 231 vdd-l1-l27-supply = <&vreg_s7a_1p025>; 232 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>; 233 vdd-l3-l11-supply = <&vreg_s7a_1p025>; 234 vdd-l4-l5-supply = <&vreg_s7a_1p025>; 235 vdd-l6-supply = <&vph_pwr>; 236 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>; 237 vdd-l9-supply = <&vreg_bob>; 238 vdd-l10-l23-l25-supply = <&vreg_bob>; 239 vdd-l13-l19-l21-supply = <&vreg_bob>; 240 vdd-l16-l28-supply = <&vreg_bob>; 241 vdd-l18-l22-supply = <&vreg_bob>; 242 vdd-l20-l24-supply = <&vreg_bob>; 243 vdd-l26-supply = <&vreg_s3a_1p35>; 244 vin-lvs-1-2-supply = <&vreg_s4a_1p8>; 245 246 vreg_s3a_1p35: smps3 { 247 regulator-min-microvolt = <1352000>; 248 regulator-max-microvolt = <1352000>; 249 }; 250 251 vreg_s5a_2p04: smps5 { 252 regulator-min-microvolt = <1904000>; 253 regulator-max-microvolt = <2040000>; 254 }; 255 256 vreg_s7a_1p025: smps7 { 257 regulator-min-microvolt = <900000>; 258 regulator-max-microvolt = <1028000>; 259 }; 260 261 vreg_l1a_0p875: ldo1 { 262 regulator-min-microvolt = <880000>; 263 regulator-max-microvolt = <880000>; 264 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 265 }; 266 267 vreg_l5a_0p8: ldo5 { 268 regulator-min-microvolt = <800000>; 269 regulator-max-microvolt = <800000>; 270 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 271 }; 272 273 vreg_l12a_1p8: ldo12 { 274 regulator-min-microvolt = <1800000>; 275 regulator-max-microvolt = <1800000>; 276 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 277 }; 278 279 vreg_l7a_1p8: ldo7 { 280 regulator-min-microvolt = <1800000>; 281 regulator-max-microvolt = <1800000>; 282 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 283 }; 284 285 vreg_l13a_2p95: ldo13 { 286 regulator-min-microvolt = <1800000>; 287 regulator-max-microvolt = <2960000>; 288 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 289 }; 290 291 vreg_l17a_1p3: ldo17 { 292 regulator-min-microvolt = <1304000>; 293 regulator-max-microvolt = <1304000>; 294 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 295 }; 296 297 vreg_l20a_2p95: ldo20 { 298 regulator-min-microvolt = <2960000>; 299 regulator-max-microvolt = <2968000>; 300 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 301 }; 302 303 vreg_l21a_2p95: ldo21 { 304 regulator-min-microvolt = <2960000>; 305 regulator-max-microvolt = <2968000>; 306 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 307 }; 308 309 vreg_l24a_3p075: ldo24 { 310 regulator-min-microvolt = <3088000>; 311 regulator-max-microvolt = <3088000>; 312 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 313 }; 314 315 vreg_l25a_3p3: ldo25 { 316 regulator-min-microvolt = <3300000>; 317 regulator-max-microvolt = <3312000>; 318 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 319 }; 320 321 vreg_l26a_1p2: ldo26 { 322 regulator-min-microvolt = <1200000>; 323 regulator-max-microvolt = <1200000>; 324 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 325 }; 326 }; 327 328 pmi8998-rpmh-regulators { 329 compatible = "qcom,pmi8998-rpmh-regulators"; 330 qcom,pmic-id = "b"; 331 332 vdd-bob-supply = <&vph_pwr>; 333 334 vreg_bob: bob { 335 regulator-min-microvolt = <3312000>; 336 regulator-max-microvolt = <3600000>; 337 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; 338 regulator-allow-bypass; 339 }; 340 }; 341}; 342 343&cdsp_pas { 344 status = "okay"; 345 firmware-name = "qcom/sdm845/cdsp.mdt"; 346}; 347 348&dsi0 { 349 status = "okay"; 350 vdda-supply = <&vreg_l26a_1p2>; 351 352#if 0 353 qcom,dual-dsi-mode; 354 qcom,master-dsi; 355#endif 356 357 ports { 358 port@1 { 359 endpoint { 360 remote-endpoint = <<9611_a>; 361 data-lanes = <0 1 2 3>; 362 }; 363 }; 364 }; 365}; 366 367&dsi0_phy { 368 status = "okay"; 369 vdds-supply = <&vreg_l1a_0p875>; 370}; 371 372#if 0 373&dsi1 { 374 status = "okay"; 375 vdda-supply = <&vreg_l26a_1p2>; 376 377 qcom,dual-dsi-mode; 378 379 ports { 380 port@1 { 381 endpoint { 382 remote-endpoint = <<9611_b>; 383 data-lanes = <0 1 2 3>; 384 }; 385 }; 386 }; 387}; 388 389&dsi1_phy { 390 status = "okay"; 391 vdds-supply = <&vreg_l1a_0p875>; 392}; 393#endif 394 395&gcc { 396 protected-clocks = <GCC_QSPI_CORE_CLK>, 397 <GCC_QSPI_CORE_CLK_SRC>, 398 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, 399 <GCC_LPASS_Q6_AXI_CLK>, 400 <GCC_LPASS_SWAY_CLK>; 401}; 402 403&pcie0 { 404 status = "okay"; 405 perst-gpio = <&tlmm 35 GPIO_ACTIVE_LOW>; 406 enable-gpio = <&tlmm 134 GPIO_ACTIVE_HIGH>; 407 408 vddpe-3v3-supply = <&pcie0_3p3v_dual>; 409 410 pinctrl-names = "default"; 411 pinctrl-0 = <&pcie0_default_state>; 412}; 413 414&pcie0_phy { 415 status = "okay"; 416 417 vdda-phy-supply = <&vreg_l1a_0p875>; 418 vdda-pll-supply = <&vreg_l26a_1p2>; 419}; 420 421&pcie1 { 422 status = "okay"; 423 perst-gpio = <&tlmm 102 GPIO_ACTIVE_LOW>; 424 425 pinctrl-names = "default"; 426 pinctrl-0 = <&pcie1_default_state>; 427}; 428 429&pcie1_phy { 430 status = "okay"; 431 432 vdda-phy-supply = <&vreg_l1a_0p875>; 433 vdda-pll-supply = <&vreg_l26a_1p2>; 434}; 435 436&i2c10 { 437 status = "okay"; 438 clock-frequency = <400000>; 439 440 hdmi-bridge@3b { 441 compatible = "lt,lt9611"; 442 reg = <0x3b>; 443 444 interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>; 445 446 reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>; 447 448 vdd-supply = <<9611_1v8>; 449 vcc-supply = <<9611_3v3>; 450 451 pinctrl-names = "default"; 452 pinctrl-0 = <<9611_irq_pin>, <&dsi_sw_sel>; 453 454 ports { 455 #address-cells = <1>; 456 #size-cells = <0>; 457 458 port@0 { 459 reg = <0>; 460 461 lt9611_out: endpoint { 462 remote-endpoint = <&hdmi_con>; 463 }; 464 }; 465 466 port@1 { 467 reg = <1>; 468 469 lt9611_a: endpoint { 470 remote-endpoint = <&dsi0_out>; 471 }; 472 }; 473 474#if 0 475 port@2 { 476 reg = <2>; 477 478 lt9611_b: endpoint { 479 remote-endpoint = <&dsi1_out>; 480 }; 481 }; 482#endif 483 }; 484 }; 485}; 486 487&i2c11 { 488 /* On Low speed expansion */ 489 label = "LS-I2C1"; 490 status = "okay"; 491}; 492 493&i2c14 { 494 /* On Low speed expansion */ 495 label = "LS-I2C0"; 496 status = "okay"; 497}; 498 499&spi2 { 500 /* On Low speed expansion */ 501 label = "LS-SPI0"; 502 status = "okay"; 503}; 504 505&mdss { 506 status = "okay"; 507}; 508 509&mdss_mdp { 510 status = "okay"; 511}; 512 513&mss_pil { 514 status = "okay"; 515 firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn"; 516}; 517 518&pm8998_gpio { 519 vol_up_pin_a: vol-up-active { 520 pins = "gpio6"; 521 function = "normal"; 522 input-enable; 523 bias-pull-up; 524 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>; 525 }; 526}; 527 528&pm8998_pon { 529 resin { 530 compatible = "qcom,pm8941-resin"; 531 interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>; 532 debounce = <15625>; 533 bias-pull-up; 534 linux,code = <KEY_VOLUMEDOWN>; 535 }; 536}; 537 538&qupv3_id_0 { 539 status = "okay"; 540}; 541 542&qupv3_id_1 { 543 status = "okay"; 544}; 545 546&sdhc_2 { 547 status = "okay"; 548 549 pinctrl-names = "default"; 550 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>; 551 552 vmmc-supply = <&vreg_l21a_2p95>; 553 vqmmc-supply = <&vreg_l13a_2p95>; 554 555 bus-width = <4>; 556 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>; 557}; 558 559&tlmm { 560 pcie0_default_state: pcie0-default { 561 clkreq { 562 pins = "gpio36"; 563 function = "pci_e0"; 564 bias-pull-up; 565 }; 566 567 reset-n { 568 pins = "gpio35"; 569 function = "gpio"; 570 571 drive-strength = <2>; 572 output-low; 573 bias-pull-down; 574 }; 575 576 wake-n { 577 pins = "gpio37"; 578 function = "gpio"; 579 580 drive-strength = <2>; 581 bias-pull-up; 582 }; 583 }; 584 585 lt9611_irq_pin: lt9611-irq { 586 pins = "gpio84"; 587 function = "gpio"; 588 bias-disable; 589 }; 590 591 pcie0_pwren_state: pcie0-pwren { 592 pins = "gpio90"; 593 function = "gpio"; 594 595 drive-strength = <2>; 596 bias-disable; 597 }; 598 599 pcie1_default_state: pcie1-default { 600 perst-n { 601 pins = "gpio102"; 602 function = "gpio"; 603 604 drive-strength = <16>; 605 bias-disable; 606 }; 607 608 clkreq { 609 pins = "gpio103"; 610 function = "pci_e1"; 611 bias-pull-up; 612 }; 613 614 wake-n { 615 pins = "gpio11"; 616 function = "gpio"; 617 618 drive-strength = <2>; 619 bias-pull-up; 620 }; 621 622 reset-n { 623 pins = "gpio75"; 624 function = "gpio"; 625 626 drive-strength = <16>; 627 bias-pull-up; 628 output-high; 629 }; 630 }; 631 632 sdc2_default_state: sdc2-default { 633 clk { 634 pins = "sdc2_clk"; 635 bias-disable; 636 637 /* 638 * It seems that mmc_test reports errors if drive 639 * strength is not 16 on clk, cmd, and data pins. 640 */ 641 drive-strength = <16>; 642 }; 643 644 cmd { 645 pins = "sdc2_cmd"; 646 bias-pull-up; 647 drive-strength = <10>; 648 }; 649 650 data { 651 pins = "sdc2_data"; 652 bias-pull-up; 653 drive-strength = <10>; 654 }; 655 }; 656 657 sdc2_card_det_n: sd-card-det-n { 658 pins = "gpio126"; 659 function = "gpio"; 660 bias-pull-up; 661 }; 662 663 dsi_sw_sel: dsi-sw-sel { 664 pins = "gpio120"; 665 function = "gpio"; 666 667 drive-strength = <2>; 668 bias-disable; 669 output-high; 670 }; 671}; 672 673&uart3 { 674 label = "LS-UART0"; 675 status = "disabled"; 676}; 677 678&uart6 { 679 status = "okay"; 680 681 bluetooth { 682 compatible = "qcom,wcn3990-bt"; 683 684 vddio-supply = <&vreg_s4a_1p8>; 685 vddxo-supply = <&vreg_l7a_1p8>; 686 vddrf-supply = <&vreg_l17a_1p3>; 687 vddch0-supply = <&vreg_l25a_3p3>; 688 max-speed = <3200000>; 689 }; 690}; 691 692&uart9 { 693 label = "LS-UART1"; 694 status = "okay"; 695}; 696 697&usb_1 { 698 status = "okay"; 699}; 700 701&usb_1_dwc3 { 702 dr_mode = "peripheral"; 703}; 704 705&usb_1_hsphy { 706 status = "okay"; 707 708 vdd-supply = <&vreg_l1a_0p875>; 709 vdda-pll-supply = <&vreg_l12a_1p8>; 710 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; 711 712 qcom,imp-res-offset-value = <8>; 713 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>; 714 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>; 715 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>; 716}; 717 718&usb_1_qmpphy { 719 status = "okay"; 720 721 vdda-phy-supply = <&vreg_l26a_1p2>; 722 vdda-pll-supply = <&vreg_l1a_0p875>; 723}; 724 725&usb_2 { 726 status = "okay"; 727}; 728 729&usb_2_dwc3 { 730 dr_mode = "host"; 731}; 732 733&usb_2_hsphy { 734 status = "okay"; 735 736 vdd-supply = <&vreg_l1a_0p875>; 737 vdda-pll-supply = <&vreg_l12a_1p8>; 738 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; 739 740 qcom,imp-res-offset-value = <8>; 741 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>; 742}; 743 744&usb_2_qmpphy { 745 status = "okay"; 746 747 vdda-phy-supply = <&vreg_l26a_1p2>; 748 vdda-pll-supply = <&vreg_l1a_0p875>; 749}; 750 751&ufs_mem_hc { 752 status = "okay"; 753 754 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>; 755 756 vcc-supply = <&vreg_l20a_2p95>; 757 vcc-max-microamp = <800000>; 758}; 759 760&ufs_mem_phy { 761 status = "okay"; 762 763 vdda-phy-supply = <&vreg_l1a_0p875>; 764 vdda-pll-supply = <&vreg_l26a_1p2>; 765}; 766 767&wifi { 768 status = "okay"; 769 770 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>; 771 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 772 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; 773 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; 774 775 qcom,snoc-host-cap-8bit-quirk; 776}; 777 778/* PINCTRL - additions to nodes defined in sdm845.dtsi */ 779&qup_spi2_default { 780 drive-strength = <16>; 781}; 782 783&qup_uart3_default{ 784 pinmux { 785 pins = "gpio41", "gpio42", "gpio43", "gpio44"; 786 function = "qup3"; 787 }; 788}; 789 790&qup_i2c10_default { 791 pinconf { 792 pins = "gpio55", "gpio56"; 793 drive-strength = <2>; 794 bias-disable; 795 }; 796}; 797 798&qup_uart6_default { 799 pinmux { 800 pins = "gpio45", "gpio46", "gpio47", "gpio48"; 801 function = "qup6"; 802 }; 803 804 cts { 805 pins = "gpio45"; 806 bias-disable; 807 }; 808 809 rts-tx { 810 pins = "gpio46", "gpio47"; 811 drive-strength = <2>; 812 bias-disable; 813 }; 814 815 rx { 816 pins = "gpio48"; 817 bias-pull-up; 818 }; 819}; 820 821&qup_uart9_default { 822 pinconf-tx { 823 pins = "gpio4"; 824 drive-strength = <2>; 825 bias-disable; 826 }; 827 828 pinconf-rx { 829 pins = "gpio5"; 830 drive-strength = <2>; 831 bias-pull-up; 832 }; 833}; 834