1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the RZ/G2[MN] HiHope sub board common parts 4 * 5 * Copyright (C) 2019 Renesas Electronics Corp. 6 */ 7 8/ { 9 aliases { 10 ethernet0 = &avb; 11 }; 12 13 chosen { 14 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; 15 }; 16}; 17 18&avb { 19 pinctrl-0 = <&avb_pins>; 20 pinctrl-names = "default"; 21 phy-handle = <&phy0>; 22 phy-mode = "rgmii-txid"; 23 status = "okay"; 24 25 phy0: ethernet-phy@0 { 26 reg = <0>; 27 interrupt-parent = <&gpio2>; 28 interrupts = <11 IRQ_TYPE_LEVEL_LOW>; 29 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; 30 }; 31}; 32 33&can0 { 34 pinctrl-0 = <&can0_pins>; 35 pinctrl-names = "default"; 36 status = "okay"; 37}; 38 39&can1 { 40 pinctrl-0 = <&can1_pins>; 41 pinctrl-names = "default"; 42 status = "okay"; 43}; 44 45&pciec0 { 46 status = "okay"; 47}; 48 49&pciec1 { 50 status = "okay"; 51}; 52 53&pfc { 54 pinctrl-0 = <&scif_clk_pins>; 55 pinctrl-names = "default"; 56 57 avb_pins: avb { 58 mux { 59 groups = "avb_link", "avb_mdio", "avb_mii"; 60 function = "avb"; 61 }; 62 63 pins_mdio { 64 groups = "avb_mdio"; 65 drive-strength = <24>; 66 }; 67 68 pins_mii_tx { 69 pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0", 70 "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3"; 71 drive-strength = <12>; 72 }; 73 }; 74 75 can0_pins: can0 { 76 groups = "can0_data_a"; 77 function = "can0"; 78 }; 79 80 can1_pins: can1 { 81 groups = "can1_data"; 82 function = "can1"; 83 }; 84}; 85