1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car E3 (R8A77990) SoC 4 * 5 * Copyright (C) 2018-2019 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a77990-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a77990-sysc.h> 11 12/ { 13 compatible = "renesas,r8a77990"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 aliases { 18 i2c0 = &i2c0; 19 i2c1 = &i2c1; 20 i2c2 = &i2c2; 21 i2c3 = &i2c3; 22 i2c4 = &i2c4; 23 i2c5 = &i2c5; 24 i2c6 = &i2c6; 25 i2c7 = &i2c7; 26 }; 27 28 /* 29 * The external audio clocks are configured as 0 Hz fixed frequency 30 * clocks by default. 31 * Boards that provide audio clocks should override them. 32 */ 33 audio_clk_a: audio_clk_a { 34 compatible = "fixed-clock"; 35 #clock-cells = <0>; 36 clock-frequency = <0>; 37 }; 38 39 audio_clk_b: audio_clk_b { 40 compatible = "fixed-clock"; 41 #clock-cells = <0>; 42 clock-frequency = <0>; 43 }; 44 45 audio_clk_c: audio_clk_c { 46 compatible = "fixed-clock"; 47 #clock-cells = <0>; 48 clock-frequency = <0>; 49 }; 50 51 /* External CAN clock - to be overridden by boards that provide it */ 52 can_clk: can { 53 compatible = "fixed-clock"; 54 #clock-cells = <0>; 55 clock-frequency = <0>; 56 }; 57 58 cluster1_opp: opp_table10 { 59 compatible = "operating-points-v2"; 60 opp-shared; 61 opp-800000000 { 62 opp-hz = /bits/ 64 <800000000>; 63 clock-latency-ns = <300000>; 64 }; 65 opp-1000000000 { 66 opp-hz = /bits/ 64 <1000000000>; 67 clock-latency-ns = <300000>; 68 }; 69 opp-1200000000 { 70 opp-hz = /bits/ 64 <1200000000>; 71 clock-latency-ns = <300000>; 72 opp-suspend; 73 }; 74 }; 75 76 cpus { 77 #address-cells = <1>; 78 #size-cells = <0>; 79 80 a53_0: cpu@0 { 81 compatible = "arm,cortex-a53"; 82 reg = <0>; 83 device_type = "cpu"; 84 #cooling-cells = <2>; 85 power-domains = <&sysc R8A77990_PD_CA53_CPU0>; 86 next-level-cache = <&L2_CA53>; 87 enable-method = "psci"; 88 dynamic-power-coefficient = <277>; 89 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>; 90 operating-points-v2 = <&cluster1_opp>; 91 }; 92 93 a53_1: cpu@1 { 94 compatible = "arm,cortex-a53"; 95 reg = <1>; 96 device_type = "cpu"; 97 power-domains = <&sysc R8A77990_PD_CA53_CPU1>; 98 next-level-cache = <&L2_CA53>; 99 enable-method = "psci"; 100 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>; 101 operating-points-v2 = <&cluster1_opp>; 102 }; 103 104 L2_CA53: cache-controller-0 { 105 compatible = "cache"; 106 power-domains = <&sysc R8A77990_PD_CA53_SCU>; 107 cache-unified; 108 cache-level = <2>; 109 }; 110 }; 111 112 extal_clk: extal { 113 compatible = "fixed-clock"; 114 #clock-cells = <0>; 115 /* This value must be overridden by the board */ 116 clock-frequency = <0>; 117 }; 118 119 /* External PCIe clock - can be overridden by the board */ 120 pcie_bus_clk: pcie_bus { 121 compatible = "fixed-clock"; 122 #clock-cells = <0>; 123 clock-frequency = <0>; 124 }; 125 126 pmu_a53 { 127 compatible = "arm,cortex-a53-pmu"; 128 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 129 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 130 interrupt-affinity = <&a53_0>, <&a53_1>; 131 }; 132 133 psci { 134 compatible = "arm,psci-1.0", "arm,psci-0.2"; 135 method = "smc"; 136 }; 137 138 /* External SCIF clock - to be overridden by boards that provide it */ 139 scif_clk: scif { 140 compatible = "fixed-clock"; 141 #clock-cells = <0>; 142 clock-frequency = <0>; 143 }; 144 145 soc: soc { 146 compatible = "simple-bus"; 147 interrupt-parent = <&gic>; 148 #address-cells = <2>; 149 #size-cells = <2>; 150 ranges; 151 152 rwdt: watchdog@e6020000 { 153 compatible = "renesas,r8a77990-wdt", 154 "renesas,rcar-gen3-wdt"; 155 reg = <0 0xe6020000 0 0x0c>; 156 clocks = <&cpg CPG_MOD 402>; 157 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 158 resets = <&cpg 402>; 159 status = "disabled"; 160 }; 161 162 gpio0: gpio@e6050000 { 163 compatible = "renesas,gpio-r8a77990", 164 "renesas,rcar-gen3-gpio"; 165 reg = <0 0xe6050000 0 0x50>; 166 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 167 #gpio-cells = <2>; 168 gpio-controller; 169 gpio-ranges = <&pfc 0 0 18>; 170 #interrupt-cells = <2>; 171 interrupt-controller; 172 clocks = <&cpg CPG_MOD 912>; 173 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 174 resets = <&cpg 912>; 175 }; 176 177 gpio1: gpio@e6051000 { 178 compatible = "renesas,gpio-r8a77990", 179 "renesas,rcar-gen3-gpio"; 180 reg = <0 0xe6051000 0 0x50>; 181 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 182 #gpio-cells = <2>; 183 gpio-controller; 184 gpio-ranges = <&pfc 0 32 23>; 185 #interrupt-cells = <2>; 186 interrupt-controller; 187 clocks = <&cpg CPG_MOD 911>; 188 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 189 resets = <&cpg 911>; 190 }; 191 192 gpio2: gpio@e6052000 { 193 compatible = "renesas,gpio-r8a77990", 194 "renesas,rcar-gen3-gpio"; 195 reg = <0 0xe6052000 0 0x50>; 196 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 197 #gpio-cells = <2>; 198 gpio-controller; 199 gpio-ranges = <&pfc 0 64 26>; 200 #interrupt-cells = <2>; 201 interrupt-controller; 202 clocks = <&cpg CPG_MOD 910>; 203 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 204 resets = <&cpg 910>; 205 }; 206 207 gpio3: gpio@e6053000 { 208 compatible = "renesas,gpio-r8a77990", 209 "renesas,rcar-gen3-gpio"; 210 reg = <0 0xe6053000 0 0x50>; 211 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 212 #gpio-cells = <2>; 213 gpio-controller; 214 gpio-ranges = <&pfc 0 96 16>; 215 #interrupt-cells = <2>; 216 interrupt-controller; 217 clocks = <&cpg CPG_MOD 909>; 218 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 219 resets = <&cpg 909>; 220 }; 221 222 gpio4: gpio@e6054000 { 223 compatible = "renesas,gpio-r8a77990", 224 "renesas,rcar-gen3-gpio"; 225 reg = <0 0xe6054000 0 0x50>; 226 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 227 #gpio-cells = <2>; 228 gpio-controller; 229 gpio-ranges = <&pfc 0 128 11>; 230 #interrupt-cells = <2>; 231 interrupt-controller; 232 clocks = <&cpg CPG_MOD 908>; 233 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 234 resets = <&cpg 908>; 235 }; 236 237 gpio5: gpio@e6055000 { 238 compatible = "renesas,gpio-r8a77990", 239 "renesas,rcar-gen3-gpio"; 240 reg = <0 0xe6055000 0 0x50>; 241 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 242 #gpio-cells = <2>; 243 gpio-controller; 244 gpio-ranges = <&pfc 0 160 20>; 245 #interrupt-cells = <2>; 246 interrupt-controller; 247 clocks = <&cpg CPG_MOD 907>; 248 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 249 resets = <&cpg 907>; 250 }; 251 252 gpio6: gpio@e6055400 { 253 compatible = "renesas,gpio-r8a77990", 254 "renesas,rcar-gen3-gpio"; 255 reg = <0 0xe6055400 0 0x50>; 256 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 257 #gpio-cells = <2>; 258 gpio-controller; 259 gpio-ranges = <&pfc 0 192 18>; 260 #interrupt-cells = <2>; 261 interrupt-controller; 262 clocks = <&cpg CPG_MOD 906>; 263 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 264 resets = <&cpg 906>; 265 }; 266 267 pfc: pin-controller@e6060000 { 268 compatible = "renesas,pfc-r8a77990"; 269 reg = <0 0xe6060000 0 0x508>; 270 }; 271 272 i2c_dvfs: i2c@e60b0000 { 273 #address-cells = <1>; 274 #size-cells = <0>; 275 compatible = "renesas,iic-r8a77990"; 276 reg = <0 0xe60b0000 0 0x15>; 277 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 278 clocks = <&cpg CPG_MOD 926>; 279 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 280 resets = <&cpg 926>; 281 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 282 dma-names = "tx", "rx"; 283 status = "disabled"; 284 }; 285 286 cmt0: timer@e60f0000 { 287 compatible = "renesas,r8a77990-cmt0", 288 "renesas,rcar-gen3-cmt0"; 289 reg = <0 0xe60f0000 0 0x1004>; 290 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 291 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 292 clocks = <&cpg CPG_MOD 303>; 293 clock-names = "fck"; 294 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 295 resets = <&cpg 303>; 296 status = "disabled"; 297 }; 298 299 cmt1: timer@e6130000 { 300 compatible = "renesas,r8a77990-cmt1", 301 "renesas,rcar-gen3-cmt1"; 302 reg = <0 0xe6130000 0 0x1004>; 303 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 304 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 305 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 306 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 307 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 308 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 309 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 310 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 311 clocks = <&cpg CPG_MOD 302>; 312 clock-names = "fck"; 313 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 314 resets = <&cpg 302>; 315 status = "disabled"; 316 }; 317 318 cmt2: timer@e6140000 { 319 compatible = "renesas,r8a77990-cmt1", 320 "renesas,rcar-gen3-cmt1"; 321 reg = <0 0xe6140000 0 0x1004>; 322 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 323 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 324 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 325 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 326 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 327 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 328 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 329 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 330 clocks = <&cpg CPG_MOD 301>; 331 clock-names = "fck"; 332 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 333 resets = <&cpg 301>; 334 status = "disabled"; 335 }; 336 337 cmt3: timer@e6148000 { 338 compatible = "renesas,r8a77990-cmt1", 339 "renesas,rcar-gen3-cmt1"; 340 reg = <0 0xe6148000 0 0x1004>; 341 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 342 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 343 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 344 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 345 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 346 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 347 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 348 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 349 clocks = <&cpg CPG_MOD 300>; 350 clock-names = "fck"; 351 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 352 resets = <&cpg 300>; 353 status = "disabled"; 354 }; 355 356 cpg: clock-controller@e6150000 { 357 compatible = "renesas,r8a77990-cpg-mssr"; 358 reg = <0 0xe6150000 0 0x1000>; 359 clocks = <&extal_clk>; 360 clock-names = "extal"; 361 #clock-cells = <2>; 362 #power-domain-cells = <0>; 363 #reset-cells = <1>; 364 }; 365 366 rst: reset-controller@e6160000 { 367 compatible = "renesas,r8a77990-rst"; 368 reg = <0 0xe6160000 0 0x0200>; 369 }; 370 371 sysc: system-controller@e6180000 { 372 compatible = "renesas,r8a77990-sysc"; 373 reg = <0 0xe6180000 0 0x0400>; 374 #power-domain-cells = <1>; 375 }; 376 377 thermal: thermal@e6190000 { 378 compatible = "renesas,thermal-r8a77990"; 379 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>; 380 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 381 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 382 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 383 clocks = <&cpg CPG_MOD 522>; 384 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 385 resets = <&cpg 522>; 386 #thermal-sensor-cells = <0>; 387 }; 388 389 intc_ex: interrupt-controller@e61c0000 { 390 compatible = "renesas,intc-ex-r8a77990", "renesas,irqc"; 391 #interrupt-cells = <2>; 392 interrupt-controller; 393 reg = <0 0xe61c0000 0 0x200>; 394 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 395 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 396 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH 397 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH 398 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 399 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 400 clocks = <&cpg CPG_MOD 407>; 401 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 402 resets = <&cpg 407>; 403 }; 404 405 i2c0: i2c@e6500000 { 406 #address-cells = <1>; 407 #size-cells = <0>; 408 compatible = "renesas,i2c-r8a77990", 409 "renesas,rcar-gen3-i2c"; 410 reg = <0 0xe6500000 0 0x40>; 411 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 412 clocks = <&cpg CPG_MOD 931>; 413 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 414 resets = <&cpg 931>; 415 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 416 <&dmac2 0x91>, <&dmac2 0x90>; 417 dma-names = "tx", "rx", "tx", "rx"; 418 i2c-scl-internal-delay-ns = <110>; 419 status = "disabled"; 420 }; 421 422 i2c1: i2c@e6508000 { 423 #address-cells = <1>; 424 #size-cells = <0>; 425 compatible = "renesas,i2c-r8a77990", 426 "renesas,rcar-gen3-i2c"; 427 reg = <0 0xe6508000 0 0x40>; 428 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 429 clocks = <&cpg CPG_MOD 930>; 430 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 431 resets = <&cpg 930>; 432 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 433 <&dmac2 0x93>, <&dmac2 0x92>; 434 dma-names = "tx", "rx", "tx", "rx"; 435 i2c-scl-internal-delay-ns = <6>; 436 status = "disabled"; 437 }; 438 439 i2c2: i2c@e6510000 { 440 #address-cells = <1>; 441 #size-cells = <0>; 442 compatible = "renesas,i2c-r8a77990", 443 "renesas,rcar-gen3-i2c"; 444 reg = <0 0xe6510000 0 0x40>; 445 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 446 clocks = <&cpg CPG_MOD 929>; 447 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 448 resets = <&cpg 929>; 449 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 450 <&dmac2 0x95>, <&dmac2 0x94>; 451 dma-names = "tx", "rx", "tx", "rx"; 452 i2c-scl-internal-delay-ns = <6>; 453 status = "disabled"; 454 }; 455 456 i2c3: i2c@e66d0000 { 457 #address-cells = <1>; 458 #size-cells = <0>; 459 compatible = "renesas,i2c-r8a77990", 460 "renesas,rcar-gen3-i2c"; 461 reg = <0 0xe66d0000 0 0x40>; 462 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 463 clocks = <&cpg CPG_MOD 928>; 464 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 465 resets = <&cpg 928>; 466 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 467 dma-names = "tx", "rx"; 468 i2c-scl-internal-delay-ns = <110>; 469 status = "disabled"; 470 }; 471 472 i2c4: i2c@e66d8000 { 473 #address-cells = <1>; 474 #size-cells = <0>; 475 compatible = "renesas,i2c-r8a77990", 476 "renesas,rcar-gen3-i2c"; 477 reg = <0 0xe66d8000 0 0x40>; 478 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 479 clocks = <&cpg CPG_MOD 927>; 480 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 481 resets = <&cpg 927>; 482 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 483 dma-names = "tx", "rx"; 484 i2c-scl-internal-delay-ns = <6>; 485 status = "disabled"; 486 }; 487 488 i2c5: i2c@e66e0000 { 489 #address-cells = <1>; 490 #size-cells = <0>; 491 compatible = "renesas,i2c-r8a77990", 492 "renesas,rcar-gen3-i2c"; 493 reg = <0 0xe66e0000 0 0x40>; 494 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 495 clocks = <&cpg CPG_MOD 919>; 496 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 497 resets = <&cpg 919>; 498 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 499 dma-names = "tx", "rx"; 500 i2c-scl-internal-delay-ns = <6>; 501 status = "disabled"; 502 }; 503 504 i2c6: i2c@e66e8000 { 505 #address-cells = <1>; 506 #size-cells = <0>; 507 compatible = "renesas,i2c-r8a77990", 508 "renesas,rcar-gen3-i2c"; 509 reg = <0 0xe66e8000 0 0x40>; 510 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 511 clocks = <&cpg CPG_MOD 918>; 512 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 513 resets = <&cpg 918>; 514 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 515 dma-names = "tx", "rx"; 516 i2c-scl-internal-delay-ns = <6>; 517 status = "disabled"; 518 }; 519 520 i2c7: i2c@e6690000 { 521 #address-cells = <1>; 522 #size-cells = <0>; 523 compatible = "renesas,i2c-r8a77990", 524 "renesas,rcar-gen3-i2c"; 525 reg = <0 0xe6690000 0 0x40>; 526 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 527 clocks = <&cpg CPG_MOD 1003>; 528 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 529 resets = <&cpg 1003>; 530 i2c-scl-internal-delay-ns = <6>; 531 status = "disabled"; 532 }; 533 534 hscif0: serial@e6540000 { 535 compatible = "renesas,hscif-r8a77990", 536 "renesas,rcar-gen3-hscif", 537 "renesas,hscif"; 538 reg = <0 0xe6540000 0 0x60>; 539 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 540 clocks = <&cpg CPG_MOD 520>, 541 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 542 <&scif_clk>; 543 clock-names = "fck", "brg_int", "scif_clk"; 544 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 545 <&dmac2 0x31>, <&dmac2 0x30>; 546 dma-names = "tx", "rx", "tx", "rx"; 547 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 548 resets = <&cpg 520>; 549 status = "disabled"; 550 }; 551 552 hscif1: serial@e6550000 { 553 compatible = "renesas,hscif-r8a77990", 554 "renesas,rcar-gen3-hscif", 555 "renesas,hscif"; 556 reg = <0 0xe6550000 0 0x60>; 557 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 558 clocks = <&cpg CPG_MOD 519>, 559 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 560 <&scif_clk>; 561 clock-names = "fck", "brg_int", "scif_clk"; 562 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 563 <&dmac2 0x33>, <&dmac2 0x32>; 564 dma-names = "tx", "rx", "tx", "rx"; 565 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 566 resets = <&cpg 519>; 567 status = "disabled"; 568 }; 569 570 hscif2: serial@e6560000 { 571 compatible = "renesas,hscif-r8a77990", 572 "renesas,rcar-gen3-hscif", 573 "renesas,hscif"; 574 reg = <0 0xe6560000 0 0x60>; 575 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 576 clocks = <&cpg CPG_MOD 518>, 577 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 578 <&scif_clk>; 579 clock-names = "fck", "brg_int", "scif_clk"; 580 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 581 <&dmac2 0x35>, <&dmac2 0x34>; 582 dma-names = "tx", "rx", "tx", "rx"; 583 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 584 resets = <&cpg 518>; 585 status = "disabled"; 586 }; 587 588 hscif3: serial@e66a0000 { 589 compatible = "renesas,hscif-r8a77990", 590 "renesas,rcar-gen3-hscif", 591 "renesas,hscif"; 592 reg = <0 0xe66a0000 0 0x60>; 593 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 594 clocks = <&cpg CPG_MOD 517>, 595 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 596 <&scif_clk>; 597 clock-names = "fck", "brg_int", "scif_clk"; 598 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 599 dma-names = "tx", "rx"; 600 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 601 resets = <&cpg 517>; 602 status = "disabled"; 603 }; 604 605 hscif4: serial@e66b0000 { 606 compatible = "renesas,hscif-r8a77990", 607 "renesas,rcar-gen3-hscif", 608 "renesas,hscif"; 609 reg = <0 0xe66b0000 0 0x60>; 610 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 611 clocks = <&cpg CPG_MOD 516>, 612 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 613 <&scif_clk>; 614 clock-names = "fck", "brg_int", "scif_clk"; 615 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 616 dma-names = "tx", "rx"; 617 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 618 resets = <&cpg 516>; 619 status = "disabled"; 620 }; 621 622 hsusb: usb@e6590000 { 623 compatible = "renesas,usbhs-r8a77990", 624 "renesas,rcar-gen3-usbhs"; 625 reg = <0 0xe6590000 0 0x200>; 626 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 627 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 628 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 629 <&usb_dmac1 0>, <&usb_dmac1 1>; 630 dma-names = "ch0", "ch1", "ch2", "ch3"; 631 renesas,buswait = <11>; 632 phys = <&usb2_phy0 3>; 633 phy-names = "usb"; 634 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 635 resets = <&cpg 704>, <&cpg 703>; 636 status = "disabled"; 637 }; 638 639 usb_dmac0: dma-controller@e65a0000 { 640 compatible = "renesas,r8a77990-usb-dmac", 641 "renesas,usb-dmac"; 642 reg = <0 0xe65a0000 0 0x100>; 643 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 644 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 645 interrupt-names = "ch0", "ch1"; 646 clocks = <&cpg CPG_MOD 330>; 647 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 648 resets = <&cpg 330>; 649 #dma-cells = <1>; 650 dma-channels = <2>; 651 }; 652 653 usb_dmac1: dma-controller@e65b0000 { 654 compatible = "renesas,r8a77990-usb-dmac", 655 "renesas,usb-dmac"; 656 reg = <0 0xe65b0000 0 0x100>; 657 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 658 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 659 interrupt-names = "ch0", "ch1"; 660 clocks = <&cpg CPG_MOD 331>; 661 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 662 resets = <&cpg 331>; 663 #dma-cells = <1>; 664 dma-channels = <2>; 665 }; 666 667 dmac0: dma-controller@e6700000 { 668 compatible = "renesas,dmac-r8a77990", 669 "renesas,rcar-dmac"; 670 reg = <0 0xe6700000 0 0x10000>; 671 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH 672 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 673 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH 674 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 675 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 676 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 677 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 678 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 679 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 680 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 681 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 682 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH 683 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH 684 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 685 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH 686 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH 687 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 688 interrupt-names = "error", 689 "ch0", "ch1", "ch2", "ch3", 690 "ch4", "ch5", "ch6", "ch7", 691 "ch8", "ch9", "ch10", "ch11", 692 "ch12", "ch13", "ch14", "ch15"; 693 clocks = <&cpg CPG_MOD 219>; 694 clock-names = "fck"; 695 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 696 resets = <&cpg 219>; 697 #dma-cells = <1>; 698 dma-channels = <16>; 699 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 700 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 701 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 702 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 703 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 704 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 705 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 706 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 707 }; 708 709 dmac1: dma-controller@e7300000 { 710 compatible = "renesas,dmac-r8a77990", 711 "renesas,rcar-dmac"; 712 reg = <0 0xe7300000 0 0x10000>; 713 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 714 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 715 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH 716 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 717 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 718 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 719 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 720 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH 721 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 722 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 723 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 724 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 725 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 726 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 727 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 728 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH 729 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 730 interrupt-names = "error", 731 "ch0", "ch1", "ch2", "ch3", 732 "ch4", "ch5", "ch6", "ch7", 733 "ch8", "ch9", "ch10", "ch11", 734 "ch12", "ch13", "ch14", "ch15"; 735 clocks = <&cpg CPG_MOD 218>; 736 clock-names = "fck"; 737 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 738 resets = <&cpg 218>; 739 #dma-cells = <1>; 740 dma-channels = <16>; 741 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 742 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 743 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 744 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 745 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 746 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 747 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 748 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 749 }; 750 751 dmac2: dma-controller@e7310000 { 752 compatible = "renesas,dmac-r8a77990", 753 "renesas,rcar-dmac"; 754 reg = <0 0xe7310000 0 0x10000>; 755 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH 756 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH 757 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH 758 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH 759 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH 760 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH 761 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH 762 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH 763 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH 764 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 765 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 766 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH 767 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH 768 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH 769 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH 770 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH 771 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 772 interrupt-names = "error", 773 "ch0", "ch1", "ch2", "ch3", 774 "ch4", "ch5", "ch6", "ch7", 775 "ch8", "ch9", "ch10", "ch11", 776 "ch12", "ch13", "ch14", "ch15"; 777 clocks = <&cpg CPG_MOD 217>; 778 clock-names = "fck"; 779 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 780 resets = <&cpg 217>; 781 #dma-cells = <1>; 782 dma-channels = <16>; 783 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 784 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 785 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 786 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 787 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 788 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 789 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 790 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 791 }; 792 793 ipmmu_ds0: mmu@e6740000 { 794 compatible = "renesas,ipmmu-r8a77990"; 795 reg = <0 0xe6740000 0 0x1000>; 796 renesas,ipmmu-main = <&ipmmu_mm 0>; 797 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 798 #iommu-cells = <1>; 799 }; 800 801 ipmmu_ds1: mmu@e7740000 { 802 compatible = "renesas,ipmmu-r8a77990"; 803 reg = <0 0xe7740000 0 0x1000>; 804 renesas,ipmmu-main = <&ipmmu_mm 1>; 805 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 806 #iommu-cells = <1>; 807 }; 808 809 ipmmu_hc: mmu@e6570000 { 810 compatible = "renesas,ipmmu-r8a77990"; 811 reg = <0 0xe6570000 0 0x1000>; 812 renesas,ipmmu-main = <&ipmmu_mm 2>; 813 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 814 #iommu-cells = <1>; 815 }; 816 817 ipmmu_mm: mmu@e67b0000 { 818 compatible = "renesas,ipmmu-r8a77990"; 819 reg = <0 0xe67b0000 0 0x1000>; 820 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 821 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 822 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 823 #iommu-cells = <1>; 824 }; 825 826 ipmmu_mp: mmu@ec670000 { 827 compatible = "renesas,ipmmu-r8a77990"; 828 reg = <0 0xec670000 0 0x1000>; 829 renesas,ipmmu-main = <&ipmmu_mm 4>; 830 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 831 #iommu-cells = <1>; 832 }; 833 834 ipmmu_pv0: mmu@fd800000 { 835 compatible = "renesas,ipmmu-r8a77990"; 836 reg = <0 0xfd800000 0 0x1000>; 837 renesas,ipmmu-main = <&ipmmu_mm 6>; 838 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 839 #iommu-cells = <1>; 840 }; 841 842 ipmmu_rt: mmu@ffc80000 { 843 compatible = "renesas,ipmmu-r8a77990"; 844 reg = <0 0xffc80000 0 0x1000>; 845 renesas,ipmmu-main = <&ipmmu_mm 10>; 846 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 847 #iommu-cells = <1>; 848 }; 849 850 ipmmu_vc0: mmu@fe6b0000 { 851 compatible = "renesas,ipmmu-r8a77990"; 852 reg = <0 0xfe6b0000 0 0x1000>; 853 renesas,ipmmu-main = <&ipmmu_mm 12>; 854 power-domains = <&sysc R8A77990_PD_A3VC>; 855 #iommu-cells = <1>; 856 }; 857 858 ipmmu_vi0: mmu@febd0000 { 859 compatible = "renesas,ipmmu-r8a77990"; 860 reg = <0 0xfebd0000 0 0x1000>; 861 renesas,ipmmu-main = <&ipmmu_mm 14>; 862 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 863 #iommu-cells = <1>; 864 }; 865 866 ipmmu_vp0: mmu@fe990000 { 867 compatible = "renesas,ipmmu-r8a77990"; 868 reg = <0 0xfe990000 0 0x1000>; 869 renesas,ipmmu-main = <&ipmmu_mm 16>; 870 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 871 #iommu-cells = <1>; 872 }; 873 874 avb: ethernet@e6800000 { 875 compatible = "renesas,etheravb-r8a77990", 876 "renesas,etheravb-rcar-gen3"; 877 reg = <0 0xe6800000 0 0x800>; 878 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 879 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 880 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 881 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 882 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 883 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 884 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 885 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 886 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 887 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 888 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 889 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 890 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 891 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 892 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 893 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 894 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 895 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 896 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 897 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 898 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 899 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 900 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 901 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 902 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 903 interrupt-names = "ch0", "ch1", "ch2", "ch3", 904 "ch4", "ch5", "ch6", "ch7", 905 "ch8", "ch9", "ch10", "ch11", 906 "ch12", "ch13", "ch14", "ch15", 907 "ch16", "ch17", "ch18", "ch19", 908 "ch20", "ch21", "ch22", "ch23", 909 "ch24"; 910 clocks = <&cpg CPG_MOD 812>; 911 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 912 resets = <&cpg 812>; 913 phy-mode = "rgmii"; 914 iommus = <&ipmmu_ds0 16>; 915 #address-cells = <1>; 916 #size-cells = <0>; 917 status = "disabled"; 918 }; 919 920 can0: can@e6c30000 { 921 compatible = "renesas,can-r8a77990", 922 "renesas,rcar-gen3-can"; 923 reg = <0 0xe6c30000 0 0x1000>; 924 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 925 clocks = <&cpg CPG_MOD 916>, 926 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 927 <&can_clk>; 928 clock-names = "clkp1", "clkp2", "can_clk"; 929 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 930 assigned-clock-rates = <40000000>; 931 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 932 resets = <&cpg 916>; 933 status = "disabled"; 934 }; 935 936 can1: can@e6c38000 { 937 compatible = "renesas,can-r8a77990", 938 "renesas,rcar-gen3-can"; 939 reg = <0 0xe6c38000 0 0x1000>; 940 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 941 clocks = <&cpg CPG_MOD 915>, 942 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 943 <&can_clk>; 944 clock-names = "clkp1", "clkp2", "can_clk"; 945 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 946 assigned-clock-rates = <40000000>; 947 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 948 resets = <&cpg 915>; 949 status = "disabled"; 950 }; 951 952 canfd: can@e66c0000 { 953 compatible = "renesas,r8a77990-canfd", 954 "renesas,rcar-gen3-canfd"; 955 reg = <0 0xe66c0000 0 0x8000>; 956 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 957 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 958 clocks = <&cpg CPG_MOD 914>, 959 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 960 <&can_clk>; 961 clock-names = "fck", "canfd", "can_clk"; 962 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 963 assigned-clock-rates = <40000000>; 964 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 965 resets = <&cpg 914>; 966 status = "disabled"; 967 968 channel0 { 969 status = "disabled"; 970 }; 971 972 channel1 { 973 status = "disabled"; 974 }; 975 }; 976 977 pwm0: pwm@e6e30000 { 978 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 979 reg = <0 0xe6e30000 0 0x8>; 980 clocks = <&cpg CPG_MOD 523>; 981 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 982 resets = <&cpg 523>; 983 #pwm-cells = <2>; 984 status = "disabled"; 985 }; 986 987 pwm1: pwm@e6e31000 { 988 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 989 reg = <0 0xe6e31000 0 0x8>; 990 clocks = <&cpg CPG_MOD 523>; 991 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 992 resets = <&cpg 523>; 993 #pwm-cells = <2>; 994 status = "disabled"; 995 }; 996 997 pwm2: pwm@e6e32000 { 998 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 999 reg = <0 0xe6e32000 0 0x8>; 1000 clocks = <&cpg CPG_MOD 523>; 1001 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1002 resets = <&cpg 523>; 1003 #pwm-cells = <2>; 1004 status = "disabled"; 1005 }; 1006 1007 pwm3: pwm@e6e33000 { 1008 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1009 reg = <0 0xe6e33000 0 0x8>; 1010 clocks = <&cpg CPG_MOD 523>; 1011 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1012 resets = <&cpg 523>; 1013 #pwm-cells = <2>; 1014 status = "disabled"; 1015 }; 1016 1017 pwm4: pwm@e6e34000 { 1018 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1019 reg = <0 0xe6e34000 0 0x8>; 1020 clocks = <&cpg CPG_MOD 523>; 1021 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1022 resets = <&cpg 523>; 1023 #pwm-cells = <2>; 1024 status = "disabled"; 1025 }; 1026 1027 pwm5: pwm@e6e35000 { 1028 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1029 reg = <0 0xe6e35000 0 0x8>; 1030 clocks = <&cpg CPG_MOD 523>; 1031 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1032 resets = <&cpg 523>; 1033 #pwm-cells = <2>; 1034 status = "disabled"; 1035 }; 1036 1037 pwm6: pwm@e6e36000 { 1038 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1039 reg = <0 0xe6e36000 0 0x8>; 1040 clocks = <&cpg CPG_MOD 523>; 1041 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1042 resets = <&cpg 523>; 1043 #pwm-cells = <2>; 1044 status = "disabled"; 1045 }; 1046 1047 scif0: serial@e6e60000 { 1048 compatible = "renesas,scif-r8a77990", 1049 "renesas,rcar-gen3-scif", "renesas,scif"; 1050 reg = <0 0xe6e60000 0 64>; 1051 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1052 clocks = <&cpg CPG_MOD 207>, 1053 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1054 <&scif_clk>; 1055 clock-names = "fck", "brg_int", "scif_clk"; 1056 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1057 <&dmac2 0x51>, <&dmac2 0x50>; 1058 dma-names = "tx", "rx", "tx", "rx"; 1059 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1060 resets = <&cpg 207>; 1061 status = "disabled"; 1062 }; 1063 1064 scif1: serial@e6e68000 { 1065 compatible = "renesas,scif-r8a77990", 1066 "renesas,rcar-gen3-scif", "renesas,scif"; 1067 reg = <0 0xe6e68000 0 64>; 1068 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1069 clocks = <&cpg CPG_MOD 206>, 1070 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1071 <&scif_clk>; 1072 clock-names = "fck", "brg_int", "scif_clk"; 1073 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1074 <&dmac2 0x53>, <&dmac2 0x52>; 1075 dma-names = "tx", "rx", "tx", "rx"; 1076 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1077 resets = <&cpg 206>; 1078 status = "disabled"; 1079 }; 1080 1081 scif2: serial@e6e88000 { 1082 compatible = "renesas,scif-r8a77990", 1083 "renesas,rcar-gen3-scif", "renesas,scif"; 1084 reg = <0 0xe6e88000 0 64>; 1085 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1086 clocks = <&cpg CPG_MOD 310>, 1087 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1088 <&scif_clk>; 1089 clock-names = "fck", "brg_int", "scif_clk"; 1090 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1091 <&dmac2 0x13>, <&dmac2 0x12>; 1092 dma-names = "tx", "rx", "tx", "rx"; 1093 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1094 resets = <&cpg 310>; 1095 status = "disabled"; 1096 }; 1097 1098 scif3: serial@e6c50000 { 1099 compatible = "renesas,scif-r8a77990", 1100 "renesas,rcar-gen3-scif", "renesas,scif"; 1101 reg = <0 0xe6c50000 0 64>; 1102 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1103 clocks = <&cpg CPG_MOD 204>, 1104 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1105 <&scif_clk>; 1106 clock-names = "fck", "brg_int", "scif_clk"; 1107 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1108 dma-names = "tx", "rx"; 1109 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1110 resets = <&cpg 204>; 1111 status = "disabled"; 1112 }; 1113 1114 scif4: serial@e6c40000 { 1115 compatible = "renesas,scif-r8a77990", 1116 "renesas,rcar-gen3-scif", "renesas,scif"; 1117 reg = <0 0xe6c40000 0 64>; 1118 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1119 clocks = <&cpg CPG_MOD 203>, 1120 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1121 <&scif_clk>; 1122 clock-names = "fck", "brg_int", "scif_clk"; 1123 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1124 dma-names = "tx", "rx"; 1125 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1126 resets = <&cpg 203>; 1127 status = "disabled"; 1128 }; 1129 1130 scif5: serial@e6f30000 { 1131 compatible = "renesas,scif-r8a77990", 1132 "renesas,rcar-gen3-scif", "renesas,scif"; 1133 reg = <0 0xe6f30000 0 64>; 1134 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1135 clocks = <&cpg CPG_MOD 202>, 1136 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1137 <&scif_clk>; 1138 clock-names = "fck", "brg_int", "scif_clk"; 1139 dmas = <&dmac0 0x5b>, <&dmac0 0x5a>; 1140 dma-names = "tx", "rx"; 1141 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1142 resets = <&cpg 202>; 1143 status = "disabled"; 1144 }; 1145 1146 msiof0: spi@e6e90000 { 1147 compatible = "renesas,msiof-r8a77990", 1148 "renesas,rcar-gen3-msiof"; 1149 reg = <0 0xe6e90000 0 0x0064>; 1150 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1151 clocks = <&cpg CPG_MOD 211>; 1152 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1153 <&dmac2 0x41>, <&dmac2 0x40>; 1154 dma-names = "tx", "rx", "tx", "rx"; 1155 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1156 resets = <&cpg 211>; 1157 #address-cells = <1>; 1158 #size-cells = <0>; 1159 status = "disabled"; 1160 }; 1161 1162 msiof1: spi@e6ea0000 { 1163 compatible = "renesas,msiof-r8a77990", 1164 "renesas,rcar-gen3-msiof"; 1165 reg = <0 0xe6ea0000 0 0x0064>; 1166 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1167 clocks = <&cpg CPG_MOD 210>; 1168 dmas = <&dmac0 0x43>, <&dmac0 0x42>; 1169 dma-names = "tx", "rx"; 1170 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1171 resets = <&cpg 210>; 1172 #address-cells = <1>; 1173 #size-cells = <0>; 1174 status = "disabled"; 1175 }; 1176 1177 msiof2: spi@e6c00000 { 1178 compatible = "renesas,msiof-r8a77990", 1179 "renesas,rcar-gen3-msiof"; 1180 reg = <0 0xe6c00000 0 0x0064>; 1181 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1182 clocks = <&cpg CPG_MOD 209>; 1183 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1184 dma-names = "tx", "rx"; 1185 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1186 resets = <&cpg 209>; 1187 #address-cells = <1>; 1188 #size-cells = <0>; 1189 status = "disabled"; 1190 }; 1191 1192 msiof3: spi@e6c10000 { 1193 compatible = "renesas,msiof-r8a77990", 1194 "renesas,rcar-gen3-msiof"; 1195 reg = <0 0xe6c10000 0 0x0064>; 1196 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1197 clocks = <&cpg CPG_MOD 208>; 1198 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1199 dma-names = "tx", "rx"; 1200 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1201 resets = <&cpg 208>; 1202 #address-cells = <1>; 1203 #size-cells = <0>; 1204 status = "disabled"; 1205 }; 1206 1207 vin4: video@e6ef4000 { 1208 compatible = "renesas,vin-r8a77990"; 1209 reg = <0 0xe6ef4000 0 0x1000>; 1210 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1211 clocks = <&cpg CPG_MOD 807>; 1212 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1213 resets = <&cpg 807>; 1214 renesas,id = <4>; 1215 status = "disabled"; 1216 1217 ports { 1218 #address-cells = <1>; 1219 #size-cells = <0>; 1220 1221 port@1 { 1222 #address-cells = <1>; 1223 #size-cells = <0>; 1224 1225 reg = <1>; 1226 1227 vin4csi40: endpoint@2 { 1228 reg = <2>; 1229 remote-endpoint= <&csi40vin4>; 1230 }; 1231 }; 1232 }; 1233 }; 1234 1235 vin5: video@e6ef5000 { 1236 compatible = "renesas,vin-r8a77990"; 1237 reg = <0 0xe6ef5000 0 0x1000>; 1238 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1239 clocks = <&cpg CPG_MOD 806>; 1240 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1241 resets = <&cpg 806>; 1242 renesas,id = <5>; 1243 status = "disabled"; 1244 1245 ports { 1246 #address-cells = <1>; 1247 #size-cells = <0>; 1248 1249 port@1 { 1250 #address-cells = <1>; 1251 #size-cells = <0>; 1252 1253 reg = <1>; 1254 1255 vin5csi40: endpoint@2 { 1256 reg = <2>; 1257 remote-endpoint= <&csi40vin5>; 1258 }; 1259 }; 1260 }; 1261 }; 1262 1263 rcar_sound: sound@ec500000 { 1264 /* 1265 * #sound-dai-cells is required 1266 * 1267 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1268 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1269 */ 1270 /* 1271 * #clock-cells is required for audio_clkout0/1/2/3 1272 * 1273 * clkout : #clock-cells = <0>; <&rcar_sound>; 1274 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1275 */ 1276 compatible = "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3"; 1277 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1278 <0 0xec5a0000 0 0x100>, /* ADG */ 1279 <0 0xec540000 0 0x1000>, /* SSIU */ 1280 <0 0xec541000 0 0x280>, /* SSI */ 1281 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1282 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1283 1284 clocks = <&cpg CPG_MOD 1005>, 1285 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1286 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1287 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1288 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1289 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1290 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1291 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1292 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1293 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1294 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1295 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1296 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1297 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1298 <&audio_clk_a>, <&audio_clk_b>, 1299 <&audio_clk_c>, 1300 <&cpg CPG_CORE R8A77990_CLK_ZA2>; 1301 clock-names = "ssi-all", 1302 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1303 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1304 "ssi.1", "ssi.0", 1305 "src.9", "src.8", "src.7", "src.6", 1306 "src.5", "src.4", "src.3", "src.2", 1307 "src.1", "src.0", 1308 "mix.1", "mix.0", 1309 "ctu.1", "ctu.0", 1310 "dvc.0", "dvc.1", 1311 "clk_a", "clk_b", "clk_c", "clk_i"; 1312 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1313 resets = <&cpg 1005>, 1314 <&cpg 1006>, <&cpg 1007>, 1315 <&cpg 1008>, <&cpg 1009>, 1316 <&cpg 1010>, <&cpg 1011>, 1317 <&cpg 1012>, <&cpg 1013>, 1318 <&cpg 1014>, <&cpg 1015>; 1319 reset-names = "ssi-all", 1320 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1321 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1322 "ssi.1", "ssi.0"; 1323 status = "disabled"; 1324 1325 rcar_sound,ctu { 1326 ctu00: ctu-0 { }; 1327 ctu01: ctu-1 { }; 1328 ctu02: ctu-2 { }; 1329 ctu03: ctu-3 { }; 1330 ctu10: ctu-4 { }; 1331 ctu11: ctu-5 { }; 1332 ctu12: ctu-6 { }; 1333 ctu13: ctu-7 { }; 1334 }; 1335 1336 rcar_sound,dvc { 1337 dvc0: dvc-0 { 1338 dmas = <&audma0 0xbc>; 1339 dma-names = "tx"; 1340 }; 1341 dvc1: dvc-1 { 1342 dmas = <&audma0 0xbe>; 1343 dma-names = "tx"; 1344 }; 1345 }; 1346 1347 rcar_sound,mix { 1348 mix0: mix-0 { }; 1349 mix1: mix-1 { }; 1350 }; 1351 1352 rcar_sound,src { 1353 src0: src-0 { 1354 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1355 dmas = <&audma0 0x85>, <&audma0 0x9a>; 1356 dma-names = "rx", "tx"; 1357 }; 1358 src1: src-1 { 1359 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1360 dmas = <&audma0 0x87>, <&audma0 0x9c>; 1361 dma-names = "rx", "tx"; 1362 }; 1363 src2: src-2 { 1364 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1365 dmas = <&audma0 0x89>, <&audma0 0x9e>; 1366 dma-names = "rx", "tx"; 1367 }; 1368 src3: src-3 { 1369 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1370 dmas = <&audma0 0x8b>, <&audma0 0xa0>; 1371 dma-names = "rx", "tx"; 1372 }; 1373 src4: src-4 { 1374 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1375 dmas = <&audma0 0x8d>, <&audma0 0xb0>; 1376 dma-names = "rx", "tx"; 1377 }; 1378 src5: src-5 { 1379 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1380 dmas = <&audma0 0x8f>, <&audma0 0xb2>; 1381 dma-names = "rx", "tx"; 1382 }; 1383 src6: src-6 { 1384 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1385 dmas = <&audma0 0x91>, <&audma0 0xb4>; 1386 dma-names = "rx", "tx"; 1387 }; 1388 src7: src-7 { 1389 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1390 dmas = <&audma0 0x93>, <&audma0 0xb6>; 1391 dma-names = "rx", "tx"; 1392 }; 1393 src8: src-8 { 1394 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1395 dmas = <&audma0 0x95>, <&audma0 0xb8>; 1396 dma-names = "rx", "tx"; 1397 }; 1398 src9: src-9 { 1399 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1400 dmas = <&audma0 0x97>, <&audma0 0xba>; 1401 dma-names = "rx", "tx"; 1402 }; 1403 }; 1404 1405 rcar_sound,ssi { 1406 ssi0: ssi-0 { 1407 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1408 dmas = <&audma0 0x01>, <&audma0 0x02>, 1409 <&audma0 0x15>, <&audma0 0x16>; 1410 dma-names = "rx", "tx", "rxu", "txu"; 1411 }; 1412 ssi1: ssi-1 { 1413 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1414 dmas = <&audma0 0x03>, <&audma0 0x04>, 1415 <&audma0 0x49>, <&audma0 0x4a>; 1416 dma-names = "rx", "tx", "rxu", "txu"; 1417 }; 1418 ssi2: ssi-2 { 1419 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1420 dmas = <&audma0 0x05>, <&audma0 0x06>, 1421 <&audma0 0x63>, <&audma0 0x64>; 1422 dma-names = "rx", "tx", "rxu", "txu"; 1423 }; 1424 ssi3: ssi-3 { 1425 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1426 dmas = <&audma0 0x07>, <&audma0 0x08>, 1427 <&audma0 0x6f>, <&audma0 0x70>; 1428 dma-names = "rx", "tx", "rxu", "txu"; 1429 }; 1430 ssi4: ssi-4 { 1431 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1432 dmas = <&audma0 0x09>, <&audma0 0x0a>, 1433 <&audma0 0x71>, <&audma0 0x72>; 1434 dma-names = "rx", "tx", "rxu", "txu"; 1435 }; 1436 ssi5: ssi-5 { 1437 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1438 dmas = <&audma0 0x0b>, <&audma0 0x0c>, 1439 <&audma0 0x73>, <&audma0 0x74>; 1440 dma-names = "rx", "tx", "rxu", "txu"; 1441 }; 1442 ssi6: ssi-6 { 1443 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1444 dmas = <&audma0 0x0d>, <&audma0 0x0e>, 1445 <&audma0 0x75>, <&audma0 0x76>; 1446 dma-names = "rx", "tx", "rxu", "txu"; 1447 }; 1448 ssi7: ssi-7 { 1449 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1450 dmas = <&audma0 0x0f>, <&audma0 0x10>, 1451 <&audma0 0x79>, <&audma0 0x7a>; 1452 dma-names = "rx", "tx", "rxu", "txu"; 1453 }; 1454 ssi8: ssi-8 { 1455 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1456 dmas = <&audma0 0x11>, <&audma0 0x12>, 1457 <&audma0 0x7b>, <&audma0 0x7c>; 1458 dma-names = "rx", "tx", "rxu", "txu"; 1459 }; 1460 ssi9: ssi-9 { 1461 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1462 dmas = <&audma0 0x13>, <&audma0 0x14>, 1463 <&audma0 0x7d>, <&audma0 0x7e>; 1464 dma-names = "rx", "tx", "rxu", "txu"; 1465 }; 1466 }; 1467 }; 1468 1469 audma0: dma-controller@ec700000 { 1470 compatible = "renesas,dmac-r8a77990", 1471 "renesas,rcar-dmac"; 1472 reg = <0 0xec700000 0 0x10000>; 1473 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH 1474 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH 1475 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH 1476 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH 1477 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH 1478 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH 1479 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH 1480 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH 1481 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH 1482 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH 1483 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH 1484 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH 1485 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH 1486 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH 1487 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH 1488 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH 1489 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1490 interrupt-names = "error", 1491 "ch0", "ch1", "ch2", "ch3", 1492 "ch4", "ch5", "ch6", "ch7", 1493 "ch8", "ch9", "ch10", "ch11", 1494 "ch12", "ch13", "ch14", "ch15"; 1495 clocks = <&cpg CPG_MOD 502>; 1496 clock-names = "fck"; 1497 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1498 resets = <&cpg 502>; 1499 #dma-cells = <1>; 1500 dma-channels = <16>; 1501 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 1502 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 1503 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 1504 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 1505 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 1506 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 1507 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 1508 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 1509 }; 1510 1511 xhci0: usb@ee000000 { 1512 compatible = "renesas,xhci-r8a77990", 1513 "renesas,rcar-gen3-xhci"; 1514 reg = <0 0xee000000 0 0xc00>; 1515 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1516 clocks = <&cpg CPG_MOD 328>; 1517 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1518 resets = <&cpg 328>; 1519 status = "disabled"; 1520 }; 1521 1522 usb3_peri0: usb@ee020000 { 1523 compatible = "renesas,r8a77990-usb3-peri", 1524 "renesas,rcar-gen3-usb3-peri"; 1525 reg = <0 0xee020000 0 0x400>; 1526 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 1527 clocks = <&cpg CPG_MOD 328>; 1528 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1529 resets = <&cpg 328>; 1530 status = "disabled"; 1531 }; 1532 1533 ohci0: usb@ee080000 { 1534 compatible = "generic-ohci"; 1535 reg = <0 0xee080000 0 0x100>; 1536 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1537 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1538 phys = <&usb2_phy0 1>; 1539 phy-names = "usb"; 1540 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1541 resets = <&cpg 703>, <&cpg 704>; 1542 status = "disabled"; 1543 }; 1544 1545 ehci0: usb@ee080100 { 1546 compatible = "generic-ehci"; 1547 reg = <0 0xee080100 0 0x100>; 1548 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1549 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1550 phys = <&usb2_phy0 2>; 1551 phy-names = "usb"; 1552 companion = <&ohci0>; 1553 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1554 resets = <&cpg 703>, <&cpg 704>; 1555 status = "disabled"; 1556 }; 1557 1558 usb2_phy0: usb-phy@ee080200 { 1559 compatible = "renesas,usb2-phy-r8a77990", 1560 "renesas,rcar-gen3-usb2-phy"; 1561 reg = <0 0xee080200 0 0x700>; 1562 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1563 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1564 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1565 resets = <&cpg 703>, <&cpg 704>; 1566 #phy-cells = <1>; 1567 status = "disabled"; 1568 }; 1569 1570 sdhi0: sd@ee100000 { 1571 compatible = "renesas,sdhi-r8a77990", 1572 "renesas,rcar-gen3-sdhi"; 1573 reg = <0 0xee100000 0 0x2000>; 1574 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1575 clocks = <&cpg CPG_MOD 314>; 1576 max-frequency = <200000000>; 1577 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1578 resets = <&cpg 314>; 1579 status = "disabled"; 1580 }; 1581 1582 sdhi1: sd@ee120000 { 1583 compatible = "renesas,sdhi-r8a77990", 1584 "renesas,rcar-gen3-sdhi"; 1585 reg = <0 0xee120000 0 0x2000>; 1586 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1587 clocks = <&cpg CPG_MOD 313>; 1588 max-frequency = <200000000>; 1589 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1590 resets = <&cpg 313>; 1591 status = "disabled"; 1592 }; 1593 1594 sdhi3: sd@ee160000 { 1595 compatible = "renesas,sdhi-r8a77990", 1596 "renesas,rcar-gen3-sdhi"; 1597 reg = <0 0xee160000 0 0x2000>; 1598 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1599 clocks = <&cpg CPG_MOD 311>; 1600 max-frequency = <200000000>; 1601 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1602 resets = <&cpg 311>; 1603 status = "disabled"; 1604 }; 1605 1606 gic: interrupt-controller@f1010000 { 1607 compatible = "arm,gic-400"; 1608 #interrupt-cells = <3>; 1609 #address-cells = <0>; 1610 interrupt-controller; 1611 reg = <0x0 0xf1010000 0 0x1000>, 1612 <0x0 0xf1020000 0 0x20000>, 1613 <0x0 0xf1040000 0 0x20000>, 1614 <0x0 0xf1060000 0 0x20000>; 1615 interrupts = <GIC_PPI 9 1616 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1617 clocks = <&cpg CPG_MOD 408>; 1618 clock-names = "clk"; 1619 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1620 resets = <&cpg 408>; 1621 }; 1622 1623 pciec0: pcie@fe000000 { 1624 compatible = "renesas,pcie-r8a77990", 1625 "renesas,pcie-rcar-gen3"; 1626 reg = <0 0xfe000000 0 0x80000>; 1627 #address-cells = <3>; 1628 #size-cells = <2>; 1629 bus-range = <0x00 0xff>; 1630 device_type = "pci"; 1631 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 1632 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 1633 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 1634 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1635 /* Map all possible DDR as inbound ranges */ 1636 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>; 1637 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1638 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1639 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1640 #interrupt-cells = <1>; 1641 interrupt-map-mask = <0 0 0 0>; 1642 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1643 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1644 clock-names = "pcie", "pcie_bus"; 1645 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1646 resets = <&cpg 319>; 1647 status = "disabled"; 1648 }; 1649 1650 vspb0: vsp@fe960000 { 1651 compatible = "renesas,vsp2"; 1652 reg = <0 0xfe960000 0 0x8000>; 1653 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1654 clocks = <&cpg CPG_MOD 626>; 1655 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1656 resets = <&cpg 626>; 1657 renesas,fcp = <&fcpvb0>; 1658 }; 1659 1660 fcpvb0: fcp@fe96f000 { 1661 compatible = "renesas,fcpv"; 1662 reg = <0 0xfe96f000 0 0x200>; 1663 clocks = <&cpg CPG_MOD 607>; 1664 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1665 resets = <&cpg 607>; 1666 iommus = <&ipmmu_vp0 5>; 1667 }; 1668 1669 vspi0: vsp@fe9a0000 { 1670 compatible = "renesas,vsp2"; 1671 reg = <0 0xfe9a0000 0 0x8000>; 1672 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 1673 clocks = <&cpg CPG_MOD 631>; 1674 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1675 resets = <&cpg 631>; 1676 renesas,fcp = <&fcpvi0>; 1677 }; 1678 1679 fcpvi0: fcp@fe9af000 { 1680 compatible = "renesas,fcpv"; 1681 reg = <0 0xfe9af000 0 0x200>; 1682 clocks = <&cpg CPG_MOD 611>; 1683 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1684 resets = <&cpg 611>; 1685 iommus = <&ipmmu_vp0 8>; 1686 }; 1687 1688 vspd0: vsp@fea20000 { 1689 compatible = "renesas,vsp2"; 1690 reg = <0 0xfea20000 0 0x7000>; 1691 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 1692 clocks = <&cpg CPG_MOD 623>; 1693 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1694 resets = <&cpg 623>; 1695 renesas,fcp = <&fcpvd0>; 1696 }; 1697 1698 fcpvd0: fcp@fea27000 { 1699 compatible = "renesas,fcpv"; 1700 reg = <0 0xfea27000 0 0x200>; 1701 clocks = <&cpg CPG_MOD 603>; 1702 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1703 resets = <&cpg 603>; 1704 iommus = <&ipmmu_vi0 8>; 1705 }; 1706 1707 vspd1: vsp@fea28000 { 1708 compatible = "renesas,vsp2"; 1709 reg = <0 0xfea28000 0 0x7000>; 1710 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 1711 clocks = <&cpg CPG_MOD 622>; 1712 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1713 resets = <&cpg 622>; 1714 renesas,fcp = <&fcpvd1>; 1715 }; 1716 1717 fcpvd1: fcp@fea2f000 { 1718 compatible = "renesas,fcpv"; 1719 reg = <0 0xfea2f000 0 0x200>; 1720 clocks = <&cpg CPG_MOD 602>; 1721 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1722 resets = <&cpg 602>; 1723 iommus = <&ipmmu_vi0 9>; 1724 }; 1725 1726 csi40: csi2@feaa0000 { 1727 compatible = "renesas,r8a77990-csi2"; 1728 reg = <0 0xfeaa0000 0 0x10000>; 1729 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1730 clocks = <&cpg CPG_MOD 716>; 1731 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1732 resets = <&cpg 716>; 1733 status = "disabled"; 1734 1735 ports { 1736 #address-cells = <1>; 1737 #size-cells = <0>; 1738 1739 port@1 { 1740 #address-cells = <1>; 1741 #size-cells = <0>; 1742 1743 reg = <1>; 1744 1745 csi40vin4: endpoint@0 { 1746 reg = <0>; 1747 remote-endpoint = <&vin4csi40>; 1748 }; 1749 csi40vin5: endpoint@1 { 1750 reg = <1>; 1751 remote-endpoint = <&vin5csi40>; 1752 }; 1753 }; 1754 }; 1755 }; 1756 1757 du: display@feb00000 { 1758 compatible = "renesas,du-r8a77990"; 1759 reg = <0 0xfeb00000 0 0x40000>; 1760 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1761 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1762 clocks = <&cpg CPG_MOD 724>, 1763 <&cpg CPG_MOD 723>; 1764 clock-names = "du.0", "du.1"; 1765 resets = <&cpg 724>; 1766 reset-names = "du.0"; 1767 vsps = <&vspd0 0>, <&vspd1 0>; 1768 status = "disabled"; 1769 1770 ports { 1771 #address-cells = <1>; 1772 #size-cells = <0>; 1773 1774 port@0 { 1775 reg = <0>; 1776 du_out_rgb: endpoint { 1777 }; 1778 }; 1779 1780 port@1 { 1781 reg = <1>; 1782 du_out_lvds0: endpoint { 1783 remote-endpoint = <&lvds0_in>; 1784 }; 1785 }; 1786 1787 port@2 { 1788 reg = <2>; 1789 du_out_lvds1: endpoint { 1790 remote-endpoint = <&lvds1_in>; 1791 }; 1792 }; 1793 }; 1794 }; 1795 1796 lvds0: lvds-encoder@feb90000 { 1797 compatible = "renesas,r8a77990-lvds"; 1798 reg = <0 0xfeb90000 0 0x20>; 1799 clocks = <&cpg CPG_MOD 727>; 1800 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1801 resets = <&cpg 727>; 1802 status = "disabled"; 1803 1804 renesas,companion = <&lvds1>; 1805 1806 ports { 1807 #address-cells = <1>; 1808 #size-cells = <0>; 1809 1810 port@0 { 1811 reg = <0>; 1812 lvds0_in: endpoint { 1813 remote-endpoint = <&du_out_lvds0>; 1814 }; 1815 }; 1816 1817 port@1 { 1818 reg = <1>; 1819 lvds0_out: endpoint { 1820 }; 1821 }; 1822 }; 1823 }; 1824 1825 lvds1: lvds-encoder@feb90100 { 1826 compatible = "renesas,r8a77990-lvds"; 1827 reg = <0 0xfeb90100 0 0x20>; 1828 clocks = <&cpg CPG_MOD 727>; 1829 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1830 resets = <&cpg 726>; 1831 status = "disabled"; 1832 1833 ports { 1834 #address-cells = <1>; 1835 #size-cells = <0>; 1836 1837 port@0 { 1838 reg = <0>; 1839 lvds1_in: endpoint { 1840 remote-endpoint = <&du_out_lvds1>; 1841 }; 1842 }; 1843 1844 port@1 { 1845 reg = <1>; 1846 lvds1_out: endpoint { 1847 }; 1848 }; 1849 }; 1850 }; 1851 1852 prr: chipid@fff00044 { 1853 compatible = "renesas,prr"; 1854 reg = <0 0xfff00044 0 4>; 1855 }; 1856 }; 1857 1858 thermal-zones { 1859 cpu-thermal { 1860 polling-delay-passive = <250>; 1861 polling-delay = <0>; 1862 thermal-sensors = <&thermal 0>; 1863 sustainable-power = <717>; 1864 1865 cooling-maps { 1866 map0 { 1867 trip = <&target>; 1868 cooling-device = <&a53_0 0 2>; 1869 contribution = <1024>; 1870 }; 1871 }; 1872 1873 trips { 1874 sensor1_crit: sensor1-crit { 1875 temperature = <120000>; 1876 hysteresis = <2000>; 1877 type = "critical"; 1878 }; 1879 1880 target: trip-point1 { 1881 temperature = <100000>; 1882 hysteresis = <2000>; 1883 type = "passive"; 1884 }; 1885 }; 1886 }; 1887 }; 1888 1889 timer { 1890 compatible = "arm,armv8-timer"; 1891 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1892 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1893 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1894 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1895 }; 1896}; 1897