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/Documentation/devicetree/bindings/iio/accel/
Dmma8452.txt31 reg = <0x1d>;
33 interrupts = <5 0>;
/Documentation/devicetree/bindings/mtd/
Dmxic-nand.txt8 - #size-cells: should be set to 0
24 reg = <0x43c30000 0x10000>;
26 #size-cells = <0>;
27 interrupts = <GIC_SPI 0x1d IRQ_TYPE_EDGE_RISING>;
28 clocks = <&clkwizard 0>, <&clkwizard 1>, <&clkc 15>;
31 nand@0 {
32 reg = <0>;
/Documentation/devicetree/bindings/hwmon/
Dadc128d818.txt6 - Mode 0: 7 single-ended voltage readings (IN0-IN6),
19 currently active chip operation mode (default is mode 0).
36 reg = <0x1d>;
/Documentation/devicetree/bindings/extcon/
Dextcon-ptn5150.yaml51 #size-cells = <0>;
55 reg = <0x1d>;
/Documentation/hwmon/
Dadc128d818.rst10 Addresses scanned: I2C 0x1d, 0x1e, 0x1f, 0x2d, 0x2e, 0x2f
35 inputs can measure voltages between 0 and 2.55 volts, with a resolution
48 addresses 0x35 to 0x37. Those addresses are not scanned. You have to instantiate
Dmax31730.rst10 Addresses scanned: 0x1c, 0x1d, 0x1e, 0x1f, 0x4c, 0x4d, 0x4e, 0x4f
35 Set to 0 to enable channel, 0 to disable
/Documentation/devicetree/bindings/pci/
Dxgene-pci-msi.txt8 - reg: physical base address (0x79000000) and length (0x900000) for controller
13 interrupt number 0x10 to 0x1f.
27 reg = <0x00 0x79000000 0x0 0x900000>;
28 interrupts = <0x0 0x10 0x4>
29 <0x0 0x11 0x4>
30 <0x0 0x12 0x4>
31 <0x0 0x13 0x4>
32 <0x0 0x14 0x4>
33 <0x0 0x15 0x4>
34 <0x0 0x16 0x4>
[all …]
/Documentation/trace/
Dkprobetrace.rst32 r[MAXACTIVE][:[GRP/]EVENT] [MOD:]SYM[+0] [FETCHARGS] : Set a return probe
33 p:[GRP/]EVENT] [MOD:]SYM[+0]%return [FETCHARGS] : Set a return probe
44 can be probed simultaneously, or 0 for the default value
51 $stackN : Fetch Nth entry of stack (N >= 0)
64 (\*1) only for the probe on function entry (offs == 0).
88 types, <base-type>[1] is equal to <base-type> (e.g. +0(%di):x32[1] is same
89 as +0(%di):x32.) But string[1] is not equal to string. The string type itself
91 So, for example, +0(%di):string[1] is equal to +0(+0(%di)):string.
115 +0(%si):ustring is equivalent to +u0(%si):string.
131 You can enable/disable the probe by writing 1 or 0 on it.
[all …]
Dftrace.rst56 tracefs /sys/kernel/tracing tracefs defaults 0 0
114 ring buffer is enabled. Echo 0 into this file to disable
121 set this file to "0". User space can re-enable tracing by
164 or cleared by writing a "1" or "0" respectively into the
183 Only active when the file contains a number greater than 0.
412 If the option "record-cmd" is set to "0", then comms of tasks
546 if (trace_fd < 0)
897 # irqsoff latency trace v1.1.5 on 3.8.0-test+
899 # latency: 259 us, #4/4, CPU#2 | (M:preempt VP:0, KP:0, SP:0 HP:0 #P:4)
901 # | task: ps-6143 (uid:0 nice:0 policy:0 rt_prio:0)
[all …]
/Documentation/w1/slaves/
Dw1_ds2423.rst11 W1_THERM_DS2423 0x1D
53 …00 e1 61 5d 19 00 00 00 00 df 0b 00 ff ff 00 00 ff ff 00 00 ff ff 00 00 ff ff 00 00 ff ff 00 00 ff…
/Documentation/devicetree/bindings/bus/
Dmvebu-mbus.txt65 pcie-mem-aperture = <0xe0000000 0x8000000>;
66 pcie-io-aperture = <0xe8000000 0x100000>;
73 reg = <0x20000 0x100>, <0x20180 0x20>, <0x20250 0x8>;
87 0xSIAA0000 0x00oooooo
91 S = 0x0 for a MBus valid window
92 S = 0xf for a non-valid window (see below)
94 If S = 0x0, then:
99 If S = 0xf, then:
105 (S = 0x0), an address decoding window is allocated. On the other side,
106 entries for translation that do not correspond to valid windows (S = 0xf)
[all …]
/Documentation/devicetree/bindings/spi/
Dspi-orion.txt19 chip-select lines 0 through 7 respectively.
37 #size-cells = <0>;
38 cell-index = <0>;
39 reg = <0x10600 0x28>;
47 #size-cells = <0>;
48 cell-index = <0>;
49 reg = <MBUS_ID(0xf0, 0x01) 0x10600 0x28>, /* control */
50 <MBUS_ID(0x01, 0x1e) 0 0xffffffff>, /* CS0 */
51 <MBUS_ID(0x01, 0x5e) 0 0xffffffff>, /* CS1 */
52 <MBUS_ID(0x01, 0x9e) 0 0xffffffff>, /* CS2 */
[all …]
/Documentation/devicetree/bindings/soc/fsl/cpm_qe/
Dqe.txt49 ranges = <0 e0100000 00100000>;
51 brg-frequency = <0>;
54 0x04 0x05 0x0C 0x0D 0x14 0x15 0x1C 0x1D
55 0x24 0x25 0x2C 0x2D 0x34 0x35 0x88 0x89
56 0x98 0x99 0xA8 0xA9 0xB8 0xB9 0xC8 0xC9
57 0xD8 0xD9 0xE8 0xE9>;
74 ranges = <0 00010000 0000c000>;
76 data-only@0{
79 reg = <0 c000>;
96 #address-cells = <0>;
[all …]
/Documentation/fault-injection/
Dnvme-fault-injection.rst33 name fault_inject, interval 1, probability 100, space 0, times 1
34 CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.15.0-rc8+ #2
39 dump_stack+0x5c/0x7d
40 should_fail+0x148/0x170
41 nvme_should_fail+0x2f/0x50 [nvme_core]
42 nvme_process_cq+0xe7/0x1d0 [nvme]
43 nvme_irq+0x1e/0x40 [nvme]
44 __handle_irq_event_percpu+0x3a/0x190
45 handle_irq_event_percpu+0x30/0x70
46 handle_irq_event+0x36/0x60
[all …]
/Documentation/devicetree/bindings/mfd/
Dab8500.txt10 - bits[3:0] trigger type and level flags:
33 …M : : BtempLow < Btemp < BtempMedium,if battery temperature is between -10 and 0°C
34 …IGH : : BtempMedium < Btemp < BtempHigh,if battery temperature is between 0°C and MaxTemp
102 interrupts = <0 40 0x4>;
108 interrupts = <17 0x4
109 18 0x4>;
115 interrupts = <32 0x4
116 39 0x4>;
120 #size-cells = <0>;
125 reg = <0x01>;
[all …]
/Documentation/filesystems/ext4/
Ddirectory.rst27 directory entries are signified by inode = 0. By default the filesystem
44 * - 0x0
48 * - 0x4
52 * - 0x6
56 * - 0x8
76 * - 0x0
80 * - 0x4
84 * - 0x6
88 * - 0x7
92 * - 0x8
[all …]
/Documentation/input/devices/
Dsentelic.rst21 4. Issuing the "Get device ID" command (0xF2) and waits for the response;
22 5. FSP will respond 0x04.
27 Bit 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0
37 Bit2 => Middle Button, 1 is pressed, 0 is not pressed.
38 Bit1 => Right Button, 1 is pressed, 0 is not pressed.
39 Bit0 => Left Button, 1 is pressed, 0 is not pressed.
45 0 = 4th mouse button is not pressed.
47 0 = 5th mouse button is not pressed.
51 - Set bit 1 in register 0x40 to 1
59 Bit 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0
[all …]