Home
last modified time | relevance | path

Searched +full:0 +full:x22 (Results 1 – 25 of 29) sorted by relevance

12

/Documentation/dev-tools/
Dkfence.rst29 CONFIG_KFENCE_SAMPLE_INTERVAL=0
41 ``CONFIG_KFENCE_SAMPLE_INTERVAL``. Setting ``kfence.sample_interval=0``
68 BUG: KFENCE: out-of-bounds read in test_out_of_bounds_read+0xa3/0x22b
70 Out-of-bounds read at 0xffffffffb672efff (1B left of kfence-#17):
71 test_out_of_bounds_read+0xa3/0x22b
72 kunit_try_run_case+0x51/0x85
73 kunit_generic_run_threadfn_adapter+0x16/0x30
74 kthread+0x137/0x160
75 ret_from_fork+0x22/0x30
77 …kfence-#17 [0xffffffffb672f000-0xffffffffb672f01f, size=32, cache=kmalloc-32] allocated by task 50…
[all …]
/Documentation/devicetree/bindings/serial/
Drenesas,scifa.yaml102 reg = <0xe6c40000 64>;
108 dmas = <&dmac0 0x21>, <&dmac0 0x22>, <&dmac1 0x21>, <&dmac1 0x22>;
/Documentation/devicetree/bindings/sound/
Dzte,zx-aud96p22.txt5 - #sound-dai-cells: Should be 0
12 reg = <0x01486000 0x1000>;
15 #size-cells = <0>;
21 #sound-dai-cells = <0>;
22 reg = <0x22>;
/Documentation/leds/
Dleds-mlxcpld.rst28 - CPLD reg offset: 0x20
29 - Bits [3:0]
32 - CPLD reg offset: 0x20
36 - CPLD reg offset: 0x21
37 - Bits [3:0]
40 - CPLD reg offset: 0x21
44 - CPLD reg offset: 0x22
45 - Bits [3:0]
48 - CPLD reg offset: 0x22
56 - [0,0,0,0] = LED OFF
[all …]
/Documentation/devicetree/bindings/media/
Drenesas,drif.txt66 - pinctrl-0: pin control group to be used for this channel.
77 - sync-active: Indicates sync signal polarity, 0/1 for low/high respectively.
100 reg = <0 0xe6f40000 0 0x64>;
104 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
109 pinctrl-0 = <&drif0_pins>;
121 reg = <0 0xe6f50000 0 0x64>;
125 dmas = <&dmac1 0x22>, <&dmac2 0x22>;
148 reg = <0 0xe6f40000 0 0x64>;
152 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
161 reg = <0 0xe6f50000 0 0x64>;
[all …]
/Documentation/networking/
Dmac80211-injection.rst75 0x00, 0x00, // <-- radiotap version
76 0x0b, 0x00, // <- radiotap header length
77 0x04, 0x0c, 0x00, 0x00, // <-- bitmap
78 0x6c, // <-- rate
79 0x0c, //<-- tx power
80 0x01 //<-- antenna
85 0x08, 0x01, 0x00, 0x00,
86 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
87 0x13, 0x22, 0x33, 0x44, 0x55, 0x66,
88 0x13, 0x22, 0x33, 0x44, 0x55, 0x66,
[all …]
/Documentation/devicetree/bindings/power/supply/
Drt9455_charger.txt34 reg = <0x22>;
37 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
Dbattery.yaml110 '^ocv-capacity-table-[0-9]+$':
130 #size-cells = <0>;
146 ocv-capacity-celsius = <(-10) 0 10>;
148 ocv-capacity-table-0 = <4185000 100>, <4113000 95>, <4066000 90>;
149 /* table for 0 degree Celsius */
153 resistance-temp-table = <20 100>, <10 90>, <0 80>, <(-10) 60>;
156 alert-celsius = <0 40>;
160 reg = <0x11>;
165 reg = <0x22>;
/Documentation/devicetree/bindings/mfd/
Dcirrus,lochnagar.yaml57 const: 0x22
268 #size-cells = <0>;
269 reg = <0xe0004000 0x1000>;
273 reg = <0x22>;
275 reset-gpios = <&gpio0 55 0>;
276 present-gpios = <&gpio0 60 0>;
292 #clock-cells = <0>;
301 gpio-ranges = <&lochnagar 0 0 LOCHNAGAR2_PIN_NUM_GPIOS>;
304 pinctrl-0 = <&pinsettings>;
/Documentation/devicetree/bindings/soc/fsl/
Dqman-portals.txt92 ranges = <0 0xf 0xf4200000 0x200000>;
94 qman-portal@0 {
95 compatible = "fsl,qman-portal-1.2.0", "fsl,qman-portal";
96 reg = <0 0x4000>, <0x100000 0x1000>;
97 interrupts = <104 2 0 0>;
99 fsl,qman-channel-id = <0>;
102 fsl,liodn = <0x21>;
106 fsl,liodn = <0xa1>;
110 fsl,liodn = <0x41 0x66>;
115 compatible = "fsl,qman-portal-1.2.0", "fsl,qman-portal";
[all …]
/Documentation/devicetree/bindings/perf/
Dapm-xgene-pmu.txt43 reg = <0x0 0x7e200000 0x0 0x1000>;
48 reg = <0x0 0x7e700000 0x0 0x1000>;
53 reg = <0x0 0x7e720000 0x0 0x1000>;
64 reg = <0x0 0x78810000 0x0 0x1000>;
65 interrupts = <0x0 0x22 0x4>;
69 reg = <0x0 0x7e610000 0x0 0x1000>;
74 reg = <0x0 0x7e940000 0x0 0x1000>;
79 reg = <0x0 0x7e710000 0x0 0x1000>;
80 enable-bit-index = <0>;
85 reg = <0x0 0x7e730000 0x0 0x1000>;
[all …]
/Documentation/devicetree/bindings/input/touchscreen/
Dti-tsc-adc.txt30 AIN0 = 0, AIN1 = 1 and so on till AIN7 = 7.
31 XP = 0, XN = 1, YP = 2, YN = 3.
37 AIN0 = 0, AIN1 = 1 and so on till AIN7 = 7.
46 event. Start from a lower value, say 0x400, and
60 Maximum value is 0x3FFFF.
66 Maximum value is 0xFF.
71 by ADC to generate a sample. Valid range is 0
81 ti,wire-config = <0x00 0x11 0x22 0x33>;
82 ti,charge-delay = <0x400>;
87 ti,chan-step-opendelay = <0x098 0x3ffff 0x098 0x0>;
[all …]
/Documentation/hwmon/
Dw83781d.rst10 Addresses scanned: I2C 0x28 - 0x2f, ISA 0x290 (8 I/O ports)
18 Addresses scanned: I2C 0x28 - 0x2f, ISA 0x290 (8 I/O ports)
26 Addresses scanned: I2C 0x2d
34 Addresses scanned: I2C 0x28 - 0x2f
52 Use 'init=0' to bypass initializing the chip.
56 (default 0)
62 a certain chip. Typical usage is `force_subclients=0,0x2d,0x4a,0x4b`
63 to force the subclients of chip 0x2d on bus 0 to i2c addresses
64 0x4a and 0x4b. This parameter is useful for certain Tyan boards.
80 | as99127f | 7 | 3 | 0 | 3 | 0x31 | 0x12c3 | yes | no |
[all …]
Dlm90.rst10 Addresses scanned: I2C 0x4c
20 Addresses scanned: I2C 0x4c and 0x4d
30 Addresses scanned: I2C 0x4c and 0x4d
40 Addresses scanned: I2C 0x4c
50 Addresses scanned: I2C 0x4c and 0x4d
60 Addresses scanned: I2C 0x4c and 0x4d
70 Addresses scanned: I2C 0x4c and 0x4d
80 Addresses scanned: I2C 0x4c and 0x4d
90 Addresses scanned: I2C 0x4d
100 Addresses scanned: I2C 0x4e
[all …]
Dabituguru-datasheet.rst34 0xE0 and 0xE4, so we don't have to scan any port-range, just check what the two
35 ports are holding for detection. We will refer to 0xE0 as CMD (command-port)
36 and 0xE4 as DATA because Abit refers to them with these names.
38 If DATA holds 0x00 or 0x08 and CMD holds 0x00 or 0xAC an uGuru could be
40 after a reboot uGuru will hold 0x00 here, but if the driver is removed and
41 later on attached again data-port will hold 0x08, more about this later.
44 turned up which will hold 0x00 instead of 0xAC at the CMD port, thus we also
46 hold 0x09 and will only hold 0x08 after reading CMD first, so CMD must be read
72 bank 0x24 for example the addressing within the bank selects a PWM output not
87 To put the uGuru in ready mode first write 0x00 to DATA and then wait for DATA
[all …]
/Documentation/devicetree/bindings/media/xilinx/
Dxlnx,csi2rxss.yaml53 0x1e - YUV4228B
54 0x1f - YUV42210B
55 0x20 - RGB444
56 0x21 - RGB555
57 0x22 - RGB565
58 0x23 - RGB666
59 0x24 - RGB888
60 0x28 - RAW6
61 0x29 - RAW7
62 0x2a - RAW8
[all …]
/Documentation/devicetree/bindings/gpio/
Dgpio-pca95xx.yaml95 "^(hog-[0-9]+|.+-hog(-[0-9]+)?)$":
145 #size-cells = <0>;
149 reg = <0x20>;
151 pinctrl-0 = <&pinctrl_pca9505>;
171 #size-cells = <0>;
175 reg = <0x22>;
193 reg = <0x3b>;
196 ti,micbias = <0>; /* 2.1V */
205 #size-cells = <0>;
210 reg = <0x6d>;
[all …]
/Documentation/RCU/
Dlockdep-splat.rst30 rcu_scheduler_active = 1, debug_locks = 0
32 #0: (&shost->scan_mutex){+.+.}, at: [<ffffffff8145efca>]
33 scsi_scan_host_selected+0x5a/0x150
35 elevator_exit+0x22/0x60
37 cfq_exit_queue+0x43/0x190
40 Pid: 1552, comm: scsi_scan_6 Not tainted 3.0.0-rc5 #17
42 [<ffffffff810abb9b>] lockdep_rcu_dereference+0xbb/0xc0
43 [<ffffffff812b6139>] __cfq_exit_single_io_context+0xe9/0x120
44 [<ffffffff812b626c>] cfq_exit_queue+0x7c/0x190
45 [<ffffffff812a5046>] elevator_exit+0x36/0x60
[all …]
/Documentation/fb/
Dmatroxfb.rst31 pass to the kernel this command line: "video=matroxfb:vesa:0x1BB".
35 unless you have primary display on non-Matrox VBE2.0 device (see
48 4 0x12 0x102
49 8 0x100 0x101 0x180 0x103 0x188
50 15 0x110 0x181 0x113 0x189
51 16 0x111 0x182 0x114 0x18A
52 24 0x1B2 0x184 0x1B5 0x18C
53 32 0x112 0x183 0x115 0x18B
63 4 0x104 0x106
64 8 0x105 0x190 0x107 0x198 0x11C
[all …]
/Documentation/w1/slaves/
Dw1_therm.rst23 W1_THERM_DS18S20 0x10
24 W1_THERM_DS1822 0x22
25 W1_THERM_DS18B20 0x28
26 W1_THERM_DS1825 0x3B
27 W1_THERM_DS28EA00 0x42
47 ``therm_bulk_read`` will return 0 if no bulk conversion pending,
67 the default conversion time write ``0`` to ``conv_time``.
73 To store the current resolution in EEPROM, write ``0`` to ``w1_slave``.
90 ``0`` if the device is parasite powered, ``1`` if the device is externally powered.
98 The module parameter strong_pullup can be set to 0 to disable the
[all …]
/Documentation/usb/
Dacm.rst9 0. Disclaimer
75 B: Alloc= 0/900 us ( 0%), #Int= 0, #Iso= 0
80 C:* #Ifs= 1 Cfg#= 1 Atr=40 MxPwr= 0mA
81 I: If#= 0 Alt= 0 #EPs= 1 Cls=09(hub ) Sub=00 Prot=00 Driver=hub
83 T: Bus=01 Lev=01 Prnt=01 Port=01 Cnt=01 Dev#= 2 Spd=12 MxCh= 0
89 C: #Ifs= 1 Cfg#= 1 Atr=60 MxPwr= 0mA
90 I: If#= 0 Alt= 0 #EPs= 3 Cls=ff(vend.) Sub=ff Prot=ff Driver=acm
91 E: Ad=85(I) Atr=02(Bulk) MxPS= 64 Ivl= 0ms
92 E: Ad=04(O) Atr=02(Bulk) MxPS= 64 Ivl= 0ms
94 C:* #Ifs= 2 Cfg#= 2 Atr=60 MxPwr= 0mA
[all …]
/Documentation/devicetree/bindings/net/wireless/
Dqcom,ath10k.txt95 - qcom,coexist-support : should contain eithr "0" or "1" to indicate coex
116 pcie@0 {
117 reg = <0 0 0 0 0>;
123 wifi@0,0 {
124 reg = <0 0 0 0 0>;
135 reg = <0xa000000 0x200000>;
154 interrupts = <0 0x20 0x1>,
155 <0 0x21 0x1>,
156 <0 0x22 0x1>,
157 <0 0x23 0x1>,
[all …]
/Documentation/filesystems/ext4/
Ddirectory.rst27 directory entries are signified by inode = 0. By default the filesystem
44 * - 0x0
48 * - 0x4
52 * - 0x6
56 * - 0x8
76 * - 0x0
80 * - 0x4
84 * - 0x6
88 * - 0x7
92 * - 0x8
[all …]
/Documentation/powerpc/
Dqe_firmware.rst69 2) The CERCR.CIR bit is set to 0 or 1, depending on whether the firmware
98 | 0 | Ethernet | 0xF8 | 4 bytes |
101 | 4 | ATM | 0xF8 | 4 bytes |
104 | 8 | PPP | 0xF8 | 4 bytes |
107 | 12 | Ethernet RX | 0x22 | 1 byte |
110 | 16 | ATM Globtal | 0x28 | 1 byte |
113 | 20 | Insert Frame | 0xF8 | 4 bytes |
127 | 0 | General | Indicates that prior to each host command |
130 | | | CECDR = 0x00800000. |
131 | | | CECR = 0x01c1000f. |
[all …]
/Documentation/input/devices/
Dalps.rst32 E8-E6-E6-E6-E9. An ALPS touchpad should respond with either 00-00-0A or
33 00-00-64 if no buttons are pressed. The bits 0-2 of the first byte will be 1s
45 The new ALPS touchpads have an E7 signature of 73-03-50 or 73-03-0A but
94 byte 0: 0 0 YSGN XSGN 1 M R L
109 byte 0: 1 0 0 0 1 x9 x8 x7
110 byte 1: 0 x6 x5 x4 x3 x2 x1 x0
111 byte 2: 0 ? ? l r ? fin ges
112 byte 3: 0 ? ? ? ? y9 y8 y7
113 byte 4: 0 y6 y5 y4 y3 y2 y1 y0
114 byte 5: 0 z6 z5 z4 z3 z2 z1 z0
[all …]

12