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/Documentation/admin-guide/media/
Dvimc.rst36 media-ctl -d platform:vimc -V '"Sensor A":0[fmt:SBGGR8_1X8/640x480]'
37 media-ctl -d platform:vimc -V '"Debayer A":0[fmt:SBGGR8_1X8/640x480]'
38 media-ctl -d platform:vimc -V '"Sensor B":0[fmt:SBGGR8_1X8/640x480]'
39 media-ctl -d platform:vimc -V '"Debayer B":0[fmt:SBGGR8_1X8/640x480]'
41 v4l2-ctl -z platform:vimc -d "Raw Capture 0" -v pixelformat=BA81
64 Scale up the image by a factor of 3. E.g.: a 640x480 image becomes a
Dimx.rst157 On i.MX6 Quad, virtual channel 0 is routed to IPU1-CSI0 (after selected
179 channel 0 (two sink pads). The other mux sits in front of IPU2-CSI1 to
243 1280x960 input frame to 640x480, and then /2 downscale in both
249 media-ctl -V "'ipu1_csi0':0[crop:(0,0)/640x480]"
250 media-ctl -V "'ipu1_csi0':0[compose:(0,0)/320x240]"
266 media-ctl -V "'ipu1_csi0':0[fmt:UYVY2X8/640x480@1/60]"
267 media-ctl -V "'ipu1_csi0':2[fmt:UYVY2X8/640x480@1/30]"
382 -> ipuX_csiY:1 -> 0:ipuX_ic_prp:1 -> 0:ipuX_ic_prpenc:1 -> ipuX_ic_prpenc capture
391 -> ipuX_csiY:1 -> 0:ipuX_vdic:2 -> 0:ipuX_ic_prp:2 -> 0:ipuX_ic_prpvf:1 -> ipuX_ic_prpvf capture
436 configured to output 640x480, and the OV5642 outputs YUYV2X8, the
[all …]
Dmeye.rst19 It can do at maximum 30 fps @ 320x240 or 15 fps @ 640x480.
34 driver (PCI vendor/device is 0x136b/0xff01)
40 http://r-engine.sourceforge.net/) (PCI vendor/device is 0x10cf/0x2011).
45 (USB vendor/device is 0x054c/0x0107).
61 video_nr: video device to register (0 = /dev/video0, etc)
72 alias char-major-81-0 meye
83 xawtv -c /dev/video0 -geometry 640x480
/Documentation/fb/
Dviafb.rst21 640x480(60, 75, 85, 100, 120 Hz), 720x480(60 Hz),
23 848x480(60 Hz), 856x480(60 Hz), 1024x512(60 Hz),
27 1920x1080(60 Hz), 1400x1050(60 Hz), 800x480(60 Hz)
47 - 640x480 (default)
48 - 720x480
59 - 0 : expansion (default)
63 0 : LCD panel with LSB data format input (default)
67 - 0 : Resolution: 640x480, Channel: single, Dithering: Enable
75 - 8 : Resolution: 800x480, Channel: single, Dithering: Enable
89 - 0 : No 2D Hardware Acceleration
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Dviafb.modes10 # 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock)
28 mode "640x480-60"
35 # 640x480, 75 Hz, Non-Interlaced (31.50 MHz dotclock)
52 mode "640x480-75"
56 # 640x480, 85 Hz, Non-Interlaced (36.000 MHz dotclock)
73 mode "640x480-85"
77 # 640x480, 100 Hz, Non-Interlaced (43.163 MHz dotclock)
94 mode "640x480-100"
98 # 640x480, 120 Hz, Non-Interlaced (52.406 MHz dotclock)
115 mode "640x480-120"
[all …]
Dsh7760fb.rst5 0. Overview
22 a) if you're using 15/16bit color modes at >= 640x480 px resolutions,
37 configure the SH DMAC for DMABRG mode (write 0x94808080 to the
56 get the framebuffer working on a 640x480 TFT::
62 * NEC NL6440bc26-01 640x480 TFT
88 .flag = 0,
95 .ldpmmr = 0x0070,
96 .ldpspr = 0x0500,
97 .ldaclnr = 0,
100 .rotate = 0,
[all …]
Dsm712fb.rst13 pass to the kernel this command line: "video=sm712fb:0x31B".
23 bpp 640x480 800x600 1024x768 1280x1024
25 8 0x301 0x303 0x305 0x307
26 16 0x311 0x314 0x317 0x31A
27 24 0x312 0x315 0x318 0x31B
Dpxafb.rst10 modprobe pxafb options=vmem:2M,mode:640x480-8,passive
14 video=pxafb:vmem:2M,mode:640x480-8,passive
67 Horizontal and vertical sync. 0 => active low, 1 => active
72 Double pixel clock. 1=>true, 0=>false
76 Output Enable Polarity. 0 => active low, 1 => active high
81 0 => falling edge, 1 => rising edge
158 31 23 20 10 0
165 - 0 - RGB
Dmodedb.rst58 Sample usage: 720x480,rotate=180 - 720x480 mode, rotated by 180 degrees
67 degrees. Valid values are 0, 90, 180 and 270.
147 e.g. there can be multiple 640x480 modes, each of them is tried). If that
Dmatroxfb.rst31 pass to the kernel this command line: "video=matroxfb:vesa:0x1BB".
35 unless you have primary display on non-Matrox VBE2.0 device (see
46 bpp 640x400 640x480 768x576 800x600 960x720
48 4 0x12 0x102
49 8 0x100 0x101 0x180 0x103 0x188
50 15 0x110 0x181 0x113 0x189
51 16 0x111 0x182 0x114 0x18A
52 24 0x1B2 0x184 0x1B5 0x18C
53 32 0x112 0x183 0x115 0x18B
63 4 0x104 0x106
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Dvesafb.rst44 colors 640x480 800x600 1024x768 1280x1024
46 256 0x101 0x103 0x105 0x107
47 32k 0x110 0x113 0x116 0x119
48 64k 0x111 0x114 0x117 0x11A
49 16M 0x112 0x115 0x118 0x11B
54 0x200:
56 Linux_kernel_mode_number = VESA_mode_number + 0x200
61 colors 640x480 800x600 1024x768 1280x1024
63 256 0x301 0x303 0x305 0x307
64 32k 0x310 0x313 0x316 0x319
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/Documentation/devicetree/bindings/display/
Dilitek,ili9486.yaml23 # Waveshare 3.5" 320x480 Color TFT LCD
25 # Ozzmaker 3.5" 320x480 Color TFT LCD
59 #size-cells = <0>;
62 display@0{
64 reg = <0>;
Dsm501fb.txt25 display@1,0 {
27 reg = <1 0x00000000 0x00800000
28 1 0x03e00000 0x00200000>;
30 mode = "640x480-32@60";
Dwm,wm8505-fb.txt16 reg = <0xd8051700 0x200>;
21 timing0: 800x480 {
22 clock-frequency = <0>; /* unused but required */
27 hsync-len = <0>;
Dvia,vt8500-fb.txt17 reg = <0xd800e400 0x400>;
23 timing0: 800x480 {
24 clock-frequency = <0>; /* unused but required */
29 hsync-len = <0>;
/Documentation/devicetree/bindings/sound/
Damlogic,axg-spdifout.txt11 - #sound-dai-cells: must be 0.
20 reg = <0x0 0x480 0x0 0x50>;
21 #sound-dai-cells = <0>;
/Documentation/devicetree/bindings/display/panel/
Dsamsung,s6d16d0.yaml7 title: Samsung S6D16D0 4" 864x480 AMOLED panel
40 #size-cells = <0>;
42 panel@0 {
44 reg = <0>;
46 reset-gpios = <&foo_gpio 0 GPIO_ACTIVE_LOW>;
Delida,kd35t133.yaml7 title: Elida KD35T133 3.5in 320x480 DSI panel
39 #size-cells = <0>;
40 panel@0 {
42 reg = <0>;
Draspberrypi,7inch-touchscreen.yaml7 title: The official 7" (800x480) Raspberry Pi touchscreen
28 const: 0x45
43 #size-cells = <0>;
55 #size-cells = <0>;
56 scl-gpios = <&gpio 28 0>;
57 sda-gpios = <&gpio 29 0>;
61 reg = <0x45>;
/Documentation/devicetree/bindings/iio/adc/
Dsprd,sc2720-adc.yaml60 #size-cells = <0>;
63 reg = <0x480>;
65 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
/Documentation/devicetree/bindings/media/i2c/
Daptina,mt9v111.txt7 The sensor has an active pixel array of 640x480 pixels and can output a number
36 reg = <0x48>;
/Documentation/driver-api/media/drivers/
Dzoran.rst33 Norms: PAL, SECAM (720x576 @ 25 fps), NTSC (720x480 @ 29.97 fps)
54 Norms: PAL, SECAM (720x576 @ 25 fps), NTSC (720x480 @ 29.97 fps)
75 Norms: PAL (720x576 @ 25 fps), NTSC (720x480 @ 29.97 fps)
92 Norms: PAL (720x576 @ 25 fps), NTSC (720x480 @ 29.97 fps)
109 Norms: PAL, SECAM (768x576 @ 25 fps), NTSC (640x480 @ 29.97 fps)
126 Norms: PAL, SECAM (768x576 @ 25 fps), NTSC (640x480 @ 29.97 fps)
144 Norms: PAL, SECAM (768x576 @ 25 fps), NTSC (640x480 @ 29.97 fps)
146 Card number: 0
162 Norms: PAL, SECAM (768x576 @ 25 fps), NTSC (640x480 @ 29.97 fps)
180 Norms: PAL, SECAM (768x576 @ 25 fps), NTSC (640x480 @ 29.97 fps)
[all …]
/Documentation/devicetree/bindings/display/imx/
Dfsl,imx-fb.txt33 reg = <0x10021000 0x1000>;
42 fsl,pcr = <0xf0c88080>; /* non-standard but required */
45 timing_disp0: 640x480 {
/Documentation/hwmon/
Dsmsc47b397.rst40 pair is located at the HWM Base Address + 0 and the HWM Base Address + 1. The
41 HWM Base address can be obtained from Logical Device 8, registers 0x60 (MSB)
42 and 0x61 (LSB). Currently we are using 0x480 for the HWM Base Address and
43 0x480 and 0x481 for the index/data pair.
49 Temp1 0x25 (Currently, this reflects the CPU temp on all systems).
50 Temp2 0x26
51 Temp3 0x27
52 Temp4 0x80
67 Ex: If AL contains 0x2A, the temperature is 42 degrees C.
74 Tach1 0x28 0x29 (Currently, this reflects the CPU
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/Documentation/devicetree/bindings/pinctrl/
Drenesas,rzn1-pinctrl.yaml88 $ref: "#/additionalProperties/anyOf/0"
95 $ref: "#/additionalProperties/anyOf/0"
103 reg = <0x40067000 0x1000>, <0x51000000 0x480>;

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