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/Documentation/devicetree/bindings/net/
Dcavium-mdio.txt15 - #size-cells: Must be <0>. MDIO addresses have no size component.
23 #size-cells = <0>;
24 reg = <0x11800 0x00001800 0x0 0x40>;
26 ethernet-phy@0 {
28 reg = <0>;
58 reg = <0x0b00 0 0 0 0>; /* DEVFN = 0x0b (1:3) */
59 assigned-addresses = <0x03000000 0x87e0 0x05000000 0x0 0x800000>;
60 ranges = <0x87e0 0x05000000 0x03000000 0x87e0 0x05000000 0x0 0x800000>;
65 #size-cells = <0>;
66 reg = <0x87e0 0x05003800 0x0 0x30>;
[all …]
/Documentation/devicetree/bindings/media/
Ds5p-mfc.txt44 reg = <0x13400000 0x10000>;
45 interrupts = <0 94 0>;
62 reg = <0x51000000 0x800000>;
68 reg = <0x43000000 0x800000>;
/Documentation/devicetree/bindings/mtd/
Dingenic,nand.yaml61 reg = <0x13410000 0x10000>;
64 ranges = <1 0 0x1b000000 0x1000000>,
65 <2 0 0x1a000000 0x1000000>,
66 <3 0 0x19000000 0x1000000>,
67 <4 0 0x18000000 0x1000000>,
68 <5 0 0x17000000 0x1000000>,
69 <6 0 0x16000000 0x1000000>;
75 reg = <1 0 0x1000000>;
78 #size-cells = <0>;
89 pinctrl-0 = <&pins_nemc>;
[all …]
Datmel-nand.txt38 device (always 0)
39 3rd entry: the memory region size (always 0x800000)
77 reg = <0x70000000 0x8000000>;
82 reg = <0xffffc070 0x490>,
83 <0xffffc500 0x100>;
91 reg = <0x10000000 0x10000000
92 0x40000000 0x30000000>;
93 ranges = <0x0 0x0 0x10000000 0x10000000
94 0x1 0x0 0x40000000 0x10000000
95 0x2 0x0 0x50000000 0x10000000
[all …]
/Documentation/devicetree/bindings/memory-controllers/
Dmvebu-devbus.txt24 0 <physical address of mapping> <size>
46 - devbus,badr-skew-ps: Defines the time delay from from A[2:0] toggle,
53 ALE[0] to the cycle that the first read data is sampled
63 DEV_OEn assertion. If set to 0 (default),
72 de-assertion of DEV_CSn. If set to 0 (default),
85 - devbus,ale-wr-ps: Defines the time delay from the ALE[0] negation cycle
90 A[2:0] and Data are kept valid as long as DEV_WEn
97 DEV_A[2:0] and Data are kept valid (do not toggle) for
105 0: False
115 will start at base address 0xf0000000, with a size 0x1000000 (16 MiB)
[all …]
/Documentation/devicetree/bindings/crypto/
Dinside-secure-safexcel.txt30 reg = <0x800000 0x200000>;
/Documentation/devicetree/bindings/remoteproc/
Dti,keystone-rproc.txt121 reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
130 reg = <0x10800000 0x00100000>,
131 <0x10e00000 0x00008000>,
132 <0x10f00000 0x00008000>;
135 ti,syscon-dev = <&devctrl 0x40>;
136 resets = <&pscrst 0>;
138 interrupts = <0 8>;
140 kick-gpios = <&dspgpio0 27 0>;
160 reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
169 reg = <0x10800000 0x00100000>,
[all …]
Dti,omap-remoteproc.yaml228 reg = <0x98000000 0x800000>;
237 ti,bootreg = <&scm_conf 0x304 0>;
243 clocks = <&tesla_clkctrl OMAP4_DSP_CLKCTRL 0>;
244 resets = <&prm_tesla 0>, <&prm_tesla 1>;
261 reg = <0 0x95800000 0 0x3800000>;
273 reg = <0x55020000 0x10000>;
280 clocks = <&ipu_clkctrl OMAP5_MMU_IPU_CLKCTRL 0>;
298 reg = <0x0 0x99000000 0x0 0x4000000>;
310 reg = <0x40800000 0x48000>,
311 <0x40e00000 0x8000>,
[all …]
/Documentation/devicetree/bindings/pci/
Dintel-gw-pcie.yaml122 reg = <0xd0e00000 0x1000>,
123 <0xd2000000 0x800000>,
124 <0xd0a41000 0x1000>;
126 linux,pci-domain = <0>;
128 bus-range = <0x00 0x08>;
130 interrupt-map-mask = <0 0 0 0x7>;
131 interrupt-map = <0 0 0 1 &ioapic1 27 1>,
132 <0 0 0 2 &ioapic1 28 1>,
133 <0 0 0 3 &ioapic1 29 1>,
134 <0 0 0 4 &ioapic1 30 1>;
[all …]
/Documentation/devicetree/bindings/interrupt-controller/
Darm,gic-v3.yaml33 enum: [ 0, 1, 2 ]
46 The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI
51 SPI interrupts are in the range [0-987]. PPI interrupts are in the
52 range [0-15]. Extented SPI interrupts are in the range [0-1023].
53 Extended PPI interrupts are in the range [0-127].
56 bits[3:0] trigger type and level flags.
68 of 0 if present.
95 multipleOf: 0x10000
96 exclusiveMinimum: 0
136 "^interrupt-partition-[0-9]+$":
[all …]
/Documentation/devicetree/bindings/pinctrl/
Dqcom,apq8064-pinctrl.txt65 reg = <0x800000 0x4000>;
71 interrupts = <0 16 0x4>;
74 pinctrl-0 = <&gsbi5_uart_default>;
75 gpio-ranges = <&msmgpio 0 0 90>;
Dqcom,ipq8064-pinctrl.txt71 reg = <0x800000 0x4000>;
75 gpio-ranges = <&pinmux 0 0 69>;
78 interrupts = <0 32 0x4>;
81 pinctrl-0 = <&gsbi5_uart_default>;
Dqcom,msm8660-pinctrl.txt66 reg = <0x800000 0x4000>;
70 gpio-ranges = <&msmgpio 0 0 173>;
73 interrupts = <0 16 0x4>;
76 pinctrl-0 = <&gsbi12_uart>;
Dqcom,mdm9615-pinctrl.txt134 reg = <0x800000 0x4000>;
138 gpio-ranges = <&msmgpio 0 0 88>;
141 interrupts = <0 16 0x4>;
Dqcom,msm8960-pinctrl.txt163 reg = <0x800000 0x4000>;
167 gpio-ranges = <&msmgpio 0 0 152>;
170 interrupts = <0 16 0x4>;
/Documentation/arm/sa1100/
Dassabet.rst91 load zImage -r -b 0x100000
95 load -m ymodem -r -b 0x100000
99 fis create "Linux kernel" -b 0x100000 -l 0xc0000
108 load ramdisk_image.gz -r -b 0x800000
119 exec -b 0x100000 -l 0xc0000
140 load sample_img.jffs2 -r -b 0x100000
144 RedBoot> load sample_img.jffs2 -r -b 0x100000
145 Raw file loaded 0x00100000-0x00377424
154 0x500E0000 .. 0x503C0000
162 size of unallocated flash: 0x503c0000 - 0x500e0000 = 0x2e0000
[all …]
/Documentation/devicetree/bindings/reserved-memory/
Dreserved-memory.txt98 reg = <0x40000000 0x40000000>;
110 size = <0x4000000>;
111 alignment = <0x2000>;
116 reg = <0x78000000 0x800000>;
121 reg = <0x77000000 0x4000000>;
/Documentation/devicetree/bindings/net/dsa/
Docelot.txt18 in this case for the Ethernet L2Switch it is PF5 (of device 0, bus 0).
50 * phy_mode = "sgmii": on ports 0, 1, 2, 3
51 * phy_mode = "qsgmii": on ports 0, 1, 2, 3
52 * phy_mode = "usxgmii": on ports 0, 1, 2, 3
53 * phy_mode = "2500base-x": on ports 0, 1, 2, 3
65 ethernet-switch@0,5 {
66 reg = <0x000500 0 0 0 0>;
72 #size-cells = <0>;
75 port@0 {
76 reg = <0>;
[all …]
/Documentation/devicetree/bindings/net/wireless/
Dqcom,ath10k.txt95 - qcom,coexist-support : should contain eithr "0" or "1" to indicate coex
116 pcie@0 {
117 reg = <0 0 0 0 0>;
123 wifi@0,0 {
124 reg = <0 0 0 0 0>;
135 reg = <0xa000000 0x200000>;
154 interrupts = <0 0x20 0x1>,
155 <0 0x21 0x1>,
156 <0 0x22 0x1>,
157 <0 0x23 0x1>,
[all …]
/Documentation/hwmon/
Dw83791d.rst10 Addresses scanned: I2C 0x2c - 0x2f
40 (default 0)
49 (default 0)
51 Use 'reset=1' to reset the chip (via index 0x40, bit 7). The default
56 a certain chip. Example usage is `force_subclients=0,0x2f,0x4a,0x4b`
57 to force the subclients of chip 0x2f on bus 0 to i2c addresses
58 0x4a and 0x4b.
90 set for each fan separately. Valid values range from 0 (stop) to 255 (full).
157 in0 (VCORE) 0x000001 0x000001
158 in1 (VINR0) 0x000002 0x002000 <== mismatch
[all …]