| /Documentation/devicetree/bindings/regulator/ |
| D | ti-abb-regulator.txt | 9 - reg: Address and length of the register set for the device. It contains
12 - "base-address" - contains base address of ABB module (ti,abb-v1,ti,abb-v2)
13 - "control-address" - contains control register address of ABB module (ti,abb-v3)
14 - "setup-address" - contains setup register address of ABB module (ti,abb-v3)
15 - "int-address" - contains address of interrupt register for ABB module
17 - #address-cells: should be 0
47 - "efuse-address" - Contains efuse base address used to pick up ABB info.
48 - "ldo-address" - Contains address of ABB LDO override register.
49 "efuse-address" is required for this.
50 - ti,ldovbb-vset-mask - Required if ldo-address is set, mask for LDO override
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| /Documentation/x86/x86_64/ |
| D | 5level-paging.rst | 9 Original x86-64 was limited by 4-level paing to 256 TiB of virtual address
10 space and 64 TiB of physical address space. We are already bumping into
17 It bumps the limits to 128 PiB of virtual address space and 4 PiB of
18 physical address space. This "ought to be enough for anybody" ©.
34 User-space and large virtual address space
36 On x86, 5-level paging enables 56-bit userspace virtual address space.
42 To mitigate this, we are not going to allocate virtual address space
45 But userspace can ask for allocation from full address space by
46 specifying hint address (with or without MAP_FIXED) above 47-bits.
48 If hint address set above 47-bit, but MAP_FIXED is not specified, we try
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| /Documentation/arm/ |
| D | porting.rst | 12 virtual address to a physical address. Normally, it is simply:
21 Start address of decompressor. There's no point in talking about
24 the kernel at this address to start it booting. This doesn't have
29 Start address of zero-initialised work area for the decompressor.
34 This is the address where the decompressed kernel will be written,
43 Physical address to place the initial RAM disk. Only relevant if
48 Virtual address of the initial RAM disk. The following constraint
54 Physical address of the struct param_struct or tag list, giving the
62 Physical start address of the first bank of RAM.
65 Virtual start address of the first bank of RAM. During the kernel
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| /Documentation/core-api/ |
| D | bus-virt-phys-mapping.rst | 21 controller the physical address of the buffers, which is correct on x86
26 so-called "bus address".
31 - CPU untranslated. This is the "physical" address. Physical address
34 - CPU translated address. This is the "virtual" address, and is
38 - bus address. This is the address of memory as seen by OTHER devices,
45 Now, on normal PCs the bus address is exactly the same as the physical
46 address, and things are very simple indeed. However, they are that simple
47 because the memory and the devices share the same address space, and that is
59 address 0 actually shows up as address 2 GB for any IO master.
62 has to give the master address 0x80000000 as the memory address.
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| D | cachetlb.rst | 19 if it can be proven that a user address space has never executed
21 for this address space on that cpu.
25 virtual-->physical address translations obtained from the software
43 This interface flushes an entire user address space from
45 any previous page table modifications for the address space
49 This interface is used to handle whole address space
57 address translations from the TLB. After running, this
59 modifications for the address space 'vma->vm_mm' in the range
78 address space is available via vma->vm_mm. Also, one may
84 page table modification for address space 'vma->vm_mm' for
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| /Documentation/xtensa/ |
| D | booting.rst | 8 entry must have type BP_TAG_LAST. The address of the first list entry is
9 passed to the kernel in the register a2. The address type depends on MMU type:
12 address must be the physical address.
14 the address must be a valid address in the current mapping. The kernel will
16 - For configurations with MMUv2 the address must be a virtual address in the
18 - For configurations with MMUv3 and CONFIG_MMU=y the address may be either a
19 virtual or physical address. In either case it must be within the default
|
| /Documentation/userspace-api/media/cec/ |
| D | cec-ioc-adap-g-phys-addr.rst | 15 CEC_ADAP_G_PHYS_ADDR, CEC_ADAP_S_PHYS_ADDR - Get or set the physical address
35 Pointer to the CEC address.
40 To query the current physical address applications call
42 driver stores the physical address.
44 To set a new physical address applications store the physical address in
52 To clear an existing physical address use ``CEC_PHYS_ADDR_INVALID``.
55 If logical address types have been defined (see :ref:`ioctl CEC_ADAP_S_LOG_ADDRS <CEC_ADAP_S_LOG_AD…
60 A :ref:`CEC_EVENT_STATE_CHANGE <CEC-EVENT-STATE-CHANGE>` event is sent when the physical address
63 The physical address is a 16-bit number where each group of 4 bits
64 represent a digit of the physical address a.b.c.d where the most
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| /Documentation/devicetree/bindings/powerpc/fsl/ |
| D | msi-pic.txt | 14 the address and the length of the shared message interrupt register set.
15 The second region should contain the address of aliased MSIIR or MSIIR1
33 - msi-address-64: 64-bit PCI address of the MSIIR register. The MSIIR register
34 is used for MSI messaging. The address of MSIIR in PCI address space is
35 the MSI message address.
81 The Freescale hypervisor and msi-address-64
84 Freescale MSI driver calculates the address of MSIIR (in the MSI register
85 block) and sets that address as the MSI message address.
91 The ATMU is programmed with the guest physical address, and the PAMU
92 intercepts transactions and reroutes them to the true physical address.
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| /Documentation/ABI/testing/ |
| D | sysfs-bus-rpmsg | 19 processor. Channels have a local ("source") rpmsg address,
20 and remote ("destination") rpmsg address. When an entity
22 a unique rpmsg address (a 32 bits integer). This way when
23 inbound messages arrive to this address, the rpmsg core
26 This sysfs entry contains the src (local) rpmsg address
27 of this channel. If it contains 0xffffffff, then an address
37 processor. Channels have a local ("source") rpmsg address,
38 and remote ("destination") rpmsg address. When an entity
40 a unique rpmsg address (a 32 bits integer). This way when
41 inbound messages arrive to this address, the rpmsg core
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| /Documentation/devicetree/bindings/pwm/ |
| D | pwm-tipwmss.txt | 9 - reg: physical base address and size of the registers map.
10 - address-cells: Specify the number of u32 entries needed in child nodes.
14 - ranges: describes the address mapping of a memory-mapped bus. Should set to
15 physical address map of child's base address, physical address within
16 parent's address space and length of the address map. For am33xx,
27 #address-cells = <1>;
40 #address-cells = <1>;
53 #address-cells = <1>;
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| /Documentation/devicetree/bindings/i3c/ |
| D | i3c.txt | 10 - #address-cells - should be <3>. Read more about addresses below.
42 + first cell : still encoding the I2C address. 10 bit addressing is not
43 supported. Devices with 10 bit address can't be properly passed through
65 The I2C node unit-address should always match the first cell of the reg
66 property: <device-type>@<i2c-address>.
71 All I3C devices are supposed to support DAA (Dynamic Address Assignment), and
79 I3C device has a static I2C address and we want to assign it a specific I3C
80 dynamic address before the DAA takes place (so that other devices on the bus
81 can't take this dynamic address).
83 The I3C device should be names <device-type>@<static-i2c-address>,<i3c-pid>,
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| /Documentation/vm/ |
| D | active_mm.rst | 26 - we have "real address spaces" and "anonymous address spaces". The
27 difference is that an anonymous address space doesn't care about the
29 anonymous address space we just leave the previous address space
32 The obvious use for a "anonymous address space" is any thread that
40 - "tsk->mm" points to the "real address space". For an anonymous process,
42 really doesn't _have_ a real address space at all.
44 - however, we obviously need to keep track of which address space we
46 which shows what the currently active address space is.
48 The rule is that for a process with a real address space (ie tsk->mm is
54 anonymous process gets scheduled away, the borrowed address space is
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| /Documentation/devicetree/bindings/pci/ |
| D | ralink,rt3883-pci.txt | 9 - reg: specifies the physical base address of the controller and
12 - #address-cells: specifies the number of cells needed to encode an
13 address. The value must be 1.
16 of an address. The value must be 1.
18 - ranges: specifies the translation between child address space and parent
19 address space
37 - #address-cells: specifies the number of cells needed to encode an
38 address. The value must be 0. As such, 'interrupt-map' nodes do not
39 have to specify a parent unit address.
52 - #address-cells: specifies the number of cells needed to encode an
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| /Documentation/devicetree/bindings/phy/ |
| D | qcom,qmp-usb3-dp-phy.yaml | 22 - description: Address and length of PHY's USB serdes block.
23 - description: Address and length of the DP_COM control block.
24 - description: Address and length of PHY's DP serdes block.
35 "#address-cells":
89 - description: Address and length of TX.
90 - description: Address and length of RX.
91 - description: Address and length of PCS.
92 - description: Address and length of TX2.
93 - description: Address and length of RX2.
94 - description: Address and length of pcs_misc.
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| /Documentation/arm64/ |
| D | tagged-pointers.rst | 15 the virtual address ignored by the translation hardware. This frees up
23 an address tag of 0x00, unless the application enables the AArch64
24 Tagged Address ABI explicitly
25 (Documentation/arm64/tagged-address-abi.rst).
38 Using non-zero address tags in any of these locations when the
39 userspace application did not enable the AArch64 Tagged Address ABI may
43 For these reasons, when the AArch64 Tagged Address ABI is disabled,
44 passing non-zero address tags to the kernel via system calls is
45 forbidden, and using a non-zero address tag for sp is strongly
49 address tags may suffer impaired or inaccurate debug and profiling
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| /Documentation/devicetree/bindings/usb/ |
| D | octeon-usb.txt | 9 - reg: specifies the physical base address of the USBN block and
12 - #address-cells: specifies the number of cells needed to encode an
13 address. The value must be 2.
16 of an address. The value must be 2.
18 - ranges: specifies the translation between child address space and parent
19 address space.
40 - reg: specifies the physical base address of the USBC block and
51 #address-cells = <2>;
|
| /Documentation/networking/ |
| D | j1939.rst | 35 not necessarily know its source address. Although, at least one process per
36 ECU should know the source address. Other processes should be able to reuse
37 that address. This way, address parameters for different processes
42 * **Dynamic addressing:** Address Claiming in J1939 is time critical.
43 Furthermore, data transport should be handled properly during the address
63 cannot share ECU addresses. A single ECU (or virtual ECU) address is used by
85 Destination Address, which is _not_ part of the PGN. When communicating a PGN
87 of the PGN shall be set to zero. The Destination Address shall be set
90 Regarding PGN mapping to 29-bit CAN identifier, the Destination Address shall
103 For dynamic addressing, so-called Address Claiming, extra support is foreseen
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| /Documentation/devicetree/bindings/net/ |
| D | brcm,bcmgenet.txt | 6 - reg: address and length of the register set for the device
14 - #address-cells: should be 1
44 - reg: address and length relative to the parent node base register address
45 - #address-cells: address cell for MDIO bus addressing, should be 1
58 mac-address = [ 00 10 18 36 23 1a ];
60 #address-cells = <0x1>;
67 #address-cells = <0x1>;
84 mac-address = [ 00 10 18 36 24 1a ];
86 #address-cells = <0x1>;
93 #address-cells = <0x1>;
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| D | cavium-pip.txt | 14 - reg: The base address of the PIP's register bank.
16 - #address-cells: Must be <1>.
27 - #address-cells: Must be <1>.
50 #address-cells = <1>;
56 #address-cells = <1>;
63 local-mac-address = [ 00 0f b7 10 63 60 ];
69 local-mac-address = [ 00 0f b7 10 63 61 ];
75 local-mac-address = [ 00 0f b7 10 63 62 ];
81 local-mac-address = [ 00 0f b7 10 63 63 ];
88 #address-cells = <1>;
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| /Documentation/devicetree/bindings/bus/ |
| D | nvidia,tegra210-aconnect.txt | 15 - #address-cells: The number of cells used to represent physical base addresses
16 in the aconnect address space. Should be 1.
17 - #size-cells: The number of cells used to represent the size of an address
18 range in the aconnect address space. Should be 1.
19 - ranges: Mapping of the aconnect address space to the CPU address space.
32 #address-cells = <1>;
|
| D | socionext,uniphier-system-bus.yaml | 11 the UniPhier SoC. It is a simple (semi-)parallel bus with address, data, and
16 within each bank to the CPU-viewed address. The needed setup includes the
17 base address, the size of each bank. Optionally, some timing parameters can
30 "#address-cells":
33 The second cell is the address offset within the bank.
41 Provide address translation from the System Bus to the parent bus.
44 The address region(s) that can be assigned for the System Bus is
48 The address translation is arbitrary as long as the banks are assigned in
49 the supported address space with the required alignment and they do not
68 - "#address-cells"
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| /Documentation/parisc/ |
| D | debugging.rst | 14 rest of the kernel. To translate an absolute address to a virtual
15 address you can lookup in System.map, add __PAGE_OFFSET (0x10000000
25 address should match (one of the) processor HPAs (high addresses in
26 the I/O range); the System Responder address is the address real-mode
29 Typical values for the System Responder address are addresses larger
30 than __PAGE_OFFSET (0x10000000) which mean a virtual address didn't
31 get translated to a physical address before real-mode code tried to
|
| /Documentation/devicetree/bindings/i2c/ |
| D | i2c-pxa-pci-ce4100.txt | 11 number to its physical address and to use this to find the child nodes
15 ranges describes how the parent pci address space
17 address space (first group of 2) and the size of
19 the first cell of the local address is chosen to be
25 ranges allows the address mapping to be described
32 #address-cells = <2>;
43 * three is the bar number followed by the 64bit bar address
44 * followed by size of the mapping. The bar address
53 #address-cells = <1>;
66 #address-cells = <1>;
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| D | i2c-sprd.txt | 5 - reg: Specify the physical base address of the controller and length
14 - #address-cells: Should be 1 to describe address cells for I2C device address.
15 - #size-cells: Should be 0 means no size cell for I2C device address.
28 #address-cells = <1>;
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| /Documentation/misc-devices/ |
| D | max6875.rst | 55 The driver does not probe any address, so you explicitly instantiate the
63 The MAX6874/MAX6875 ignores address bit 0, so this driver attaches to multiple
64 addresses. For example, for address 0x50, it also reserves 0x51.
65 The even-address instance is called 'max6875', the odd one is 'dummy'.
73 Reads and writes are performed differently depending on the address range.
99 The command is the upper byte of the address: 0x80, 0x81, or 0x82.
100 The data word is the lower part of the address or'd with data << 8::
102 cmd = address >> 8;
103 val = (address & 0xff) | (data << 8);
107 To write 0x5a to address 0x8003::
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