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Searched +full:axi +full:- +full:config (Results 1 – 10 of 10) sorted by relevance

/Documentation/devicetree/bindings/pci/
Dqcom,pcie.txt3 - compatible:
7 - "qcom,pcie-ipq8064" for ipq8064
8 - "qcom,pcie-ipq8064-v2" for ipq8064 rev 2 or ipq8065
9 - "qcom,pcie-apq8064" for apq8064
10 - "qcom,pcie-apq8084" for apq8084
11 - "qcom,pcie-msm8996" for msm8996 or apq8096
12 - "qcom,pcie-ipq4019" for ipq4019
13 - "qcom,pcie-ipq8074" for ipq8074
14 - "qcom,pcie-qcs404" for qcs404
15 - "qcom,pcie-sdm845" for sdm845
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Dhost-generic-pci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/host-generic-pci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Will Deacon <will@kernel.org>
13 Firmware-initialised PCI host controllers and PCI emulations, such as the
14 virtio-pci implementations found in kvmtool and other para-virtualised
21 Configuration Space is assumed to be memory-mapped (as opposed to being
26 For CAM, this 24-bit offset is:
41 - description:
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Dmobiveil-pcie.txt1 * Mobiveil AXI PCIe Root Port Bridge DT description
7 - #address-cells: Address representation for root ports, set to <3>
8 - #size-cells: Size representation for root ports, set to <2>
9 - #interrupt-cells: specifies the number of cells needed to encode an
11 - compatible: Should contain "mbvl,gpex40-pcie"
12 - reg: Should contain PCIe registers location and length
15 "csr_axi_slave" : Bridge config registers
20 - device_type: must be "pci"
21 - apio-wins : number of requested apio outbound windows
22 default 2 outbound windows are configured -
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Dti-pci.txt4 - compatible: Should be "ti,dra7-pcie" for RC (deprecated)
5 Should be "ti,dra7-pcie-ep" for EP (deprecated)
6 Should be "ti,dra746-pcie-rc" for dra74x/dra76 in RC mode
7 Should be "ti,dra746-pcie-ep" for dra74x/dra76 in EP mode
8 Should be "ti,dra726-pcie-rc" for dra72x in RC mode
9 Should be "ti,dra726-pcie-ep" for dra72x in EP mode
10 - phys : list of PHY specifiers (used by generic PHY framework)
11 - phy-names : must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the
13 - ti,hwmods : Name of the hwmod associated to the pcie, "pcie<X>",
15 - num-lanes as specified in ../designware-pcie.txt
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/Documentation/admin-guide/perf/
Dimx-ddr.rst10 Selection of the value for each counter is done via the config registers. There
16 The "format" directory describes format of the config (event ID) and config1
17 (AXI filtering) fields of the perf_event_attr structure, see /sys/bus/event_source/
23 .. code-block:: bash
25 perf stat -a -e imx8_ddr0/cycles/ cmd
26 perf stat -a -e imx8_ddr0/read/,imx8_ddr0/write/ cmd
28 AXI filtering is only used by CSV modes 0x41 (axid-read) and 0x42 (axid-write)
32 indicates whether PMU supports AXI ID filter or not; enhanced_filter indicates
33 whether PMU supports enhanced AXI ID filter or not. Value 0 for un-supported, and
38 --AXI_ID defines AxID matching value.
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/Documentation/devicetree/bindings/net/
Dintel,dwmac-plat.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/intel,dwmac-plat.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com>
17 - intel,keembay-dwmac
19 - compatible
22 - $ref: "snps,dwmac.yaml#"
27 - items:
28 - enum:
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Dsnps,dwmac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
23 - snps,dwmac
24 - snps,dwmac-3.50a
25 - snps,dwmac-3.610
26 - snps,dwmac-3.70a
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Dstm32-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/net/stm32-dwmac.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Alexandre Torgue <alexandre.torgue@st.com>
12 - Christophe Roullier <christophe.roullier@st.com>
23 - st,stm32-dwmac
24 - st,stm32mp1-dwmac
26 - compatible
29 - $ref: "snps,dwmac.yaml#"
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/Documentation/devicetree/bindings/usb/
Dqcom,dwc3.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manu Gautam <mgautam@codeaurora.org>
15 - enum:
16 - qcom,msm8996-dwc3
17 - qcom,msm8998-dwc3
18 - qcom,sc7180-dwc3
19 - qcom,sdm845-dwc3
20 - qcom,sdx55-dwc3
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/Documentation/trace/coresight/
Dcoresight.rst2 Coresight - HW Assisted Tracing on ARM
9 ------------
33 **************************** AMBA AXI ****************************===||
38 0 CPU 0<-->: C : 0 CPU 0<-->: C : : C : @ STM @ || System ||
39 |->0000000 : T : |->0000000 : T : : T :<--->@@@@@ || Memory ||
40 | #######<-->: I : | #######<-->: I : : I : @@@<-| ||||||||||||
43 | |->### | ! | |->### | ! | ! . | || DAP ||
49 *****************************************************************<-|
63 | * ===== F =====<---------|
65 |-->:: CTI ::<!! === N ===
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